6111b968a2860ebc5257aac2328c67d85c1e3fa3
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_glinet_gl-ar750s.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 #include "qca956x.dtsi"
7
8 / {
9 compatible = "glinet,gl-ar750s", "qca,qca9563";
10 model = "GL.iNet GL-AR750S";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_power;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 label-mac-device = &eth0;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 pinctrl-names = "default";
24 pinctrl-0 = <&jtag_disable_pins>;
25
26 reset {
27 label = "reset";
28 linux,code = <KEY_RESTART>;
29 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
30 };
31
32 mode {
33 label = "mode";
34 linux,code = <BTN_0>;
35 linux,input-type = <EV_SW>;
36 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
37 };
38 };
39
40 leds {
41 compatible = "gpio-leds";
42
43 led_power: power {
44 label = "gl-ar750s:green:power";
45 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
46 default-state = "keep";
47 };
48
49 led_wlan2g: wlan2g {
50 label = "gl-ar750s:green:wlan2g";
51 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
52 linux,default-trigger = "phy1tpt";
53 };
54
55 led_wlan5g: wlan5g {
56 label = "gl-ar750s:green:wlan5g";
57 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
58 linux,default-trigger = "phy0tpt";
59 };
60 };
61
62 i2c: i2c {
63 compatible = "i2c-gpio";
64
65 sda-gpios = <&gpio 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
66 scl-gpios = <&gpio 21 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
67 };
68 };
69
70 &spi {
71 status = "okay";
72
73 num-cs = <2>;
74
75 flash_nor: flash@0 {
76 compatible = "jedec,spi-nor";
77 reg = <0>;
78 spi-max-frequency = <25000000>;
79
80 nor_partitions: partitions {
81 compatible = "fixed-partitions";
82 #address-cells = <1>;
83 #size-cells = <1>;
84
85 partition@0 {
86 label = "u-boot";
87 reg = <0x000000 0x040000>;
88 read-only;
89 };
90
91 partition@40000 {
92 label = "u-boot-env";
93 reg = <0x040000 0x010000>;
94 };
95
96 art: partition@50000 {
97 label = "art";
98 reg = <0x050000 0x010000>;
99 read-only;
100 };
101
102 nor_firmware: partition@60000 {
103 label = "nor_firmware";
104 reg = <0x060000 0xfa0000>;
105 };
106
107 nor_kernel: partition_alt@60000 {
108 label = "nor_kernel";
109 reg = <0x060000 0x400000>;
110 };
111
112 nor_reserved: parition_alt@460000 {
113 label = "nor_reserved";
114 reg = <0x460000 0xba0000>;
115 };
116 };
117 };
118
119 flash_nand: flash@1 {
120 compatible = "spi-nand";
121 reg = <1>;
122 spi-max-frequency = <25000000>;
123
124 nand_partitions: partitions {
125 compatible = "fixed-partitions";
126 #address-cells = <1>;
127 #size-cells = <1>;
128
129 nand_ubi: partition@0 {
130 label = "nand_ubi";
131 reg = <0x000000 0x8000000>;
132 };
133 };
134 };
135 };
136
137 &eth0 {
138 status = "okay";
139
140 phy-handle = <&phy0>;
141 mtd-mac-address = <&art 0x0>;
142 };
143
144 &gpio {
145 usb_vbus {
146 gpio-hog;
147 gpios = <7 GPIO_ACTIVE_HIGH>;
148 output-high;
149 line-name = "usb-vbus";
150 };
151 };
152
153 &mdio0 {
154 status = "okay";
155
156 phy-mask = <0>;
157
158 phy0: ethernet-phy@0 {
159 reg = <0>;
160 phy-mode = "sgmii";
161 qca,ar8327-initvals = <
162 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
163 0x7c 0x0000007e /* PORT0_STATUS */
164 >;
165 };
166 };
167
168 &pcie {
169 status = "okay";
170 };
171
172 &uart {
173 status = "okay";
174 };
175
176 &usb0 {
177 status = "okay";
178 };
179
180 &usb1 {
181 status = "okay";
182 };
183
184 &usb_phy0 {
185 status = "okay";
186 };
187
188 &usb_phy1 {
189 status = "okay";
190 };
191
192 &wmac {
193 status = "okay";
194
195 mtd-cal-data = <&art 0x1000>;
196 };