ath79: enable UART in SoC DTSI files
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_tplink_archer-c7-v4.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "tplink,archer-c7-v4", "qca,qca9563";
10 model = "TP-Link Archer C7 v4";
11
12 aliases {
13 led-boot = &led_system;
14 led-failsafe = &led_system;
15 led-running = &led_system;
16 led-upgrade = &led_system;
17 label-mac-device = &eth0;
18 };
19
20 led_spi {
21 compatible = "spi-gpio";
22 #address-cells = <1>;
23 #size-cells = <0>;
24
25 sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; // 74HC595 SRCLK (Serial Clock)
26 mosi-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; // 74HC595 SER (Serial)
27 cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; // 74HC595 RCLK (Register Clock)
28 num-chipselects = <1>;
29
30 led_gpio: led_gpio@0 {
31 compatible = "fairchild,74hc595";
32 reg = <0>;
33 gpio-controller;
34 #gpio-cells = <2>;
35 registers-number = <1>;
36 spi-max-frequency = <10000000>;
37 };
38 };
39
40 gpio-export {
41 compatible = "gpio-export";
42
43 gpio_shift_register_oe {
44 gpio-export,name = "tp-link:oe:sr";
45 gpio-export,output = <0>;
46 gpios = <&gpio 1 GPIO_ACTIVE_LOW>; // 74HC595 /OE (Output Enable)
47 };
48
49 gpio_shift_register_reset {
50 gpio-export,name = "tp-link:reset:sr";
51 gpio-export,output = <1>;
52 gpios = <&gpio 21 GPIO_ACTIVE_LOW>; // 74HC595 /SRCLR (Serial Clear)
53 };
54 };
55
56 leds {
57 compatible = "gpio-leds";
58
59 led_system: system {
60 label = "green:system";
61 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
62 default-state = "on";
63 };
64
65 usb1 {
66 label = "green:usb1";
67 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
68 trigger-sources = <&hub_port1>;
69 linux,default-trigger = "usbport";
70 };
71
72 usb2 {
73 label = "green:usb2";
74 gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
75 trigger-sources = <&hub_port0>;
76 linux,default-trigger = "usbport";
77 };
78
79 wlan5g {
80 label = "green:wlan5g";
81 gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
82 linux,default-trigger = "phy0tpt";
83 };
84
85 wlan2g {
86 label = "green:wlan2g";
87 gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
88 linux,default-trigger = "phy1tpt";
89 };
90
91 wan {
92 label = "green:wan";
93 gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
94 };
95
96 wan_fail {
97 label = "orange:wan";
98 gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
99 };
100
101 lan1 {
102 label = "green:lan1";
103 gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
104 };
105
106 lan2 {
107 label = "green:lan2";
108 gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
109 };
110
111 lan3 {
112 label = "green:lan3";
113 gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
114 };
115
116 lan4 {
117 label = "green:lan4";
118 gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
119 };
120
121 wps {
122 label = "green:wps";
123 gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
124 };
125 };
126
127 keys {
128 compatible = "gpio-keys";
129
130 reset {
131 label = "Reset button";
132 linux,code = <KEY_RESTART>;
133 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
134 debounce-interval = <60>;
135 };
136
137 wps {
138 label = "WPS button";
139 linux,code = <KEY_WPS_BUTTON>;
140 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
141 debounce-interval = <60>;
142 };
143 };
144 };
145
146 &pcie {
147 status = "okay";
148 };
149
150 &usb_phy0 {
151 status = "okay";
152 };
153
154 &usb0 {
155 #address-cells = <1>;
156 #size-cells = <0>;
157 status = "okay";
158
159 hub_port0: port@1 {
160 reg = <1>;
161 #trigger-source-cells = <0>;
162 };
163 };
164
165 &usb_phy1 {
166 status = "okay";
167 };
168
169 &usb1 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 status = "okay";
173
174 hub_port1: port@1 {
175 reg = <1>;
176 #trigger-source-cells = <0>;
177 };
178 };
179
180 &spi {
181 status = "okay";
182
183 flash@0 {
184 compatible = "jedec,spi-nor";
185 reg = <0>;
186 spi-max-frequency = <25000000>;
187
188 partitions {
189 compatible = "fixed-partitions";
190 #address-cells = <1>;
191 #size-cells = <1>;
192
193 partition@0 {
194 label = "factory-uboot";
195 reg = <0x000000 0x020000>;
196 read-only;
197 };
198
199 partition@20000 {
200 label = "u-boot";
201 reg = <0x020000 0x020000>;
202 read-only;
203 };
204
205 partition@40000 {
206 label = "firmware";
207 reg = <0x040000 0xec0000>;
208 compatible = "denx,uimage";
209 };
210
211 info: partition@f00000 {
212 label = "info";
213 reg = <0xf00000 0x0f0000>;
214 read-only;
215 };
216
217 art: partition@ff0000 {
218 label = "art";
219 reg = <0xff0000 0x010000>;
220 read-only;
221 };
222 };
223 };
224 };
225
226 &mdio0 {
227 status = "okay";
228
229 phy-mask = <0>;
230
231 phy0: ethernet-phy@0 {
232 reg = <0>;
233 phy-mode = "sgmii";
234 qca,mib-poll-interval = <500>;
235
236 qca,ar8327-initvals = <
237 0x04 0x80080080 /* PORT0 PAD MODE CTRL */
238 0x7c 0x0000007e /* PORT0_STATUS */
239 0x94 0x00000200 /* PORT6_STATUS */
240 >;
241 };
242 };
243
244 &eth0 {
245 status = "okay";
246
247 pll-data = <0x03000101 0x00000101 0x00001919>;
248
249 phy-mode = "sgmii";
250 mtd-mac-address = <&info 0x8>;
251 phy-handle = <&phy0>;
252 };
253
254 &wmac {
255 status = "okay";
256
257 mtd-cal-data = <&art 0x1000>;
258 mtd-mac-address = <&info 0x8>;
259 };