target/linux/ath79/patches-5.4/410-spi-ath79-Implement-the-spi_mem-interface.patch

   1 From 8d8cdb4a6ccee5b62cc0dc64651c3946364514dc Mon Sep 17 00:00:00 2001
   2 From: Luiz Angelo Daros de Luca <luizluca@gmail.com>
   3 Date: Mon, 10 Feb 2020 16:11:27 -0300
   4 Subject: [PATCH] spi: ath79: Implement the spi_mem interface
   5
   6 Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
   7 ---
   8  drivers/spi/spi-ath79.c | 35 +++++++++++++++++++++++++++++++++++
   9  1 file changed, 35 insertions(+)
  10
  11 Index: linux-5.4.22/drivers/spi/spi-ath79.c
  12 ===================================================================
  13 --- linux-5.4.22.orig/drivers/spi/spi-ath79.c
  14 +++ linux-5.4.22/drivers/spi/spi-ath79.c
  15 @@ -15,6 +15,7 @@
  16  #include <linux/platform_device.h>
  17  #include <linux/io.h>
  18  #include <linux/spi/spi.h>
  19 +#include <linux/spi/spi-mem.h>
  20  #include <linux/spi/spi_bitbang.h>
  21  #include <linux/bitops.h>
  22  #include <linux/clk.h>
  23 @@ -133,6 +134,39 @@ static u32 ath79_spi_txrx_mode0(struct s
  24         return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
  25  }
  26
  27 +static int ath79_exec_mem_op(struct spi_mem *mem,
  28 +                              const struct spi_mem_op *op)
  29 +{
  30 +       struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi);
  31 +
  32 +       /* Ensures that reading is performed on device connected
  33 +          to hardware cs0 */
  34 +       if (mem->spi->chip_select || mem->spi->cs_gpiod)
  35 +               return -ENOTSUPP;
  36 +
  37 +       /* Only use for fast-read op. */
  38 +       if (op->cmd.opcode != 0x0b || op->data.dir != SPI_MEM_DATA_IN ||
  39 +           op->addr.nbytes != 3 || op->dummy.nbytes != 1)
  40 +               return -ENOTSUPP;
  41 +
  42 +       /* disable GPIO mode */
  43 +       ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
  44 +
  45 +       memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes);
  46 +
  47 +       /* enable GPIO mode */
  48 +       ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
  49 +
  50 +       /* restore IOC register */
  51 +       ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
  52 +
  53 +       return 0;
  54 +}
  55 +
  56 +static const struct spi_controller_mem_ops ath79_mem_ops = {
  57 +       .exec_op = ath79_exec_mem_op,
  58 +};
  59 +
  60  static int ath79_spi_probe(struct platform_device *pdev)
  61  {
  62         struct spi_master *master;
  63 @@ -163,6 +197,7 @@ static int ath79_spi_probe(struct platfo
  64                 ret = PTR_ERR(sp->base);
  65                 goto err_put_master;
  66         }
  67 +       master->mem_ops = &ath79_mem_ops;
  68
  69         sp->clk = devm_clk_get(&pdev->dev, "ahb");
  70         if (IS_ERR(sp->clk)) {