c2d747348dc7c1c9bfb738f9dcc817630f87fcd7
[openwrt/openwrt.git] / target / linux / au1000 / patches-2.6.32 / 005-mtx1_fix_pci.patch
1
2
3 diff --git a/arch/mips/alchemy/mtx-1/board_setup.c
4 b/arch/mips/alchemy/mtx-1/board_setup.c
5 index 45b61c9..17140ac 100644
6 --- a/arch/mips/alchemy/mtx-1/board_setup.c
7 +++ b/arch/mips/alchemy/mtx-1/board_setup.c
8 @@ -56,8 +56,6 @@ void __init board_setup(void)
9 }
10 #endif
11
12 - alchemy_gpio2_enable();
13 -
14 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
15 /* Enable USB power switch */
16 alchemy_gpio_direction_output(204, 0);
17 @@ -92,20 +90,12 @@ void __init board_setup(void)
18 int
19 mtx1_pci_idsel(unsigned int devsel, int assert)
20 {
21 -#define MTX_IDSEL_ONLY_0_AND_3 0
22 -#if MTX_IDSEL_ONLY_0_AND_3
23 - if (devsel != 0 && devsel != 3) {
24 - printk(KERN_ERR "*** not 0 or 3\n");
25 - return 0;
26 - }
27 -#endif
28 -
29 if (assert && devsel != 0)
30 /* Suppress signal to Cardbus */
31 gpio_set_value(1, 0); /* set EXT_IO3 OFF */
32 else
33 gpio_set_value(1, 1); /* set EXT_IO3 ON */
34
35 - au_sync_udelay(1);
36 + udelay(1);
37 return 1;
38 }