target/linux/bcm27xx/patches-5.4/950-0713-vc4_hdmi-Fix-up-CEC-registers.patch

   1 From 25402f4978434949e5ea550c9b1b4a192e95fd83 Mon Sep 17 00:00:00 2001
   2 From: Dom Cobley <popcornmix@gmail.com>
   3 Date: Thu, 7 May 2020 18:16:07 +0100
   4 Subject: [PATCH] vc4_hdmi: Fix up CEC registers
   5
   6 Fix an incorrect register address, add a
   7 missing one and reorder into address order
   8
   9 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
  10 ---
  11  drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 10 ++++++----
  12  1 file changed, 6 insertions(+), 4 deletions(-)
  13
  14 --- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
  15 +++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
  16 @@ -33,11 +33,12 @@ enum vc4_hdmi_field {
  17         HDMI_CEC_CNTRL_3,
  18         HDMI_CEC_CNTRL_4,
  19         HDMI_CEC_CNTRL_5,
  20 +       HDMI_CEC_CPU_STATUS,
  21 +       HDMI_CEC_CPU_SET,
  22         HDMI_CEC_CPU_CLEAR,
  23 -       HDMI_CEC_CPU_MASK_CLEAR,
  24 -       HDMI_CEC_CPU_MASK_SET,
  25         HDMI_CEC_CPU_MASK_STATUS,
  26 -       HDMI_CEC_CPU_STATUS,
  27 +       HDMI_CEC_CPU_MASK_SET,
  28 +       HDMI_CEC_CPU_MASK_CLEAR,
  29
  30         /*
  31          * Transmit data, first byte is low byte of the 32-bit reg.
  32 @@ -205,9 +206,10 @@ static const struct vc4_hdmi_register vc
  33         VC4_HDMI_REG(HDMI_TX_PHY_RESET_CTL, 0x02c0),
  34         VC4_HDMI_REG(HDMI_TX_PHY_CTL_0, 0x02c4),
  35         VC4_HDMI_REG(HDMI_CEC_CPU_STATUS, 0x0340),
  36 +       VC4_HDMI_REG(HDMI_CEC_CPU_SET, 0x0344),
  37         VC4_HDMI_REG(HDMI_CEC_CPU_CLEAR, 0x0348),
  38         VC4_HDMI_REG(HDMI_CEC_CPU_MASK_STATUS, 0x034c),
  39 -       VC4_HDMI_REG(HDMI_CEC_CPU_MASK_SET, 0x034c),
  40 +       VC4_HDMI_REG(HDMI_CEC_CPU_MASK_SET, 0x0350),
  41         VC4_HDMI_REG(HDMI_CEC_CPU_MASK_CLEAR, 0x0354),
  42         VC4_HDMI_REG(HDMI_RAM_PACKET_START, 0x0400),
  43  };