8aa28a744ffa344f5962673f8a425c3477f56d87
[openwrt/openwrt.git] / target / linux / bcm53xx / patches-4.4 / 047-0007-ARM-dts-BCM53573-Describe-Tenda-AC9-PCIe-card-in-DT.patch
1 From 3ba1bae984e585f500b8406b1bf3e42e0ec752b7 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
3 Date: Tue, 14 Feb 2017 17:49:05 +0100
4 Subject: [PATCH] ARM: dts: BCM53573: Describe Tenda AC9 PCIe card in DT
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Tenda AC9 has PCIe controller with just one device connected to it:
10 0000:00:00.0 14e4:d145 Bridge Device
11 └─ 0000:01:00.0 14e4:a8db Network Controller
12
13 This card is directly on SoC (doesn't use physical connector) and has
14 BCM43217 chipset with bcma bus. One of its components is ChipCommon core
15 which is also a GPIO controller. We need to describe it to be able to
16 add devices using its GPIO pins.
17
18 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
19 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
20 ---
21 arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 27 +++++++++++++++++++++++++++
22 arch/arm/boot/dts/bcm53573.dtsi | 4 ++++
23 2 files changed, 31 insertions(+)
24
25 --- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
26 +++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
27 @@ -72,3 +72,30 @@
28 };
29 };
30 };
31 +
32 +&pcie0 {
33 + ranges = <0x00000000 0 0 0 0 0x00100000>;
34 + #address-cells = <3>;
35 + #size-cells = <2>;
36 +
37 + bridge@0,0,0 {
38 + reg = <0x0000 0 0 0 0>;
39 + ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
40 + #address-cells = <3>;
41 + #size-cells = <2>;
42 +
43 + wifi@0,1,0 {
44 + reg = <0x0000 0 0 0 0>;
45 + ranges = <0x00000000 0 0 0 0x00100000>;
46 + #address-cells = <1>;
47 + #size-cells = <1>;
48 +
49 + pcie0_chipcommon: chipcommon@0 {
50 + reg = <0 0x1000>;
51 +
52 + gpio-controller;
53 + #gpio-cells = <2>;
54 + };
55 + };
56 + };
57 +};
58 --- a/arch/arm/boot/dts/bcm53573.dtsi
59 +++ b/arch/arm/boot/dts/bcm53573.dtsi
60 @@ -113,6 +113,10 @@
61 };
62 };
63
64 + pcie0: pcie@2000 {
65 + reg = <0x00002000 0x1000>;
66 + };
67 +
68 usb2: usb2@4000 {
69 reg = <0x4000 0x1000>;
70 ranges;