ad34fc8484bba37f96b411c4420e5ca22f1b8210
[openwrt/openwrt.git] / target / linux / bcm53xx / patches-4.4 / 071-phy-bcm-ns-usb3-new-driver-for-USB-3.0-PHY-on-Norths.patch
1 From b8d7478ecfec51b3430f677da44e662d5ff12444 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
3 Date: Fri, 12 Aug 2016 00:28:03 +0200
4 Subject: [PATCH] phy: bcm-ns-usb3: new driver for USB 3.0 PHY on Northstar
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Northstar is a family of SoCs used in home routers. They have USB 2.0
10 and 3.0 controllers with PHYs that need to be properly initialized.
11 This driver provides PHY init support in a generic way and can be bound
12 with XHCI controller driver.
13
14 There aren't any public datasheets from Broadcom so we can't have nice
15 defines for all used bits. It means we just follow Broadcom's
16 initialization procedure using their magic values. We were quite lucky
17 actually that Broadcom put some comments in their SDK reference code
18 explaining what given writes are responsible for.
19
20 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
21 Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
22 ---
23 .../devicetree/bindings/phy/bcm-ns-usb3-phy.txt | 23 ++
24 drivers/phy/Kconfig | 9 +
25 drivers/phy/Makefile | 1 +
26 drivers/phy/phy-bcm-ns-usb3.c | 274 +++++++++++++++++++++
27 4 files changed, 307 insertions(+)
28 create mode 100644 Documentation/devicetree/bindings/phy/bcm-ns-usb3-phy.txt
29 create mode 100644 drivers/phy/phy-bcm-ns-usb3.c
30
31 --- /dev/null
32 +++ b/Documentation/devicetree/bindings/phy/bcm-ns-usb3-phy.txt
33 @@ -0,0 +1,23 @@
34 +Driver for Broadcom Northstar USB 3.0 PHY
35 +
36 +Required properties:
37 +
38 +- compatible: one of: "brcm,ns-ax-usb3-phy", "brcm,ns-bx-usb3-phy".
39 +- reg: register mappings for DMP (Device Management Plugin) and ChipCommon B
40 + MMI.
41 +- reg-names: "dmp" and "ccb-mii"
42 +
43 +Initialization of USB 3.0 PHY depends on Northstar version. There are currently
44 +three known series: Ax, Bx and Cx.
45 +Known A0: BCM4707 rev 0
46 +Known B0: BCM4707 rev 4, BCM53573 rev 2
47 +Known B1: BCM4707 rev 6
48 +Known C0: BCM47094 rev 0
49 +
50 +Example:
51 + usb3-phy {
52 + compatible = "brcm,ns-ax-usb3-phy";
53 + reg = <0x18105000 0x1000>, <0x18003000 0x1000>;
54 + reg-names = "dmp", "ccb-mii";
55 + #phy-cells = <0>;
56 + };
57 --- a/drivers/phy/Kconfig
58 +++ b/drivers/phy/Kconfig
59 @@ -24,6 +24,15 @@ config PHY_BCM_NS_USB2
60 Enable this to support Broadcom USB 2.0 PHY connected to the USB
61 controller on Northstar family.
62
63 +config PHY_BCM_NS_USB3
64 + tristate "Broadcom Northstar USB 3.0 PHY Driver"
65 + depends on ARCH_BCM_IPROC || COMPILE_TEST
66 + depends on HAS_IOMEM && OF
67 + select GENERIC_PHY
68 + help
69 + Enable this to support Broadcom USB 3.0 PHY connected to the USB
70 + controller on Northstar family.
71 +
72 config PHY_BERLIN_USB
73 tristate "Marvell Berlin USB PHY Driver"
74 depends on ARCH_BERLIN && RESET_CONTROLLER && HAS_IOMEM && OF
75 --- a/drivers/phy/Makefile
76 +++ b/drivers/phy/Makefile
77 @@ -4,6 +4,7 @@
78
79 obj-$(CONFIG_GENERIC_PHY) += phy-core.o
80 obj-$(CONFIG_PHY_BCM_NS_USB2) += phy-bcm-ns-usb2.o
81 +obj-$(CONFIG_PHY_BCM_NS_USB3) += phy-bcm-ns-usb3.o
82 obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o
83 obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
84 obj-$(CONFIG_PHY_DM816X_USB) += phy-dm816x-usb.o
85 --- /dev/null
86 +++ b/drivers/phy/phy-bcm-ns-usb3.c
87 @@ -0,0 +1,274 @@
88 +/*
89 + * Broadcom Northstar USB 3.0 PHY Driver
90 + *
91 + * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
92 + *
93 + * All magic values used for initialization (and related comments) were obtained
94 + * from Broadcom's SDK:
95 + * Copyright (c) Broadcom Corp, 2012
96 + *
97 + * This program is free software; you can redistribute it and/or modify
98 + * it under the terms of the GNU General Public License version 2 as
99 + * published by the Free Software Foundation.
100 + */
101 +
102 +#include <linux/bcma/bcma.h>
103 +#include <linux/delay.h>
104 +#include <linux/err.h>
105 +#include <linux/module.h>
106 +#include <linux/of_platform.h>
107 +#include <linux/platform_device.h>
108 +#include <linux/phy/phy.h>
109 +#include <linux/slab.h>
110 +
111 +#define BCM_NS_USB3_MII_MNG_TIMEOUT_US 1000 /* usecs */
112 +
113 +enum bcm_ns_family {
114 + BCM_NS_UNKNOWN,
115 + BCM_NS_AX,
116 + BCM_NS_BX,
117 +};
118 +
119 +struct bcm_ns_usb3 {
120 + struct device *dev;
121 + enum bcm_ns_family family;
122 + void __iomem *dmp;
123 + void __iomem *ccb_mii;
124 + struct phy *phy;
125 +};
126 +
127 +static const struct of_device_id bcm_ns_usb3_id_table[] = {
128 + {
129 + .compatible = "brcm,ns-ax-usb3-phy",
130 + .data = (int *)BCM_NS_AX,
131 + },
132 + {
133 + .compatible = "brcm,ns-bx-usb3-phy",
134 + .data = (int *)BCM_NS_BX,
135 + },
136 + {},
137 +};
138 +MODULE_DEVICE_TABLE(of, bcm_ns_usb3_id_table);
139 +
140 +static int bcm_ns_usb3_wait_reg(struct bcm_ns_usb3 *usb3, void __iomem *addr,
141 + u32 mask, u32 value, unsigned long timeout)
142 +{
143 + unsigned long deadline = jiffies + timeout;
144 + u32 val;
145 +
146 + do {
147 + val = readl(addr);
148 + if ((val & mask) == value)
149 + return 0;
150 + cpu_relax();
151 + udelay(10);
152 + } while (!time_after_eq(jiffies, deadline));
153 +
154 + dev_err(usb3->dev, "Timeout waiting for register %p\n", addr);
155 +
156 + return -EBUSY;
157 +}
158 +
159 +static inline int bcm_ns_usb3_mii_mng_wait_idle(struct bcm_ns_usb3 *usb3)
160 +{
161 + return bcm_ns_usb3_wait_reg(usb3, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL,
162 + 0x0100, 0x0000,
163 + usecs_to_jiffies(BCM_NS_USB3_MII_MNG_TIMEOUT_US));
164 +}
165 +
166 +static int bcm_ns_usb3_mii_mng_write32(struct bcm_ns_usb3 *usb3, u32 value)
167 +{
168 + int err;
169 +
170 + err = bcm_ns_usb3_mii_mng_wait_idle(usb3);
171 + if (err < 0) {
172 + dev_err(usb3->dev, "Couldn't write 0x%08x value\n", value);
173 + return err;
174 + }
175 +
176 + writel(value, usb3->ccb_mii + BCMA_CCB_MII_MNG_CMD_DATA);
177 +
178 + return 0;
179 +}
180 +
181 +static int bcm_ns_usb3_phy_init_ns_bx(struct bcm_ns_usb3 *usb3)
182 +{
183 + int err;
184 +
185 + /* Enable MDIO. Setting MDCDIV as 26 */
186 + writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL);
187 +
188 + /* Wait for MDIO? */
189 + udelay(2);
190 +
191 + /* USB3 PLL Block */
192 + err = bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8000);
193 + if (err < 0)
194 + return err;
195 +
196 + /* Assert Ana_Pllseq start */
197 + bcm_ns_usb3_mii_mng_write32(usb3, 0x58061000);
198 +
199 + /* Assert CML Divider ratio to 26 */
200 + bcm_ns_usb3_mii_mng_write32(usb3, 0x582a6400);
201 +
202 + /* Asserting PLL Reset */
203 + bcm_ns_usb3_mii_mng_write32(usb3, 0x582ec000);
204 +
205 + /* Deaaserting PLL Reset */
206 + bcm_ns_usb3_mii_mng_write32(usb3, 0x582e8000);
207 +
208 + /* Waiting MII Mgt interface idle */
209 + bcm_ns_usb3_mii_mng_wait_idle(usb3);
210 +
211 + /* Deasserting USB3 system reset */
212 + writel(0, usb3->dmp + BCMA_RESET_CTL);
213 +
214 + /* PLL frequency monitor enable */
215 + bcm_ns_usb3_mii_mng_write32(usb3, 0x58069000);
216 +
217 + /* PIPE Block */
218 + bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8060);
219 +
220 + /* CMPMAX & CMPMINTH setting */
221 + bcm_ns_usb3_mii_mng_write32(usb3, 0x580af30d);
222 +
223 + /* DEGLITCH MIN & MAX setting */
224 + bcm_ns_usb3_mii_mng_write32(usb3, 0x580e6302);
225 +
226 + /* TXPMD block */
227 + bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8040);
228 +
229 + /* Enabling SSC */
230 + bcm_ns_usb3_mii_mng_write32(usb3, 0x58061003);
231 +
232 + /* Waiting MII Mgt interface idle */
233 + bcm_ns_usb3_mii_mng_wait_idle(usb3);
234 +
235 + return 0;
236 +}
237 +
238 +static int bcm_ns_usb3_phy_init_ns_ax(struct bcm_ns_usb3 *usb3)
239 +{
240 + int err;
241 +
242 + /* Enable MDIO. Setting MDCDIV as 26 */
243 + writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL);
244 +
245 + /* Wait for MDIO? */
246 + udelay(2);
247 +
248 + /* PLL30 block */
249 + err = bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8000);
250 + if (err < 0)
251 + return err;
252 +
253 + bcm_ns_usb3_mii_mng_write32(usb3, 0x582a6400);
254 +
255 + bcm_ns_usb3_mii_mng_write32(usb3, 0x587e80e0);
256 +
257 + bcm_ns_usb3_mii_mng_write32(usb3, 0x580a009c);
258 +
259 + /* Enable SSC */
260 + bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8040);
261 +
262 + bcm_ns_usb3_mii_mng_write32(usb3, 0x580a21d3);
263 +
264 + bcm_ns_usb3_mii_mng_write32(usb3, 0x58061003);
265 +
266 + /* Waiting MII Mgt interface idle */
267 + bcm_ns_usb3_mii_mng_wait_idle(usb3);
268 +
269 + /* Deasserting USB3 system reset */
270 + writel(0, usb3->dmp + BCMA_RESET_CTL);
271 +
272 + return 0;
273 +}
274 +
275 +static int bcm_ns_usb3_phy_init(struct phy *phy)
276 +{
277 + struct bcm_ns_usb3 *usb3 = phy_get_drvdata(phy);
278 + int err;
279 +
280 + /* Perform USB3 system soft reset */
281 + writel(BCMA_RESET_CTL_RESET, usb3->dmp + BCMA_RESET_CTL);
282 +
283 + switch (usb3->family) {
284 + case BCM_NS_AX:
285 + err = bcm_ns_usb3_phy_init_ns_ax(usb3);
286 + break;
287 + case BCM_NS_BX:
288 + err = bcm_ns_usb3_phy_init_ns_bx(usb3);
289 + break;
290 + default:
291 + WARN_ON(1);
292 + err = -ENOTSUPP;
293 + }
294 +
295 + return err;
296 +}
297 +
298 +static const struct phy_ops ops = {
299 + .init = bcm_ns_usb3_phy_init,
300 + .owner = THIS_MODULE,
301 +};
302 +
303 +static int bcm_ns_usb3_probe(struct platform_device *pdev)
304 +{
305 + struct device *dev = &pdev->dev;
306 + const struct of_device_id *of_id;
307 + struct bcm_ns_usb3 *usb3;
308 + struct resource *res;
309 + struct phy_provider *phy_provider;
310 +
311 + usb3 = devm_kzalloc(dev, sizeof(*usb3), GFP_KERNEL);
312 + if (!usb3)
313 + return -ENOMEM;
314 +
315 + usb3->dev = dev;
316 +
317 + of_id = of_match_device(bcm_ns_usb3_id_table, dev);
318 + if (!of_id)
319 + return -EINVAL;
320 + usb3->family = (enum bcm_ns_family)of_id->data;
321 +
322 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmp");
323 + usb3->dmp = devm_ioremap_resource(dev, res);
324 + if (IS_ERR(usb3->dmp)) {
325 + dev_err(dev, "Failed to map DMP regs\n");
326 + return PTR_ERR(usb3->dmp);
327 + }
328 +
329 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ccb-mii");
330 + usb3->ccb_mii = devm_ioremap_resource(dev, res);
331 + if (IS_ERR(usb3->ccb_mii)) {
332 + dev_err(dev, "Failed to map ChipCommon B MII regs\n");
333 + return PTR_ERR(usb3->ccb_mii);
334 + }
335 +
336 + usb3->phy = devm_phy_create(dev, NULL, &ops);
337 + if (IS_ERR(usb3->phy)) {
338 + dev_err(dev, "Failed to create PHY\n");
339 + return PTR_ERR(usb3->phy);
340 + }
341 +
342 + phy_set_drvdata(usb3->phy, usb3);
343 + platform_set_drvdata(pdev, usb3);
344 +
345 + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
346 + if (!IS_ERR(phy_provider))
347 + dev_info(dev, "Registered Broadcom Northstar USB 3.0 PHY driver\n");
348 +
349 + return PTR_ERR_OR_ZERO(phy_provider);
350 +}
351 +
352 +static struct platform_driver bcm_ns_usb3_driver = {
353 + .probe = bcm_ns_usb3_probe,
354 + .driver = {
355 + .name = "bcm_ns_usb3",
356 + .of_match_table = bcm_ns_usb3_id_table,
357 + },
358 +};
359 +module_platform_driver(bcm_ns_usb3_driver);
360 +
361 +MODULE_LICENSE("GPL v2");