brcm63xx: rename target to bcm63xx
[openwrt/openwrt.git] / target / linux / bcm63xx / dts / bcm3368.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm3368";
5
6 aliases {
7 pflash = &pflash;
8 gpio0 = &gpio0;
9 gpio1 = &gpio1;
10 serial0 = &uart0;
11 serial1 = &uart1;
12 spi0 = &lsspi;
13 };
14
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu@0 {
20 compatible = "brcm,bmips4350", "mips,mips4Kc";
21 device_type = "cpu";
22 reg = <0>;
23 };
24
25 cpu@1 {
26 compatible = "brcm,bmips4350", "mips,mips4Kc";
27 device_type = "cpu";
28 reg = <1>;
29 };
30 };
31
32 cpu_intc: interrupt-controller {
33 #address-cells = <0>;
34 compatible = "mti,cpu-interrupt-controller";
35
36 interrupt-controller;
37 #interrupt-cells = <1>;
38 };
39
40 memory { device_type = "memory"; reg = <0 0>; };
41
42 pflash: nor@1e000000 {
43 compatible = "cfi-flash";
44 reg = <0x1e000000 0x2000000>;
45 bank-width = <2>;
46 #address-cells = <1>;
47 #size-cells = <1>;
48
49 status = "disabled";
50 };
51
52 ubus@fff00000 {
53 #address-cells = <1>;
54 #size-cells = <1>;
55 ranges;
56 compatible = "simple-bus";
57 interrupt-parent = <&periph_intc>;
58
59 periph_intc: interrupt-controller@fff8c00c {
60 compatible = "brcm,bcm6345-l1-intc";
61 reg = <0xfff8c00c 0x8>;
62
63 interrupt-controller;
64 #interrupt-cells = <1>;
65
66 interrupt-parent = <&cpu_intc>;
67 interrupts = <2>;
68 };
69
70 ext_intc0: interrupt-controller@fff8c014 {
71 compatible = "brcm,bcm6345-ext-intc";
72 reg = <0xfff8c014 0x4>;
73
74 interrupt-controller;
75 #interrupt-cells = <2>;
76
77 interrupts = <25>, <26>, <27>, <28>;
78 };
79
80 gpio1: gpio-controller@fff8c080 {
81 compatible = "brcm,bcm6345-gpio";
82 reg = <0xfff8c080 4>, <0xfff8c088 4>;
83
84 gpio-controller;
85 #gpio-cells = <2>;
86
87 ngpios = <8>;
88 };
89
90 gpio0: gpio-controller@fff8c084 {
91 compatible = "brcm,bcm6345-gpio";
92 reg = <0xfff8c084 4>, <0xfff8c08c 4>;
93
94 gpio-controller;
95 #gpio-cells = <2>;
96 };
97
98 uart0: serial@fff8c100 {
99 compatible = "brcm,bcm6345-uart";
100 reg = <0xfff8c100 0x18>;
101
102 interrupt-parent = <&periph_intc>;
103 interrupts = <2>;
104
105 /* clocks = <&periph_clk>; */
106 /* clock-names = "refclk"; */
107
108 status = "disabled";
109 };
110
111 uart1: serial@fff8c120 {
112 compatible = "brcm,bcm6345-uart";
113 reg = <0xfff8c120 0x18>;
114
115 interrupt-parent = <&periph_intc>;
116 interrupts = <3>;
117
118 /* clocks = <&periph_clk>; */
119 /* clock-names = "refclk"; */
120
121 status = "disabled";
122 };
123
124 lsspi: spi@fff8c800 {
125 #address-cells = <1>;
126 #size-cells = <0>;
127 compatible = "brcm,bcm6358-spi";
128 reg = <0xfff8c800 0x70c>;
129 interrupts = <1>;
130 /* clocks = <&clkctl 9>; */
131 };
132 };
133 };