bmips: add new target
[openwrt/openwrt.git] / target / linux / bmips / dts / bcm6318.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6318-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6318-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6318-reset.h>
10 #include <dt-bindings/soc/bcm6318-pm.h>
11
12 / {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "brcm,bcm6318";
16
17 aliases {
18 pinctrl = &pinctrl;
19 serial0 = &uart0;
20 spi1 = &hsspi;
21 };
22
23 chosen {
24 bootargs = "console=ttyS0,115200n8 earlycon";
25 stdout-path = "serial0:115200n8";
26 };
27
28 clocks {
29 periph_osc: periph-osc {
30 compatible = "fixed-clock";
31
32 #clock-cells = <0>;
33
34 clock-frequency = <50000000>;
35 clock-output-names = "periph";
36 };
37
38 hsspi_osc: hsspi-osc {
39 compatible = "fixed-clock";
40
41 #clock-cells = <0>;
42
43 clock-frequency = <250000000>;
44 clock-output-names = "hsspi_osc";
45 };
46 };
47
48 cpus {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 mips-hpt-frequency = <166500000>;
52
53 cpu@0 {
54 compatible = "brcm,bmips3300", "mips,mips4Kc";
55 device_type = "cpu";
56 reg = <0>;
57 };
58 };
59
60 cpu_intc: interrupt-controller {
61 #address-cells = <0>;
62 compatible = "mti,cpu-interrupt-controller";
63
64 interrupt-controller;
65 #interrupt-cells = <1>;
66 };
67
68 memory@0 {
69 device_type = "memory";
70 reg = <0 0>;
71 };
72
73 ubus {
74 #address-cells = <1>;
75 #size-cells = <1>;
76
77 compatible = "simple-bus";
78 ranges;
79
80 periph_clk: clock-controller@10000004 {
81 compatible = "brcm,bcm6318-clocks";
82 reg = <0x10000004 0x4>;
83 #clock-cells = <1>;
84 };
85
86 ubus_clk: clock-controller@10000008 {
87 compatible = "brcm,bcm6318-ubus-clocks";
88 reg = <0x10000008 0x4>;
89 #clock-cells = <1>;
90 };
91
92 periph_rst: reset-controller@10000010 {
93 compatible = "brcm,bcm6345-reset";
94 reg = <0x10000010 0x4>;
95 #reset-cells = <1>;
96 };
97
98 ext_intc: interrupt-controller@10000018 {
99 #address-cells = <1>;
100 compatible = "brcm,bcm6318-ext-intc";
101 reg = <0x10000018 0x4>;
102
103 interrupt-controller;
104 #interrupt-cells = <2>;
105
106 interrupts = <BCM6318_IRQ_EXT0>,
107 <BCM6318_IRQ_EXT1>,
108 <BCM6318_IRQ_EXT2>,
109 <BCM6318_IRQ_EXT3>;
110 };
111
112 periph_intc: interrupt-controller@10000020 {
113 #address-cells = <1>;
114 compatible = "brcm,bcm6345-l1-intc";
115 reg = <0x10000020 0x20>;
116
117 interrupt-controller;
118 #interrupt-cells = <1>;
119
120 interrupt-parent = <&cpu_intc>;
121 interrupts = <2>, <3>;
122 };
123
124 wdt: watchdog@10000068 {
125 compatible = "brcm,bcm7038-wdt";
126 reg = <0x10000068 0xc>;
127
128 clocks = <&periph_osc>;
129
130 timeout-sec = <30>;
131 };
132
133 pll_cntl: syscon@10000074 {
134 compatible = "syscon";
135 reg = <0x10000074 0x4>;
136 native-endian;
137 };
138
139 syscon-reboot {
140 compatible = "syscon-reboot";
141 regmap = <&pll_cntl>;
142 offset = <0>;
143 mask = <0x1>;
144 };
145
146 pinctrl: pin-controller@10000080 {
147 compatible = "brcm,bcm6318-pinctrl";
148 reg = <0x10000080 0x08>,
149 <0x10000088 0x08>,
150 <0x10000098 0x04>,
151 <0x1000009c 0x0c>,
152 <0x100000d4 0x18>;
153 reg-names = "dirout", "dat", "mode", "mux", "pad";
154
155 gpio-controller;
156 #gpio-cells = <2>;
157
158 interrupt-parent = <&ext_intc>;
159 interrupts = <0 0>, <1 0>;
160 interrupt-names = "gpio33", "gpio34";
161
162 pinctrl_ephy0_spd_led: ephy0_spd_led {
163 function = "ephy0_spd_led";
164 pins = "gpio0";
165 };
166
167 pinctrl_ephy1_spd_led: ephy1_spd_led {
168 function = "ephy1_spd_led";
169 pins = "gpio1";
170 };
171
172 pinctrl_ephy2_spd_led: ephy2_spd_led {
173 function = "ephy2_spd_led";
174 pins = "gpio2";
175 };
176
177 pinctrl_ephy3_spd_led: ephy3_spd_led {
178 function = "ephy3_spd_led";
179 pins = "gpio3";
180 };
181
182 pinctrl_ephy0_act_led: ephy0_act_led {
183 function = "ephy0_act_led";
184 pins = "gpio4";
185 };
186
187 pinctrl_ephy1_act_led: ephy1_act_led {
188 function = "ephy1_act_led";
189 pins = "gpio5";
190 };
191
192 pinctrl_ephy2_act_led: ephy2_act_led {
193 function = "ephy2_act_led";
194 pins = "gpio6";
195 };
196
197 pinctrl_ephy3_act_led: ephy3_act_led {
198 function = "ephy3_act_led";
199 pins = "gpio7";
200 };
201
202 pinctrl_serial_led: serial_led {
203 pinctrl_serial_led_data: serial_led_data {
204 function = "serial_led_data";
205 pins = "gpio6";
206 };
207
208 pinctrl_serial_led_clk: serial_led_clk {
209 function = "serial_led_clk";
210 pins = "gpio7";
211 };
212 };
213
214 pinctrl_inet_act_led: inet_act_led {
215 function = "inet_act_led";
216 pins = "gpio8";
217 };
218
219 pinctrl_inet_fail_led: inet_fail_led {
220 function = "inet_fail_led";
221 pins = "gpio9";
222 };
223
224 pinctrl_dsl_led: dsl_led {
225 function = "dsl_led";
226 pins = "gpio10";
227 };
228
229 pinctrl_post_fail_led: post_fail_led {
230 function = "post_fail_led";
231 pins = "gpio11";
232 };
233
234 pinctrl_wlan_wps_led: wlan_wps_led {
235 function = "wlan_wps_led";
236 pins = "gpio12";
237 };
238
239 pinctrl_usb_pwron: usb_pwron {
240 function = "usb_pwron";
241 pins = "gpio13";
242 };
243
244 pinctrl_usb_device_led: usb_device_led {
245 function = "usb_device_led";
246 pins = "gpio13";
247 };
248
249 pinctrl_usb_active: usb_active {
250 function = "usb_active";
251 pins = "gpio40";
252 };
253 };
254
255 uart0: serial@10000100 {
256 compatible = "brcm,bcm6345-uart";
257 reg = <0x10000100 0x18>;
258
259 interrupt-parent = <&periph_intc>;
260 interrupts = <BCM6318_IRQ_UART0>;
261
262 clocks = <&periph_osc>;
263 clock-names = "periph";
264
265 status = "disabled";
266 };
267
268 leds: led-controller@10000200 {
269 #address-cells = <1>;
270 #size-cells = <0>;
271 compatible = "brcm,bcm6328-leds";
272 reg = <0x10000200 0x24>;
273
274 status = "disabled";
275 };
276
277 periph_pwr: power-controller@100008e8 {
278 compatible = "brcm,bcm6318-power-controller";
279 reg = <0x100008e8 0x4>;
280
281 #power-domain-cells = <1>;
282 };
283
284 hsspi: spi@10003000 {
285 compatible = "brcm,bcm6328-hsspi";
286 reg = <0x10003000 0x600>;
287 #address-cells = <1>;
288 #size-cells = <0>;
289
290 interrupt-parent = <&periph_intc>;
291 interrupts = <BCM6318_IRQ_HSSPI>;
292
293 clocks = <&periph_clk BCM6318_CLK_HSSPI>,
294 <&hsspi_osc>;
295 clock-names = "hsspi",
296 "pll";
297
298 resets = <&periph_rst BCM6318_RST_SPI>;
299
300 status = "disabled";
301 };
302
303 ehci: usb@10005000 {
304 compatible = "brcm,bcm6318-ehci", "generic-ehci";
305 reg = <0x10005000 0x100>;
306 big-endian;
307 ignore-oc;
308
309 interrupt-parent = <&periph_intc>;
310 interrupts = <BCM6318_IRQ_EHCI>;
311
312 phys = <&usbh 0>;
313 phy-names = "usb";
314
315 status = "disabled";
316 };
317
318 ohci: usb@10005100 {
319 compatible = "brcm,bcm6318-ohci", "generic-ohci";
320 reg = <0x10005100 0x100>;
321 big-endian;
322 no-big-frame-no;
323
324 interrupt-parent = <&periph_intc>;
325 interrupts = <BCM6318_IRQ_OHCI>;
326
327 phys = <&usbh 0>;
328 phy-names = "usb";
329
330 status = "disabled";
331 };
332
333 usbh: usb-phy@10005200 {
334 compatible = "brcm,bcm6318-usbh-phy";
335 reg = <0x10005200 0x38>;
336
337 #phy-cells = <1>;
338
339 clocks = <&periph_clk BCM6318_CLK_USBD>,
340 <&ubus_clk BCM6318_UCLK_USB>;
341 clock-names = "usbh",
342 "usb_ref";
343
344 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_USB>;
345 resets = <&periph_rst BCM6318_RST_USBH>;
346
347 status = "disabled";
348 };
349 };
350 };