target/linux/brcm2708/patches-3.18/0058-MMC-added-alternative-MMC-driver.patch

   1 From 7da0618348811dbb38825457f63e12d3b8ba943f Mon Sep 17 00:00:00 2001
   2 From: gellert <gellert@raspberrypi.org>
   3 Date: Fri, 15 Aug 2014 16:35:06 +0100
   4 Subject: [PATCH 058/114] MMC: added alternative MMC driver
   5
   6 ---
   7  arch/arm/configs/bcmrpi_defconfig |    2 +
   8  arch/arm/mach-bcm2708/bcm2708.c   |   31 +
   9  drivers/mmc/host/Kconfig          |   40 +-
  10  drivers/mmc/host/Makefile         |    1 +
  11  drivers/mmc/host/bcm2835-mmc.c    | 1557 +++++++++++++++++++++++++++++++++++++
  12  5 files changed, 1620 insertions(+), 11 deletions(-)
  13  create mode 100644 drivers/mmc/host/bcm2835-mmc.c
  14
  15 --- a/arch/arm/configs/bcmrpi_defconfig
  16 +++ b/arch/arm/configs/bcmrpi_defconfig
  17 @@ -908,6 +908,8 @@ CONFIG_MMC=y
  18  CONFIG_MMC_BLOCK_MINORS=32
  19  CONFIG_MMC_SDHCI=y
  20  CONFIG_MMC_SDHCI_PLTFM=y
  21 +CONFIG_MMC_BCM2835=y
  22 +CONFIG_MMC_BCM2835_DMA=y
  23  CONFIG_MMC_SPI=m
  24  CONFIG_LEDS_CLASS=y
  25  CONFIG_LEDS_GPIO=y
  26 --- a/arch/arm/mach-bcm2708/bcm2708.c
  27 +++ b/arch/arm/mach-bcm2708/bcm2708.c
  28 @@ -414,6 +414,34 @@ static struct platform_device bcm2708_sy
  29                 },
  30  };
  31
  32 +#ifdef CONFIG_MMC_BCM2835      /* Arasan emmc SD (new) */
  33 +static struct resource bcm2835_emmc_resources[] = {
  34 +       [0] = {
  35 +              .start = EMMC_BASE,
  36 +              .end = EMMC_BASE + SZ_256 - 1,   /* we only need this area */
  37 +              /* the memory map actually makes SZ_4K available  */
  38 +              .flags = IORESOURCE_MEM,
  39 +              },
  40 +       [1] = {
  41 +              .start = IRQ_ARASANSDIO,
  42 +              .end = IRQ_ARASANSDIO,
  43 +              .flags = IORESOURCE_IRQ,
  44 +              },
  45 +};
  46 +
  47 +static u64 bcm2835_emmc_dmamask = 0xffffffffUL;
  48 +
  49 +struct platform_device bcm2835_emmc_device = {
  50 +       .name = "mmc-bcm2835",
  51 +       .id = 0,
  52 +       .num_resources = ARRAY_SIZE(bcm2835_emmc_resources),
  53 +       .resource = bcm2835_emmc_resources,
  54 +       .dev = {
  55 +               .dma_mask = &bcm2835_emmc_dmamask,
  56 +               .coherent_dma_mask = 0xffffffffUL},
  57 +};
  58 +#endif /* CONFIG_MMC_BCM2835 */
  59 +
  60  static struct resource bcm2708_powerman_resources[] = {
  61         [0] = {
  62                .start = PM_BASE,
  63 @@ -794,6 +822,9 @@ void __init bcm2708_init(void)
  64         bcm_register_device(&bcm2708_uart1_device);
  65         bcm_register_device(&bcm2708_powerman_device);
  66
  67 +#ifdef CONFIG_MMC_BCM2835
  68 +       bcm_register_device(&bcm2835_emmc_device);
  69 +#endif
  70         bcm2708_init_led();
  71         for (i = 0; i < ARRAY_SIZE(bcm2708_alsa_devices); i++)
  72                 bcm_register_device(&bcm2708_alsa_devices[i]);
  73 --- a/drivers/mmc/host/Kconfig
  74 +++ b/drivers/mmc/host/Kconfig
  75 @@ -281,17 +281,6 @@ config MMC_SDHCI_BCM_KONA
  76
  77           If you have a controller with this interface, say Y or M here.
  78
  79 -config MMC_SDHCI_BCM2835
  80 -       tristate "SDHCI platform support for the BCM2835 SD/MMC Controller"
  81 -       depends on ARCH_BCM2835
  82 -       depends on MMC_SDHCI_PLTFM
  83 -       select MMC_SDHCI_IO_ACCESSORS
  84 -       help
  85 -         This selects the BCM2835 SD/MMC controller. If you have a BCM2835
  86 -         platform with SD or MMC devices, say Y or M here.
  87 -
  88 -         If unsure, say N.
  89 -
  90  config MMC_MOXART
  91         tristate "MOXART SD/MMC Host Controller support"
  92         depends on ARCH_MOXART && MMC
  93 @@ -313,6 +302,35 @@ config MMC_SDHCI_ST
  94           If you have a controller with this interface, say Y or M here.
  95           If unsure, say N.
  96
  97 +config MMC_BCM2835
  98 +       tristate "MMC support on BCM2835"
  99 +       depends on MACH_BCM2708
 100 +       help
 101 +         This selects the MMC Interface on BCM2835.
 102 +
 103 +         If you have a controller with this interface, say Y or M here.
 104 +
 105 +         If unsure, say N.
 106 +
 107 +config MMC_BCM2835_DMA
 108 +       bool "DMA support on BCM2835 Arasan controller"
 109 +       depends on MMC_BCM2835
 110 +       help
 111 +         Enable DMA support on the Arasan SDHCI controller in Broadcom 2708
 112 +         based chips.
 113 +
 114 +         If unsure, say N.
 115 +
 116 +config MMC_BCM2835_PIO_DMA_BARRIER
 117 +       int "Block count limit for PIO transfers"
 118 +       depends on MMC_BCM2835 && MMC_BCM2835_DMA
 119 +       range 0 256
 120 +       default 2
 121 +       help
 122 +         The inclusive limit in bytes under which PIO will be used instead of DMA
 123 +
 124 +         If unsure, say 2 here.
 125 +
 126  config MMC_OMAP
 127         tristate "TI OMAP Multimedia Card Interface support"
 128         depends on ARCH_OMAP
 129 --- a/drivers/mmc/host/Makefile
 130 +++ b/drivers/mmc/host/Makefile
 131 @@ -17,6 +17,7 @@ obj-$(CONFIG_MMC_SDHCI_PXAV2) += sdhci-p
 132  obj-$(CONFIG_MMC_SDHCI_S3C)    += sdhci-s3c.o
 133  obj-$(CONFIG_MMC_SDHCI_SIRF)           += sdhci-sirf.o
 134  obj-$(CONFIG_MMC_SDHCI_SPEAR)  += sdhci-spear.o
 135 +obj-$(CONFIG_MMC_BCM2835)      += bcm2835-mmc.o
 136  obj-$(CONFIG_MMC_WBSD)         += wbsd.o
 137  obj-$(CONFIG_MMC_AU1X)         += au1xmmc.o
 138  obj-$(CONFIG_MMC_OMAP)         += omap.o
 139 --- /dev/null
 140 +++ b/drivers/mmc/host/bcm2835-mmc.c
 141 @@ -0,0 +1,1557 @@
 142 +/*
 143 + * BCM2835 MMC host driver.
 144 + *
 145 + * Author:      Gellert Weisz <gellert@raspberrypi.org>
 146 + *              Copyright 2014
 147 + *
 148 + * Based on
 149 + *  sdhci-bcm2708.c by Broadcom
 150 + *  sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
 151 + *  sdhci.c and sdhci-pci.c by Pierre Ossman
 152 + *
 153 + * This program is free software; you can redistribute it and/or modify it
 154 + * under the terms and conditions of the GNU General Public License,
 155 + * version 2, as published by the Free Software Foundation.
 156 + *
 157 + * This program is distributed in the hope it will be useful, but WITHOUT
 158 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 159 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 160 + * more details.
 161 + *
 162 + * You should have received a copy of the GNU General Public License
 163 + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 164 + */
 165 +
 166 +#include <linux/delay.h>
 167 +#include <linux/module.h>
 168 +#include <linux/io.h>
 169 +#include <linux/mmc/mmc.h>
 170 +#include <linux/mmc/host.h>
 171 +#include <linux/mmc/sd.h>
 172 +#include <linux/scatterlist.h>
 173 +#include <linux/of_address.h>
 174 +#include <linux/of_irq.h>
 175 +#include <linux/clk.h>
 176 +#include <linux/platform_device.h>
 177 +#include <linux/err.h>
 178 +#include <linux/blkdev.h>
 179 +#include <linux/dmaengine.h>
 180 +#include <linux/dma-mapping.h>
 181 +#include <linux/of_dma.h>
 182 +
 183 +#include "sdhci.h"
 184 +
 185 +
 186 +#ifndef CONFIG_OF
 187 + #define BCM2835_CLOCK_FREQ 250000000
 188 +#endif
 189 +
 190 +#define DRIVER_NAME "mmc-bcm2835"
 191 +
 192 +#define DBG(f, x...) \
 193 +pr_debug(DRIVER_NAME " [%s()]: " f, __func__, ## x)
 194 +
 195 +#ifndef CONFIG_MMC_BCM2835_DMA
 196 + #define FORCE_PIO
 197 +#endif
 198 +
 199 +
 200 +/* the inclusive limit in bytes under which PIO will be used instead of DMA */
 201 +#ifdef CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
 202 +#define PIO_DMA_BARRIER CONFIG_MMC_BCM2835_PIO_DMA_BARRIER
 203 +#else
 204 +#define PIO_DMA_BARRIER 00
 205 +#endif
 206 +
 207 +#define MIN_FREQ 400000
 208 +#define TIMEOUT_VAL 0xE
 209 +#define BCM2835_SDHCI_WRITE_DELAY(f)   (((2 * 1000000) / f) + 1)
 210 +
 211 +#ifndef BCM2708_PERI_BASE
 212 + #define BCM2708_PERI_BASE 0x20000000
 213 +#endif
 214 +
 215 +/* FIXME: Needs IOMMU support */
 216 +#define BCM2835_VCMMU_SHIFT            (0x7E000000 - BCM2708_PERI_BASE)
 217 +
 218 +
 219 +struct bcm2835_host {
 220 +       spinlock_t                              lock;
 221 +
 222 +       void __iomem                    *ioaddr;
 223 +       u32                                             phys_addr;
 224 +
 225 +       struct mmc_host                 *mmc;
 226 +
 227 +       u32                                             timeout;
 228 +
 229 +       int                                             clock;  /* Current clock speed */
 230 +       u8                                              pwr;    /* Current voltage */
 231 +
 232 +       unsigned int                    max_clk;                /* Max possible freq */
 233 +       unsigned int                    timeout_clk;    /* Timeout freq (KHz) */
 234 +       unsigned int                    clk_mul;                /* Clock Muliplier value */
 235 +
 236 +       struct tasklet_struct   finish_tasklet;         /* Tasklet structures */
 237 +
 238 +       struct timer_list               timer;                  /* Timer for timeouts */
 239 +
 240 +       struct sg_mapping_iter  sg_miter;               /* SG state for PIO */
 241 +       unsigned int                    blocks;                 /* remaining PIO blocks */
 242 +
 243 +       int                                             irq;                    /* Device IRQ */
 244 +
 245 +
 246 +       u32                                             ier;                    /* cached registers */
 247 +
 248 +       struct mmc_request              *mrq;                   /* Current request */
 249 +       struct mmc_command              *cmd;                   /* Current command */
 250 +       struct mmc_data                 *data;                  /* Current data request */
 251 +       unsigned int                    data_early:1;           /* Data finished before cmd */
 252 +
 253 +       wait_queue_head_t               buf_ready_int;          /* Waitqueue for Buffer Read Ready interrupt */
 254 +
 255 +       u32                                             thread_isr;
 256 +
 257 +       u32                                             shadow;
 258 +
 259 +       /*DMA part*/
 260 +       struct dma_chan                 *dma_chan_rx;           /* DMA channel for reads */
 261 +       struct dma_chan                 *dma_chan_tx;           /* DMA channel for writes */
 262 +       struct dma_async_tx_descriptor  *tx_desc;       /* descriptor */
 263 +
 264 +       bool                                    have_dma;
 265 +       bool                                    use_dma;
 266 +       /*end of DMA part*/
 267 +
 268 +       int                                             max_delay;      /* maximum length of time spent waiting */
 269 +
 270 +       int                                             flags;                          /* Host attributes */
 271 +#define SDHCI_USE_SDMA         (1<<0)  /* Host is SDMA capable */
 272 +#define SDHCI_USE_ADMA         (1<<1)  /* Host is ADMA capable */
 273 +#define SDHCI_REQ_USE_DMA      (1<<2)  /* Use DMA for this req. */
 274 +#define SDHCI_DEVICE_DEAD      (1<<3)  /* Device unresponsive */
 275 +#define SDHCI_AUTO_CMD12       (1<<6)  /* Auto CMD12 support */
 276 +#define SDHCI_AUTO_CMD23       (1<<7)  /* Auto CMD23 support */
 277 +#define SDHCI_PV_ENABLED       (1<<8)  /* Preset value enabled */
 278 +#define SDHCI_SDIO_IRQ_ENABLED (1<<9)  /* SDIO irq enabled */
 279 +#define SDHCI_USE_PLATDMA       (1<<12) /* Host uses 3rd party DMA */
 280 +};
 281 +
 282 +
 283 +static inline void bcm2835_mmc_writel(struct bcm2835_host *host, u32 val, int reg)
 284 +{
 285 +       writel(val, host->ioaddr + reg);
 286 +       udelay(BCM2835_SDHCI_WRITE_DELAY(max(host->clock, MIN_FREQ)));
 287 +}
 288 +
 289 +static inline void mmc_raw_writel(struct bcm2835_host *host, u32 val, int reg)
 290 +{
 291 +       writel(val, host->ioaddr + reg);
 292 +}
 293 +
 294 +static inline u32 bcm2835_mmc_readl(struct bcm2835_host *host, int reg)
 295 +{
 296 +       return readl(host->ioaddr + reg);
 297 +}
 298 +
 299 +static inline void bcm2835_mmc_writew(struct bcm2835_host *host, u16 val, int reg)
 300 +{
 301 +       u32 oldval = (reg == SDHCI_COMMAND) ? host->shadow :
 302 +               bcm2835_mmc_readl(host, reg & ~3);
 303 +       u32 word_num = (reg >> 1) & 1;
 304 +       u32 word_shift = word_num * 16;
 305 +       u32 mask = 0xffff << word_shift;
 306 +       u32 newval = (oldval & ~mask) | (val << word_shift);
 307 +
 308 +       if (reg == SDHCI_TRANSFER_MODE)
 309 +               host->shadow = newval;
 310 +       else
 311 +               bcm2835_mmc_writel(host, newval, reg & ~3);
 312 +
 313 +}
 314 +
 315 +static inline void bcm2835_mmc_writeb(struct bcm2835_host *host, u8 val, int reg)
 316 +{
 317 +       u32 oldval = bcm2835_mmc_readl(host, reg & ~3);
 318 +       u32 byte_num = reg & 3;
 319 +       u32 byte_shift = byte_num * 8;
 320 +       u32 mask = 0xff << byte_shift;
 321 +       u32 newval = (oldval & ~mask) | (val << byte_shift);
 322 +
 323 +       bcm2835_mmc_writel(host, newval, reg & ~3);
 324 +}
 325 +
 326 +
 327 +static inline u16 bcm2835_mmc_readw(struct bcm2835_host *host, int reg)
 328 +{
 329 +       u32 val = bcm2835_mmc_readl(host, (reg & ~3));
 330 +       u32 word_num = (reg >> 1) & 1;
 331 +       u32 word_shift = word_num * 16;
 332 +       u32 word = (val >> word_shift) & 0xffff;
 333 +
 334 +       return word;
 335 +}
 336 +
 337 +static inline u8 bcm2835_mmc_readb(struct bcm2835_host *host, int reg)
 338 +{
 339 +       u32 val = bcm2835_mmc_readl(host, (reg & ~3));
 340 +       u32 byte_num = reg & 3;
 341 +       u32 byte_shift = byte_num * 8;
 342 +       u32 byte = (val >> byte_shift) & 0xff;
 343 +
 344 +       return byte;
 345 +}
 346 +
 347 +static void bcm2835_mmc_unsignal_irqs(struct bcm2835_host *host, u32 clear)
 348 +{
 349 +       u32 ier;
 350 +
 351 +       ier = bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE);
 352 +       ier &= ~clear;
 353 +       /* change which requests generate IRQs - makes no difference to
 354 +          the content of SDHCI_INT_STATUS, or the need to acknowledge IRQs */
 355 +       bcm2835_mmc_writel(host, ier, SDHCI_SIGNAL_ENABLE);
 356 +}
 357 +
 358 +
 359 +static void bcm2835_mmc_dumpregs(struct bcm2835_host *host)
 360 +{
 361 +       pr_debug(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n",
 362 +               mmc_hostname(host->mmc));
 363 +
 364 +       pr_debug(DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
 365 +               bcm2835_mmc_readl(host, SDHCI_DMA_ADDRESS),
 366 +               bcm2835_mmc_readw(host, SDHCI_HOST_VERSION));
 367 +       pr_debug(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
 368 +               bcm2835_mmc_readw(host, SDHCI_BLOCK_SIZE),
 369 +               bcm2835_mmc_readw(host, SDHCI_BLOCK_COUNT));
 370 +       pr_debug(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
 371 +               bcm2835_mmc_readl(host, SDHCI_ARGUMENT),
 372 +               bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE));
 373 +       pr_debug(DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
 374 +               bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE),
 375 +               bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL));
 376 +       pr_debug(DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
 377 +               bcm2835_mmc_readb(host, SDHCI_POWER_CONTROL),
 378 +               bcm2835_mmc_readb(host, SDHCI_BLOCK_GAP_CONTROL));
 379 +       pr_debug(DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
 380 +               bcm2835_mmc_readb(host, SDHCI_WAKE_UP_CONTROL),
 381 +               bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL));
 382 +       pr_debug(DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
 383 +               bcm2835_mmc_readb(host, SDHCI_TIMEOUT_CONTROL),
 384 +               bcm2835_mmc_readl(host, SDHCI_INT_STATUS));
 385 +       pr_debug(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
 386 +               bcm2835_mmc_readl(host, SDHCI_INT_ENABLE),
 387 +               bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE));
 388 +       pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
 389 +               bcm2835_mmc_readw(host, SDHCI_ACMD12_ERR),
 390 +               bcm2835_mmc_readw(host, SDHCI_SLOT_INT_STATUS));
 391 +       pr_debug(DRIVER_NAME ": Caps:     0x%08x | Caps_1:   0x%08x\n",
 392 +               bcm2835_mmc_readl(host, SDHCI_CAPABILITIES),
 393 +               bcm2835_mmc_readl(host, SDHCI_CAPABILITIES_1));
 394 +       pr_debug(DRIVER_NAME ": Cmd:      0x%08x | Max curr: 0x%08x\n",
 395 +               bcm2835_mmc_readw(host, SDHCI_COMMAND),
 396 +               bcm2835_mmc_readl(host, SDHCI_MAX_CURRENT));
 397 +       pr_debug(DRIVER_NAME ": Host ctl2: 0x%08x\n",
 398 +               bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2));
 399 +
 400 +       pr_debug(DRIVER_NAME ": ===========================================\n");
 401 +}
 402 +
 403 +
 404 +static void bcm2835_mmc_reset(struct bcm2835_host *host, u8 mask)
 405 +{
 406 +       unsigned long timeout;
 407 +
 408 +       bcm2835_mmc_writeb(host, mask, SDHCI_SOFTWARE_RESET);
 409 +
 410 +       if (mask & SDHCI_RESET_ALL)
 411 +               host->clock = 0;
 412 +
 413 +       /* Wait max 100 ms */
 414 +       timeout = 100;
 415 +
 416 +       /* hw clears the bit when it's done */
 417 +       while (bcm2835_mmc_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
 418 +               if (timeout == 0) {
 419 +                       pr_err("%s: Reset 0x%x never completed.\n",
 420 +                               mmc_hostname(host->mmc), (int)mask);
 421 +                       bcm2835_mmc_dumpregs(host);
 422 +                       return;
 423 +               }
 424 +               timeout--;
 425 +               mdelay(1);
 426 +       }
 427 +
 428 +       if (100-timeout > 10 && 100-timeout > host->max_delay) {
 429 +               host->max_delay = 100-timeout;
 430 +               pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
 431 +       }
 432 +}
 433 +
 434 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
 435 +
 436 +static void bcm2835_mmc_init(struct bcm2835_host *host, int soft)
 437 +{
 438 +       if (soft)
 439 +               bcm2835_mmc_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA);
 440 +       else
 441 +               bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
 442 +
 443 +       host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 444 +                   SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT |
 445 +                   SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC |
 446 +                   SDHCI_INT_TIMEOUT | SDHCI_INT_DATA_END |
 447 +                   SDHCI_INT_RESPONSE;
 448 +
 449 +       bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE);
 450 +       bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
 451 +
 452 +       if (soft) {
 453 +               /* force clock reconfiguration */
 454 +               host->clock = 0;
 455 +               bcm2835_mmc_set_ios(host->mmc, &host->mmc->ios);
 456 +       }
 457 +}
 458 +
 459 +
 460 +
 461 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host);
 462 +
 463 +static void bcm2835_mmc_dma_complete(void *param)
 464 +{
 465 +       struct bcm2835_host *host = param;
 466 +       struct dma_chan *dma_chan;
 467 +       unsigned long flags;
 468 +       u32 dir_data;
 469 +
 470 +       spin_lock_irqsave(&host->lock, flags);
 471 +
 472 +       if (host->data && !(host->data->flags & MMC_DATA_WRITE)) {
 473 +               /* otherwise handled in SDHCI IRQ */
 474 +               dma_chan = host->dma_chan_rx;
 475 +               dir_data = DMA_FROM_DEVICE;
 476 +
 477 +               dma_unmap_sg(dma_chan->device->dev,
 478 +                    host->data->sg, host->data->sg_len,
 479 +                    dir_data);
 480 +
 481 +               bcm2835_mmc_finish_data(host);
 482 +       }
 483 +
 484 +       spin_unlock_irqrestore(&host->lock, flags);
 485 +}
 486 +
 487 +static void bcm2835_bcm2835_mmc_read_block_pio(struct bcm2835_host *host)
 488 +{
 489 +       unsigned long flags;
 490 +       size_t blksize, len, chunk;
 491 +
 492 +       u32 uninitialized_var(scratch);
 493 +       u8 *buf;
 494 +
 495 +       blksize = host->data->blksz;
 496 +       chunk = 0;
 497 +
 498 +       local_irq_save(flags);
 499 +
 500 +       while (blksize) {
 501 +               if (!sg_miter_next(&host->sg_miter))
 502 +                       BUG();
 503 +
 504 +               len = min(host->sg_miter.length, blksize);
 505 +
 506 +               blksize -= len;
 507 +               host->sg_miter.consumed = len;
 508 +
 509 +               buf = host->sg_miter.addr;
 510 +
 511 +               while (len) {
 512 +                       if (chunk == 0) {
 513 +                               scratch = bcm2835_mmc_readl(host, SDHCI_BUFFER);
 514 +                               chunk = 4;
 515 +                       }
 516 +
 517 +                       *buf = scratch & 0xFF;
 518 +
 519 +                       buf++;
 520 +                       scratch >>= 8;
 521 +                       chunk--;
 522 +                       len--;
 523 +               }
 524 +       }
 525 +
 526 +       sg_miter_stop(&host->sg_miter);
 527 +
 528 +       local_irq_restore(flags);
 529 +}
 530 +
 531 +static void bcm2835_bcm2835_mmc_write_block_pio(struct bcm2835_host *host)
 532 +{
 533 +       unsigned long flags;
 534 +       size_t blksize, len, chunk;
 535 +       u32 scratch;
 536 +       u8 *buf;
 537 +
 538 +       blksize = host->data->blksz;
 539 +       chunk = 0;
 540 +       chunk = 0;
 541 +       scratch = 0;
 542 +
 543 +       local_irq_save(flags);
 544 +
 545 +       while (blksize) {
 546 +               if (!sg_miter_next(&host->sg_miter))
 547 +                       BUG();
 548 +
 549 +               len = min(host->sg_miter.length, blksize);
 550 +
 551 +               blksize -= len;
 552 +               host->sg_miter.consumed = len;
 553 +
 554 +               buf = host->sg_miter.addr;
 555 +
 556 +               while (len) {
 557 +                       scratch |= (u32)*buf << (chunk * 8);
 558 +
 559 +                       buf++;
 560 +                       chunk++;
 561 +                       len--;
 562 +
 563 +                       if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
 564 +                               mmc_raw_writel(host, scratch, SDHCI_BUFFER);
 565 +                               chunk = 0;
 566 +                               scratch = 0;
 567 +                       }
 568 +               }
 569 +       }
 570 +
 571 +       sg_miter_stop(&host->sg_miter);
 572 +
 573 +       local_irq_restore(flags);
 574 +}
 575 +
 576 +
 577 +static void bcm2835_mmc_transfer_pio(struct bcm2835_host *host)
 578 +{
 579 +       u32 mask;
 580 +
 581 +       BUG_ON(!host->data);
 582 +
 583 +       if (host->blocks == 0)
 584 +               return;
 585 +
 586 +       if (host->data->flags & MMC_DATA_READ)
 587 +               mask = SDHCI_DATA_AVAILABLE;
 588 +       else
 589 +               mask = SDHCI_SPACE_AVAILABLE;
 590 +
 591 +       while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
 592 +
 593 +               if (host->data->flags & MMC_DATA_READ)
 594 +                       bcm2835_bcm2835_mmc_read_block_pio(host);
 595 +               else
 596 +                       bcm2835_bcm2835_mmc_write_block_pio(host);
 597 +
 598 +               host->blocks--;
 599 +
 600 +               /* QUIRK used in sdhci.c removes the 'if' */
 601 +               /* but it seems this is unnecessary */
 602 +               if (host->blocks == 0)
 603 +                       break;
 604 +
 605 +
 606 +       }
 607 +}
 608 +
 609 +
 610 +static void bcm2835_mmc_transfer_dma(struct bcm2835_host *host)
 611 +{
 612 +       u32 len, dir_data, dir_slave;
 613 +       struct dma_async_tx_descriptor *desc = NULL;
 614 +       struct dma_chan *dma_chan;
 615 +
 616 +
 617 +       WARN_ON(!host->data);
 618 +
 619 +       if (!host->data)
 620 +               return;
 621 +
 622 +       if (host->blocks == 0)
 623 +               return;
 624 +
 625 +       if (host->data->flags & MMC_DATA_READ) {
 626 +               dma_chan = host->dma_chan_rx;
 627 +               dir_data = DMA_FROM_DEVICE;
 628 +               dir_slave = DMA_DEV_TO_MEM;
 629 +       } else {
 630 +               dma_chan = host->dma_chan_tx;
 631 +               dir_data = DMA_TO_DEVICE;
 632 +               dir_slave = DMA_MEM_TO_DEV;
 633 +       }
 634 +
 635 +       BUG_ON(!dma_chan->device);
 636 +       BUG_ON(!dma_chan->device->dev);
 637 +       BUG_ON(!host->data->sg);
 638 +
 639 +       len = dma_map_sg(dma_chan->device->dev, host->data->sg,
 640 +                        host->data->sg_len, dir_data);
 641 +       if (len > 0) {
 642 +               desc = dmaengine_prep_slave_sg(dma_chan, host->data->sg,
 643 +                                              len, dir_slave,
 644 +                                              DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 645 +       } else {
 646 +               dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n");
 647 +       }
 648 +       if (desc) {
 649 +               bcm2835_mmc_unsignal_irqs(host, SDHCI_INT_DATA_AVAIL |
 650 +                                                   SDHCI_INT_SPACE_AVAIL);
 651 +               host->tx_desc = desc;
 652 +               desc->callback = bcm2835_mmc_dma_complete;
 653 +               desc->callback_param = host;
 654 +               dmaengine_submit(desc);
 655 +               dma_async_issue_pending(dma_chan);
 656 +       }
 657 +
 658 +}
 659 +
 660 +
 661 +
 662 +static void bcm2835_mmc_set_transfer_irqs(struct bcm2835_host *host)
 663 +{
 664 +       u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
 665 +       u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
 666 +
 667 +       if (host->use_dma)
 668 +               host->ier = (host->ier & ~pio_irqs) | dma_irqs;
 669 +       else
 670 +               host->ier = (host->ier & ~dma_irqs) | pio_irqs;
 671 +
 672 +       bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE);
 673 +       bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
 674 +}
 675 +
 676 +
 677 +static void bcm2835_mmc_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd)
 678 +{
 679 +       u8 count;
 680 +       struct mmc_data *data = cmd->data;
 681 +
 682 +       WARN_ON(host->data);
 683 +
 684 +       if (data || (cmd->flags & MMC_RSP_BUSY)) {
 685 +               count = TIMEOUT_VAL;
 686 +               bcm2835_mmc_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
 687 +       }
 688 +
 689 +       if (!data)
 690 +               return;
 691 +
 692 +       /* Sanity checks */
 693 +       BUG_ON(data->blksz * data->blocks > 524288);
 694 +       BUG_ON(data->blksz > host->mmc->max_blk_size);
 695 +       BUG_ON(data->blocks > 65535);
 696 +
 697 +       host->data = data;
 698 +       host->data_early = 0;
 699 +       host->data->bytes_xfered = 0;
 700 +
 701 +
 702 +       if (!(host->flags & SDHCI_REQ_USE_DMA)) {
 703 +               int flags;
 704 +
 705 +               flags = SG_MITER_ATOMIC;
 706 +               if (host->data->flags & MMC_DATA_READ)
 707 +                       flags |= SG_MITER_TO_SG;
 708 +               else
 709 +                       flags |= SG_MITER_FROM_SG;
 710 +               sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
 711 +               host->blocks = data->blocks;
 712 +       }
 713 +
 714 +       host->use_dma = host->have_dma && data->blocks > PIO_DMA_BARRIER;
 715 +
 716 +       bcm2835_mmc_set_transfer_irqs(host);
 717 +
 718 +       /* Set the DMA boundary value and block size */
 719 +       bcm2835_mmc_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
 720 +               data->blksz), SDHCI_BLOCK_SIZE);
 721 +       bcm2835_mmc_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
 722 +
 723 +       BUG_ON(!host->data);
 724 +}
 725 +
 726 +static void bcm2835_mmc_set_transfer_mode(struct bcm2835_host *host,
 727 +       struct mmc_command *cmd)
 728 +{
 729 +       u16 mode;
 730 +       struct mmc_data *data = cmd->data;
 731 +
 732 +       if (data == NULL) {
 733 +               /* clear Auto CMD settings for no data CMDs */
 734 +               mode = bcm2835_mmc_readw(host, SDHCI_TRANSFER_MODE);
 735 +               bcm2835_mmc_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
 736 +                               SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE);
 737 +               return;
 738 +       }
 739 +
 740 +       WARN_ON(!host->data);
 741 +
 742 +       mode = SDHCI_TRNS_BLK_CNT_EN;
 743 +
 744 +       if ((mmc_op_multi(cmd->opcode) || data->blocks > 1)) {
 745 +               mode |= SDHCI_TRNS_MULTI;
 746 +
 747 +               /*
 748 +                * If we are sending CMD23, CMD12 never gets sent
 749 +                * on successful completion (so no Auto-CMD12).
 750 +                */
 751 +               if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12))
 752 +                       mode |= SDHCI_TRNS_AUTO_CMD12;
 753 +               else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) {
 754 +                       mode |= SDHCI_TRNS_AUTO_CMD23;
 755 +                       bcm2835_mmc_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2);
 756 +               }
 757 +       }
 758 +
 759 +       if (data->flags & MMC_DATA_READ)
 760 +               mode |= SDHCI_TRNS_READ;
 761 +       if (host->flags & SDHCI_REQ_USE_DMA)
 762 +               mode |= SDHCI_TRNS_DMA;
 763 +
 764 +       bcm2835_mmc_writew(host, mode, SDHCI_TRANSFER_MODE);
 765 +}
 766 +
 767 +void bcm2835_mmc_send_command(struct bcm2835_host *host, struct mmc_command *cmd)
 768 +{
 769 +       int flags;
 770 +       u32 mask;
 771 +       unsigned long timeout;
 772 +
 773 +       WARN_ON(host->cmd);
 774 +
 775 +       /* Wait max 10 ms */
 776 +       timeout = 1000;
 777 +
 778 +       mask = SDHCI_CMD_INHIBIT;
 779 +       if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 780 +               mask |= SDHCI_DATA_INHIBIT;
 781 +
 782 +       /* We shouldn't wait for data inihibit for stop commands, even
 783 +          though they might use busy signaling */
 784 +       if (host->mrq->data && (cmd == host->mrq->data->stop))
 785 +               mask &= ~SDHCI_DATA_INHIBIT;
 786 +
 787 +       while (bcm2835_mmc_readl(host, SDHCI_PRESENT_STATE) & mask) {
 788 +               if (timeout == 0) {
 789 +                       pr_err("%s: Controller never released inhibit bit(s).\n",
 790 +                               mmc_hostname(host->mmc));
 791 +                       bcm2835_mmc_dumpregs(host);
 792 +                       cmd->error = -EIO;
 793 +                       tasklet_schedule(&host->finish_tasklet);
 794 +                       return;
 795 +               }
 796 +               timeout--;
 797 +               udelay(10);
 798 +       }
 799 +
 800 +       if ((1000-timeout)/100 > 1 && (1000-timeout)/100 > host->max_delay) {
 801 +               host->max_delay = (1000-timeout)/100;
 802 +               pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
 803 +       }
 804 +
 805 +       timeout = jiffies;
 806 +#ifdef CONFIG_OF
 807 +       if (!cmd->data && cmd->busy_timeout > 9000)
 808 +               timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ;
 809 +       else
 810 +#endif
 811 +       timeout += 10 * HZ;
 812 +       mod_timer(&host->timer, timeout);
 813 +
 814 +       host->cmd = cmd;
 815 +
 816 +       bcm2835_mmc_prepare_data(host, cmd);
 817 +
 818 +       bcm2835_mmc_writel(host, cmd->arg, SDHCI_ARGUMENT);
 819 +
 820 +       bcm2835_mmc_set_transfer_mode(host, cmd);
 821 +
 822 +       if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 823 +               pr_err("%s: Unsupported response type!\n",
 824 +                       mmc_hostname(host->mmc));
 825 +               cmd->error = -EINVAL;
 826 +               tasklet_schedule(&host->finish_tasklet);
 827 +               return;
 828 +       }
 829 +
 830 +       if (!(cmd->flags & MMC_RSP_PRESENT))
 831 +               flags = SDHCI_CMD_RESP_NONE;
 832 +       else if (cmd->flags & MMC_RSP_136)
 833 +               flags = SDHCI_CMD_RESP_LONG;
 834 +       else if (cmd->flags & MMC_RSP_BUSY)
 835 +               flags = SDHCI_CMD_RESP_SHORT_BUSY;
 836 +       else
 837 +               flags = SDHCI_CMD_RESP_SHORT;
 838 +
 839 +       if (cmd->flags & MMC_RSP_CRC)
 840 +               flags |= SDHCI_CMD_CRC;
 841 +       if (cmd->flags & MMC_RSP_OPCODE)
 842 +               flags |= SDHCI_CMD_INDEX;
 843 +
 844 +       if (cmd->data)
 845 +               flags |= SDHCI_CMD_DATA;
 846 +
 847 +       bcm2835_mmc_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
 848 +}
 849 +
 850 +
 851 +static void bcm2835_mmc_finish_data(struct bcm2835_host *host)
 852 +{
 853 +       struct mmc_data *data;
 854 +
 855 +       BUG_ON(!host->data);
 856 +
 857 +       data = host->data;
 858 +       host->data = NULL;
 859 +
 860 +       if (data->error)
 861 +               data->bytes_xfered = 0;
 862 +       else
 863 +               data->bytes_xfered = data->blksz * data->blocks;
 864 +
 865 +       /*
 866 +        * Need to send CMD12 if -
 867 +        * a) open-ended multiblock transfer (no CMD23)
 868 +        * b) error in multiblock transfer
 869 +        */
 870 +       if (data->stop &&
 871 +           (data->error ||
 872 +            !host->mrq->sbc)) {
 873 +
 874 +               /*
 875 +                * The controller needs a reset of internal state machines
 876 +                * upon error conditions.
 877 +                */
 878 +               if (data->error) {
 879 +                       bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
 880 +                       bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
 881 +               }
 882 +
 883 +               bcm2835_mmc_send_command(host, data->stop);
 884 +       } else
 885 +               tasklet_schedule(&host->finish_tasklet);
 886 +}
 887 +
 888 +static void bcm2835_mmc_finish_command(struct bcm2835_host *host)
 889 +{
 890 +       int i;
 891 +
 892 +       BUG_ON(host->cmd == NULL);
 893 +
 894 +       if (host->cmd->flags & MMC_RSP_PRESENT) {
 895 +               if (host->cmd->flags & MMC_RSP_136) {
 896 +                       /* CRC is stripped so we need to do some shifting. */
 897 +                       for (i = 0; i < 4; i++) {
 898 +                               host->cmd->resp[i] = bcm2835_mmc_readl(host,
 899 +                                       SDHCI_RESPONSE + (3-i)*4) << 8;
 900 +                               if (i != 3)
 901 +                                       host->cmd->resp[i] |=
 902 +                                               bcm2835_mmc_readb(host,
 903 +                                               SDHCI_RESPONSE + (3-i)*4-1);
 904 +                       }
 905 +               } else {
 906 +                       host->cmd->resp[0] = bcm2835_mmc_readl(host, SDHCI_RESPONSE);
 907 +               }
 908 +       }
 909 +
 910 +       host->cmd->error = 0;
 911 +
 912 +       /* Finished CMD23, now send actual command. */
 913 +       if (host->cmd == host->mrq->sbc) {
 914 +               host->cmd = NULL;
 915 +               bcm2835_mmc_send_command(host, host->mrq->cmd);
 916 +
 917 +               if (host->mrq->cmd->data && host->use_dma) {
 918 +                       /* DMA transfer starts now, PIO starts after interrupt */
 919 +                       bcm2835_mmc_transfer_dma(host);
 920 +               }
 921 +       } else {
 922 +
 923 +               /* Processed actual command. */
 924 +               if (host->data && host->data_early)
 925 +                       bcm2835_mmc_finish_data(host);
 926 +
 927 +               if (!host->cmd->data)
 928 +                       tasklet_schedule(&host->finish_tasklet);
 929 +
 930 +               host->cmd = NULL;
 931 +       }
 932 +}
 933 +
 934 +
 935 +static void bcm2835_mmc_timeout_timer(unsigned long data)
 936 +{
 937 +       struct bcm2835_host *host;
 938 +       unsigned long flags;
 939 +
 940 +       host = (struct bcm2835_host *)data;
 941 +
 942 +       spin_lock_irqsave(&host->lock, flags);
 943 +
 944 +       if (host->mrq) {
 945 +               pr_err("%s: Timeout waiting for hardware interrupt.\n",
 946 +                       mmc_hostname(host->mmc));
 947 +               bcm2835_mmc_dumpregs(host);
 948 +
 949 +               if (host->data) {
 950 +                       host->data->error = -ETIMEDOUT;
 951 +                       bcm2835_mmc_finish_data(host);
 952 +               } else {
 953 +                       if (host->cmd)
 954 +                               host->cmd->error = -ETIMEDOUT;
 955 +                       else
 956 +                               host->mrq->cmd->error = -ETIMEDOUT;
 957 +
 958 +                       tasklet_schedule(&host->finish_tasklet);
 959 +               }
 960 +       }
 961 +
 962 +       mmiowb();
 963 +       spin_unlock_irqrestore(&host->lock, flags);
 964 +}
 965 +
 966 +
 967 +static void bcm2835_mmc_enable_sdio_irq_nolock(struct bcm2835_host *host, int enable)
 968 +{
 969 +       if (!(host->flags & SDHCI_DEVICE_DEAD)) {
 970 +               if (enable)
 971 +                       host->ier |= SDHCI_INT_CARD_INT;
 972 +               else
 973 +                       host->ier &= ~SDHCI_INT_CARD_INT;
 974 +
 975 +               bcm2835_mmc_writel(host, host->ier, SDHCI_INT_ENABLE);
 976 +               bcm2835_mmc_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
 977 +               mmiowb();
 978 +       }
 979 +}
 980 +
 981 +static void bcm2835_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 982 +{
 983 +       struct bcm2835_host *host = mmc_priv(mmc);
 984 +       unsigned long flags;
 985 +
 986 +       spin_lock_irqsave(&host->lock, flags);
 987 +       if (enable)
 988 +               host->flags |= SDHCI_SDIO_IRQ_ENABLED;
 989 +       else
 990 +               host->flags &= ~SDHCI_SDIO_IRQ_ENABLED;
 991 +
 992 +       bcm2835_mmc_enable_sdio_irq_nolock(host, enable);
 993 +       spin_unlock_irqrestore(&host->lock, flags);
 994 +}
 995 +
 996 +static void bcm2835_mmc_cmd_irq(struct bcm2835_host *host, u32 intmask)
 997 +{
 998 +
 999 +       BUG_ON(intmask == 0);
1000 +
1001 +       if (!host->cmd) {
1002 +               pr_err("%s: Got command interrupt 0x%08x even "
1003 +                       "though no command operation was in progress.\n",
1004 +                       mmc_hostname(host->mmc), (unsigned)intmask);
1005 +               bcm2835_mmc_dumpregs(host);
1006 +               return;
1007 +       }
1008 +
1009 +       if (intmask & SDHCI_INT_TIMEOUT)
1010 +               host->cmd->error = -ETIMEDOUT;
1011 +       else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1012 +                       SDHCI_INT_INDEX)) {
1013 +                       host->cmd->error = -EILSEQ;
1014 +       }
1015 +
1016 +       if (host->cmd->error) {
1017 +               tasklet_schedule(&host->finish_tasklet);
1018 +               return;
1019 +       }
1020 +
1021 +       if (intmask & SDHCI_INT_RESPONSE)
1022 +               bcm2835_mmc_finish_command(host);
1023 +
1024 +}
1025 +
1026 +static void bcm2835_mmc_data_irq(struct bcm2835_host *host, u32 intmask)
1027 +{
1028 +       struct dma_chan *dma_chan;
1029 +       u32 dir_data;
1030 +
1031 +       BUG_ON(intmask == 0);
1032 +
1033 +       if (!host->data) {
1034 +               /*
1035 +                * The "data complete" interrupt is also used to
1036 +                * indicate that a busy state has ended. See comment
1037 +                * above in sdhci_cmd_irq().
1038 +                */
1039 +               if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1040 +                       if (intmask & SDHCI_INT_DATA_END) {
1041 +                               bcm2835_mmc_finish_command(host);
1042 +                               return;
1043 +                       }
1044 +               }
1045 +
1046 +               pr_debug("%s: Got data interrupt 0x%08x even "
1047 +                       "though no data operation was in progress.\n",
1048 +                       mmc_hostname(host->mmc), (unsigned)intmask);
1049 +               bcm2835_mmc_dumpregs(host);
1050 +
1051 +               return;
1052 +       }
1053 +
1054 +       if (intmask & SDHCI_INT_DATA_TIMEOUT)
1055 +               host->data->error = -ETIMEDOUT;
1056 +       else if (intmask & SDHCI_INT_DATA_END_BIT)
1057 +               host->data->error = -EILSEQ;
1058 +       else if ((intmask & SDHCI_INT_DATA_CRC) &&
1059 +               SDHCI_GET_CMD(bcm2835_mmc_readw(host, SDHCI_COMMAND))
1060 +                       != MMC_BUS_TEST_R)
1061 +               host->data->error = -EILSEQ;
1062 +
1063 +       if (host->use_dma) {
1064 +               if  (host->data->flags & MMC_DATA_WRITE) {
1065 +                       /* IRQ handled here */
1066 +
1067 +                       dma_chan = host->dma_chan_tx;
1068 +                       dir_data = DMA_TO_DEVICE;
1069 +                       dma_unmap_sg(dma_chan->device->dev,
1070 +                                host->data->sg, host->data->sg_len,
1071 +                                dir_data);
1072 +
1073 +                       bcm2835_mmc_finish_data(host);
1074 +               }
1075 +
1076 +       } else {
1077 +               if (host->data->error)
1078 +                       bcm2835_mmc_finish_data(host);
1079 +               else {
1080 +                       if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1081 +                               bcm2835_mmc_transfer_pio(host);
1082 +
1083 +                       if (intmask & SDHCI_INT_DATA_END) {
1084 +                               if (host->cmd) {
1085 +                                       /*
1086 +                                        * Data managed to finish before the
1087 +                                        * command completed. Make sure we do
1088 +                                        * things in the proper order.
1089 +                                        */
1090 +                                       host->data_early = 1;
1091 +                               } else {
1092 +                                       bcm2835_mmc_finish_data(host);
1093 +                               }
1094 +                       }
1095 +               }
1096 +       }
1097 +}
1098 +
1099 +
1100 +static irqreturn_t bcm2835_mmc_irq(int irq, void *dev_id)
1101 +{
1102 +       irqreturn_t result = IRQ_NONE;
1103 +       struct bcm2835_host *host = dev_id;
1104 +       u32 intmask, mask, unexpected = 0;
1105 +       int max_loops = 16;
1106 +#ifndef CONFIG_OF
1107 +       int cardint = 0;
1108 +#endif
1109 +
1110 +       spin_lock(&host->lock);
1111 +
1112 +       intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1113 +
1114 +       if (!intmask || intmask == 0xffffffff) {
1115 +               result = IRQ_NONE;
1116 +               goto out;
1117 +       }
1118 +
1119 +       do {
1120 +               /* Clear selected interrupts. */
1121 +               mask = intmask & (SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1122 +                                 SDHCI_INT_BUS_POWER);
1123 +               bcm2835_mmc_writel(host, mask, SDHCI_INT_STATUS);
1124 +
1125 +
1126 +               if (intmask & SDHCI_INT_CMD_MASK)
1127 +                       bcm2835_mmc_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1128 +
1129 +               if (intmask & SDHCI_INT_DATA_MASK)
1130 +                       bcm2835_mmc_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1131 +
1132 +               if (intmask & SDHCI_INT_BUS_POWER)
1133 +                       pr_err("%s: Card is consuming too much power!\n",
1134 +                               mmc_hostname(host->mmc));
1135 +
1136 +               if (intmask & SDHCI_INT_CARD_INT) {
1137 +#ifndef CONFIG_OF
1138 +                       cardint = 1;
1139 +#else
1140 +                       bcm2835_mmc_enable_sdio_irq_nolock(host, false);
1141 +                       host->thread_isr |= SDHCI_INT_CARD_INT;
1142 +                       result = IRQ_WAKE_THREAD;
1143 +#endif
1144 +               }
1145 +
1146 +               intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE |
1147 +                            SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
1148 +                            SDHCI_INT_ERROR | SDHCI_INT_BUS_POWER |
1149 +                            SDHCI_INT_CARD_INT);
1150 +
1151 +               if (intmask) {
1152 +                       unexpected |= intmask;
1153 +                       bcm2835_mmc_writel(host, intmask, SDHCI_INT_STATUS);
1154 +               }
1155 +
1156 +               if (result == IRQ_NONE)
1157 +                       result = IRQ_HANDLED;
1158 +
1159 +               intmask = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1160 +       } while (intmask && --max_loops);
1161 +out:
1162 +       spin_unlock(&host->lock);
1163 +
1164 +       if (unexpected) {
1165 +               pr_err("%s: Unexpected interrupt 0x%08x.\n",
1166 +                          mmc_hostname(host->mmc), unexpected);
1167 +               bcm2835_mmc_dumpregs(host);
1168 +       }
1169 +
1170 +#ifndef CONFIG_OF
1171 +       if (cardint)
1172 +               mmc_signal_sdio_irq(host->mmc);
1173 +#endif
1174 +
1175 +       return result;
1176 +}
1177 +
1178 +#ifdef CONFIG_OF
1179 +static irqreturn_t bcm2835_mmc_thread_irq(int irq, void *dev_id)
1180 +{
1181 +       struct bcm2835_host *host = dev_id;
1182 +       unsigned long flags;
1183 +       u32 isr;
1184 +
1185 +       spin_lock_irqsave(&host->lock, flags);
1186 +       isr = host->thread_isr;
1187 +       host->thread_isr = 0;
1188 +       spin_unlock_irqrestore(&host->lock, flags);
1189 +
1190 +       if (isr & SDHCI_INT_CARD_INT) {
1191 +               sdio_run_irqs(host->mmc);
1192 +
1193 +               spin_lock_irqsave(&host->lock, flags);
1194 +               if (host->flags & SDHCI_SDIO_IRQ_ENABLED)
1195 +                       bcm2835_mmc_enable_sdio_irq_nolock(host, true);
1196 +               spin_unlock_irqrestore(&host->lock, flags);
1197 +       }
1198 +
1199 +       return isr ? IRQ_HANDLED : IRQ_NONE;
1200 +}
1201 +#endif
1202 +
1203 +
1204 +
1205 +void bcm2835_mmc_set_clock(struct bcm2835_host *host, unsigned int clock)
1206 +{
1207 +       int div = 0; /* Initialized for compiler warning */
1208 +       int real_div = div, clk_mul = 1;
1209 +       u16 clk = 0;
1210 +       unsigned long timeout;
1211 +
1212 +
1213 +       host->mmc->actual_clock = 0;
1214 +
1215 +       bcm2835_mmc_writew(host, 0, SDHCI_CLOCK_CONTROL);
1216 +
1217 +       if (clock == 0)
1218 +               return;
1219 +
1220 +       /* Version 3.00 divisors must be a multiple of 2. */
1221 +       if (host->max_clk <= clock)
1222 +               div = 1;
1223 +       else {
1224 +               for (div = 2; div < SDHCI_MAX_DIV_SPEC_300;
1225 +                        div += 2) {
1226 +                       if ((host->max_clk / div) <= clock)
1227 +                               break;
1228 +               }
1229 +       }
1230 +
1231 +       real_div = div;
1232 +       div >>= 1;
1233 +
1234 +       if (real_div)
1235 +               host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div;
1236 +
1237 +       clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
1238 +       clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
1239 +               << SDHCI_DIVIDER_HI_SHIFT;
1240 +       clk |= SDHCI_CLOCK_INT_EN;
1241 +       bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1242 +
1243 +       /* Wait max 20 ms */
1244 +       timeout = 20;
1245 +       while (!((clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL))
1246 +               & SDHCI_CLOCK_INT_STABLE)) {
1247 +               if (timeout == 0) {
1248 +                       pr_err("%s: Internal clock never "
1249 +                               "stabilised.\n", mmc_hostname(host->mmc));
1250 +                       bcm2835_mmc_dumpregs(host);
1251 +                       return;
1252 +               }
1253 +               timeout--;
1254 +               mdelay(1);
1255 +       }
1256 +
1257 +       if (20-timeout > 10 && 20-timeout > host->max_delay) {
1258 +               host->max_delay = 20-timeout;
1259 +               pr_warning("Warning: MMC controller hung for %d ms\n", host->max_delay);
1260 +       }
1261 +
1262 +       clk |= SDHCI_CLOCK_CARD_EN;
1263 +       bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1264 +}
1265 +
1266 +static void bcm2835_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
1267 +{
1268 +       struct bcm2835_host *host;
1269 +       unsigned long flags;
1270 +
1271 +       host = mmc_priv(mmc);
1272 +
1273 +       spin_lock_irqsave(&host->lock, flags);
1274 +
1275 +       WARN_ON(host->mrq != NULL);
1276 +
1277 +       host->mrq = mrq;
1278 +
1279 +       if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23))
1280 +               bcm2835_mmc_send_command(host, mrq->sbc);
1281 +       else
1282 +               bcm2835_mmc_send_command(host, mrq->cmd);
1283 +
1284 +       mmiowb();
1285 +       spin_unlock_irqrestore(&host->lock, flags);
1286 +
1287 +       if (!(mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) && mrq->cmd->data && host->use_dma) {
1288 +               /* DMA transfer starts now, PIO starts after interrupt */
1289 +               bcm2835_mmc_transfer_dma(host);
1290 +       }
1291 +}
1292 +
1293 +
1294 +static void bcm2835_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1295 +{
1296 +
1297 +       struct bcm2835_host *host = mmc_priv(mmc);
1298 +       unsigned long flags;
1299 +       u8 ctrl;
1300 +       u16 clk, ctrl_2;
1301 +
1302 +
1303 +       spin_lock_irqsave(&host->lock, flags);
1304 +
1305 +       if (!ios->clock || ios->clock != host->clock) {
1306 +               bcm2835_mmc_set_clock(host, ios->clock);
1307 +               host->clock = ios->clock;
1308 +       }
1309 +
1310 +       if (host->pwr != SDHCI_POWER_330) {
1311 +               host->pwr = SDHCI_POWER_330;
1312 +               bcm2835_mmc_writeb(host, SDHCI_POWER_330 | SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1313 +       }
1314 +
1315 +       ctrl = bcm2835_mmc_readb(host, SDHCI_HOST_CONTROL);
1316 +
1317 +       /* set bus width */
1318 +       ctrl &= ~SDHCI_CTRL_8BITBUS;
1319 +       if (ios->bus_width == MMC_BUS_WIDTH_4)
1320 +               ctrl |= SDHCI_CTRL_4BITBUS;
1321 +       else
1322 +               ctrl &= ~SDHCI_CTRL_4BITBUS;
1323 +
1324 +       ctrl &= ~SDHCI_CTRL_HISPD; /* NO_HISPD_BIT */
1325 +
1326 +
1327 +       bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1328 +       /*
1329 +        * We only need to set Driver Strength if the
1330 +        * preset value enable is not set.
1331 +        */
1332 +       ctrl_2 = bcm2835_mmc_readw(host, SDHCI_HOST_CONTROL2);
1333 +       ctrl_2 &= ~SDHCI_CTRL_DRV_TYPE_MASK;
1334 +       if (ios->drv_type == MMC_SET_DRIVER_TYPE_A)
1335 +               ctrl_2 |= SDHCI_CTRL_DRV_TYPE_A;
1336 +       else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C)
1337 +               ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C;
1338 +
1339 +       bcm2835_mmc_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
1340 +
1341 +       /* Reset SD Clock Enable */
1342 +       clk = bcm2835_mmc_readw(host, SDHCI_CLOCK_CONTROL);
1343 +       clk &= ~SDHCI_CLOCK_CARD_EN;
1344 +       bcm2835_mmc_writew(host, clk, SDHCI_CLOCK_CONTROL);
1345 +
1346 +       /* Re-enable SD Clock */
1347 +       bcm2835_mmc_set_clock(host, host->clock);
1348 +       bcm2835_mmc_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1349 +
1350 +       mmiowb();
1351 +
1352 +       spin_unlock_irqrestore(&host->lock, flags);
1353 +}
1354 +
1355 +
1356 +static struct mmc_host_ops bcm2835_ops = {
1357 +       .request = bcm2835_mmc_request,
1358 +       .set_ios = bcm2835_mmc_set_ios,
1359 +       .enable_sdio_irq = bcm2835_mmc_enable_sdio_irq,
1360 +};
1361 +
1362 +
1363 +static void bcm2835_mmc_tasklet_finish(unsigned long param)
1364 +{
1365 +       struct bcm2835_host *host;
1366 +       unsigned long flags;
1367 +       struct mmc_request *mrq;
1368 +
1369 +       host = (struct bcm2835_host *)param;
1370 +
1371 +       spin_lock_irqsave(&host->lock, flags);
1372 +
1373 +       /*
1374 +        * If this tasklet gets rescheduled while running, it will
1375 +        * be run again afterwards but without any active request.
1376 +        */
1377 +       if (!host->mrq) {
1378 +               spin_unlock_irqrestore(&host->lock, flags);
1379 +               return;
1380 +       }
1381 +
1382 +       del_timer(&host->timer);
1383 +
1384 +       mrq = host->mrq;
1385 +
1386 +       /*
1387 +        * The controller needs a reset of internal state machines
1388 +        * upon error conditions.
1389 +        */
1390 +       if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1391 +           ((mrq->cmd && mrq->cmd->error) ||
1392 +                (mrq->data && (mrq->data->error ||
1393 +                 (mrq->data->stop && mrq->data->stop->error))))) {
1394 +
1395 +               bcm2835_mmc_reset(host, SDHCI_RESET_CMD);
1396 +               bcm2835_mmc_reset(host, SDHCI_RESET_DATA);
1397 +       }
1398 +
1399 +       host->mrq = NULL;
1400 +       host->cmd = NULL;
1401 +       host->data = NULL;
1402 +
1403 +       mmiowb();
1404 +
1405 +       spin_unlock_irqrestore(&host->lock, flags);
1406 +       mmc_request_done(host->mmc, mrq);
1407 +}
1408 +
1409 +
1410 +
1411 +int bcm2835_mmc_add_host(struct bcm2835_host *host)
1412 +{
1413 +       struct mmc_host *mmc;
1414 +#ifndef FORCE_PIO
1415 +       struct dma_slave_config cfg;
1416 +#endif
1417 +       int ret;
1418 +
1419 +       mmc = host->mmc;
1420 +
1421 +       bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1422 +
1423 +       host->clk_mul = 0;
1424 +
1425 +       mmc->ops = &bcm2835_ops;
1426 +       mmc->f_max = host->max_clk;
1427 +       mmc->f_max = host->max_clk;
1428 +       mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
1429 +
1430 +       /* SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK */
1431 +       host->timeout_clk = mmc->f_max / 1000;
1432 +#ifdef CONFIG_OF
1433 +       mmc->max_busy_timeout = (1 << 27) / host->timeout_clk;
1434 +#endif
1435 +       /* host controller capabilities */
1436 +       mmc->caps = MMC_CAP_CMD23 | MMC_CAP_ERASE | MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ |
1437 +       MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_4_BIT_DATA;
1438 +
1439 +       host->flags = SDHCI_AUTO_CMD23;
1440 +
1441 +       spin_lock_init(&host->lock);
1442 +
1443 +
1444 +#ifdef FORCE_PIO
1445 +       pr_info("Forcing PIO mode\n");
1446 +       host->have_dma = false;
1447 +#else
1448 +       if (!host->dma_chan_tx || !host->dma_chan_rx ||
1449 +       IS_ERR(host->dma_chan_tx) || IS_ERR(host->dma_chan_rx)) {
1450 +               pr_err("%s: Unable to initialise DMA channels. Falling back to PIO\n", DRIVER_NAME);
1451 +               host->have_dma = false;
1452 +       } else {
1453 +               pr_info("DMA channels allocated for the MMC driver");
1454 +               host->have_dma = true;
1455 +
1456 +               cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1457 +               cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1458 +               cfg.slave_id = 11;              /* DREQ channel */
1459 +
1460 +               cfg.direction = DMA_MEM_TO_DEV;
1461 +               cfg.src_addr = 0;
1462 +               cfg.dst_addr = host->phys_addr + SDHCI_BUFFER;
1463 +               ret = dmaengine_slave_config(host->dma_chan_tx, &cfg);
1464 +
1465 +               cfg.direction = DMA_DEV_TO_MEM;
1466 +               cfg.src_addr = host->phys_addr + SDHCI_BUFFER;
1467 +               cfg.dst_addr = 0;
1468 +               ret = dmaengine_slave_config(host->dma_chan_rx, &cfg);
1469 +       }
1470 +#endif
1471 +
1472 +
1473 +       mmc->max_segs = 128;
1474 +       mmc->max_req_size = 524288;
1475 +       mmc->max_seg_size = mmc->max_req_size;
1476 +       mmc->max_blk_size = 512;
1477 +       mmc->max_blk_count =  65535;
1478 +
1479 +       /* report supported voltage ranges */
1480 +       mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1481 +
1482 +       tasklet_init(&host->finish_tasklet,
1483 +               bcm2835_mmc_tasklet_finish, (unsigned long)host);
1484 +
1485 +       setup_timer(&host->timer, bcm2835_mmc_timeout_timer, (unsigned long)host);
1486 +       init_waitqueue_head(&host->buf_ready_int);
1487 +
1488 +       bcm2835_mmc_init(host, 0);
1489 +#ifndef CONFIG_OF
1490 +       ret = request_irq(host->irq, bcm2835_mmc_irq, 0 /*IRQF_SHARED*/,
1491 +                                 mmc_hostname(mmc), host);
1492 +#else
1493 +       ret = request_threaded_irq(host->irq, bcm2835_mmc_irq, bcm2835_mmc_thread_irq,
1494 +                                  IRQF_SHARED, mmc_hostname(mmc), host);
1495 +#endif
1496 +       if (ret) {
1497 +               pr_err("%s: Failed to request IRQ %d: %d\n",
1498 +                      mmc_hostname(mmc), host->irq, ret);
1499 +               goto untasklet;
1500 +       }
1501 +
1502 +       mmiowb();
1503 +       mmc_add_host(mmc);
1504 +
1505 +       pr_info("Load BCM2835 MMC driver\n");
1506 +
1507 +       return 0;
1508 +
1509 +untasklet:
1510 +       tasklet_kill(&host->finish_tasklet);
1511 +
1512 +       return ret;
1513 +}
1514 +
1515 +static int bcm2835_mmc_probe(struct platform_device *pdev)
1516 +{
1517 +       struct device *dev = &pdev->dev;
1518 +#ifdef CONFIG_OF
1519 +       struct device_node *node = dev->of_node;
1520 +       struct clk *clk;
1521 +#endif
1522 +       struct resource *iomem;
1523 +       struct bcm2835_host *host = NULL;
1524 +
1525 +       int ret;
1526 +       struct mmc_host *mmc;
1527 +#if !defined(CONFIG_OF) && !defined(FORCE_PIO)
1528 +       dma_cap_mask_t mask;
1529 +#endif
1530 +
1531 +       iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1532 +       if (!iomem) {
1533 +               ret = -ENOMEM;
1534 +               goto err;
1535 +       }
1536 +
1537 +       if (resource_size(iomem) < 0x100)
1538 +               dev_err(&pdev->dev, "Invalid iomem size!\n");
1539 +
1540 +       mmc = mmc_alloc_host(sizeof(struct bcm2835_host), dev);
1541 +       host = mmc_priv(mmc);
1542 +       host->mmc = mmc;
1543 +
1544 +
1545 +       if (IS_ERR(host)) {
1546 +               ret = PTR_ERR(host);
1547 +               goto err;
1548 +       }
1549 +
1550 +       host->phys_addr = iomem->start + BCM2835_VCMMU_SHIFT;
1551 +
1552 +#ifndef CONFIG_OF
1553 +#ifndef FORCE_PIO
1554 +       dma_cap_zero(mask);
1555 +       /* we don't care about the channel, any would work */
1556 +       dma_cap_set(DMA_SLAVE, mask);
1557 +
1558 +       host->dma_chan_tx = dma_request_channel(mask, NULL, NULL);
1559 +       host->dma_chan_rx = dma_request_channel(mask, NULL, NULL);
1560 +#endif
1561 +       host->max_clk = BCM2835_CLOCK_FREQ;
1562 +
1563 +#else
1564 +#ifndef FORCE_PIO
1565 +       host->dma_chan_tx = of_dma_request_slave_channel(node, "tx");
1566 +       host->dma_chan_rx = of_dma_request_slave_channel(node, "rx");
1567 +#endif
1568 +       clk = of_clk_get(node, 0);
1569 +       if (IS_ERR(clk)) {
1570 +               dev_err(dev, "get CLOCK failed\n");
1571 +               ret = PTR_ERR(clk);
1572 +               goto out;
1573 +       }
1574 +       host->max_clk = (clk_get_rate(clk));
1575 +#endif
1576 +       host->irq = platform_get_irq(pdev, 0);
1577 +
1578 +       if (!request_mem_region(iomem->start, resource_size(iomem),
1579 +               mmc_hostname(host->mmc))) {
1580 +               dev_err(&pdev->dev, "cannot request region\n");
1581 +               ret = -EBUSY;
1582 +               goto err_request;
1583 +       }
1584 +
1585 +       host->ioaddr = ioremap(iomem->start, resource_size(iomem));
1586 +       if (!host->ioaddr) {
1587 +               dev_err(&pdev->dev, "failed to remap registers\n");
1588 +               ret = -ENOMEM;
1589 +               goto err_remap;
1590 +       }
1591 +
1592 +       platform_set_drvdata(pdev, host);
1593 +
1594 +
1595 +       if (host->irq <= 0) {
1596 +               dev_err(dev, "get IRQ failed\n");
1597 +               ret = -EINVAL;
1598 +               goto out;
1599 +       }
1600 +
1601 +
1602 +#ifndef CONFIG_OF
1603 +       mmc->caps |= MMC_CAP_4_BIT_DATA;
1604 +#else
1605 +       mmc_of_parse(mmc);
1606 +#endif
1607 +       host->timeout = msecs_to_jiffies(1000);
1608 +       spin_lock_init(&host->lock);
1609 +       mmc->ops = &bcm2835_ops;
1610 +       return bcm2835_mmc_add_host(host);
1611 +
1612 +
1613 +err_remap:
1614 +       release_mem_region(iomem->start, resource_size(iomem));
1615 +err_request:
1616 +       mmc_free_host(host->mmc);
1617 +err:
1618 +       dev_err(&pdev->dev, "%s failed %d\n", __func__, ret);
1619 +       return ret;
1620 +out:
1621 +       if (mmc)
1622 +               mmc_free_host(mmc);
1623 +       return ret;
1624 +}
1625 +
1626 +static int bcm2835_mmc_remove(struct platform_device *pdev)
1627 +{
1628 +       struct bcm2835_host *host = platform_get_drvdata(pdev);
1629 +       struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1630 +       unsigned long flags;
1631 +       int dead;
1632 +       u32 scratch;
1633 +
1634 +       dead = 0;
1635 +       scratch = bcm2835_mmc_readl(host, SDHCI_INT_STATUS);
1636 +       if (scratch == (u32)-1)
1637 +               dead = 1;
1638 +
1639 +
1640 +       if (dead) {
1641 +               spin_lock_irqsave(&host->lock, flags);
1642 +
1643 +               host->flags |= SDHCI_DEVICE_DEAD;
1644 +
1645 +               if (host->mrq) {
1646 +                       pr_err("%s: Controller removed during "
1647 +                               " transfer!\n", mmc_hostname(host->mmc));
1648 +
1649 +                       host->mrq->cmd->error = -ENOMEDIUM;
1650 +                       tasklet_schedule(&host->finish_tasklet);
1651 +               }
1652 +
1653 +               spin_unlock_irqrestore(&host->lock, flags);
1654 +       }
1655 +
1656 +       mmc_remove_host(host->mmc);
1657 +
1658 +       if (!dead)
1659 +               bcm2835_mmc_reset(host, SDHCI_RESET_ALL);
1660 +
1661 +       free_irq(host->irq, host);
1662 +
1663 +       del_timer_sync(&host->timer);
1664 +
1665 +       tasklet_kill(&host->finish_tasklet);
1666 +
1667 +       iounmap(host->ioaddr);
1668 +       release_mem_region(iomem->start, resource_size(iomem));
1669 +       mmc_free_host(host->mmc);
1670 +       platform_set_drvdata(pdev, NULL);
1671 +
1672 +       return 0;
1673 +}
1674 +
1675 +
1676 +static const struct of_device_id bcm2835_mmc_match[] = {
1677 +       { .compatible = "brcm,bcm2835-mmc" },
1678 +       { }
1679 +};
1680 +MODULE_DEVICE_TABLE(of, bcm2835_mmc_match);
1681 +
1682 +
1683 +
1684 +static struct platform_driver bcm2835_mmc_driver = {
1685 +       .probe      = bcm2835_mmc_probe,
1686 +       .remove     = bcm2835_mmc_remove,
1687 +       .driver     = {
1688 +               .name           = DRIVER_NAME,
1689 +               .owner          = THIS_MODULE,
1690 +               .of_match_table = bcm2835_mmc_match,
1691 +       },
1692 +};
1693 +module_platform_driver(bcm2835_mmc_driver);
1694 +
1695 +MODULE_ALIAS("platform:mmc-bcm2835");
1696 +MODULE_DESCRIPTION("BCM2835 SDHCI driver");
1697 +MODULE_LICENSE("GPL v2");
1698 +MODULE_AUTHOR("Gellert Weisz");