72b9cfc1316574ea8ea01a5cd829ab477b291e22
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.19 / 950-0056-BCM2708-Add-core-Device-Tree-support.patch
1 From d04105f6d48f160f4b7ab874ed7f878c2b84b466 Mon Sep 17 00:00:00 2001
2 From: notro <notro@tronnes.org>
3 Date: Wed, 9 Jul 2014 14:46:08 +0200
4 Subject: [PATCH] BCM2708: Add core Device Tree support
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Add the bare minimum needed to boot BCM2708 from a Device Tree.
10
11 Signed-off-by: Noralf Tronnes <notro@tronnes.org>
12
13 BCM2708: DT: change 'axi' nodename to 'soc'
14
15 Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835.
16 The VC4 bootloader fills in certain properties in the 'axi' subtree,
17 but since this is part of an upstreaming effort, the name is changed.
18
19 Signed-off-by: Noralf Tronnes notro@tronnes.org
20
21 BCM2708_DT: Correct length of the peripheral space
22
23 Use dts-dirs feature for overlays.
24
25 The kernel makefiles have a dts-dirs target that is for vendor subdirectories.
26
27 Using this fixes the install_dtbs target, which previously did not install the overlays.
28
29 BCM270X_DT: configure I2S DMA channels
30
31 Signed-off-by: Matthias Reichl <hias@horus.com>
32
33 BCM270X_DT: switch to bcm2835-i2s
34
35 I2S soundcard drivers with proper devicetree support (i.e. not linking
36 to the cpu_dai/platform via name but to cpu/platform via of_node)
37 will work out of the box without any modifications.
38
39 When the kernel is compiled without devicetree support the platform
40 code will instantiate the bcm2708-i2s driver and I2S soundcard drivers
41 will link to it via name, as before.
42
43 Signed-off-by: Matthias Reichl <hias@horus.com>
44
45 SDIO-overlay: add poll_once-boolean parameter
46
47 Add paramter to toggle sdio-device-polling
48 done every second or once at boot-time.
49
50 Signed-off-by: Patrick Boettcher <patrick.boettcher@posteo.de>
51
52 BCM270X_DT: Make mmc overlay compatible with current firmware
53
54 The original DT overlay logic followed a merge-then-patch procedure,
55 i.e. parameters are applied to the loaded overlay before the overlay
56 is merged into the base DTB. This sequence has been changed to
57 patch-then-merge, in order to support parameterised node names, and
58 to protect against bad overlays. As a result, overrides (parameters)
59 must only target labels in the overlay, but the overlay can obviously target nodes in the base DTB.
60
61 mmc-overlay.dts (that switches back to the original mmc sdcard
62 driver) is the only overlay violating that rule, and this patch
63 fixes it.
64
65 bcm270x_dt: Use the sdhost MMC controller by default
66
67 The "mmc" overlay reverts to using the other controller.
68
69 squash: Add cprman to dt
70
71 BCM270X_DT: Use clk_core for I2C interfaces
72
73 BCM270X_DT: Use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi
74
75 The mainline Device Tree files are quite close to downstream now.
76 Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files
77 for our dts files.
78
79 Mainline dts files are based on these files:
80
81 bcm2835-rpi.dtsi
82 bcm2835.dtsi bcm2836.dtsi
83 bcm283x.dtsi
84
85 Current downstream are based on these:
86
87 bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi
88 bcm2708_common.dtsi
89
90 This patch introduces this dependency:
91
92 bcm2708.dtsi bcm2709.dtsi
93 bcm2708-rpi.dtsi
94 bcm270x.dtsi
95 bcm2835.dtsi bcm2836.dtsi
96 bcm283x.dtsi
97
98 And:
99 bcm2710.dtsi
100 bcm2708-rpi.dtsi
101 bcm270x.dtsi
102 bcm283x.dtsi
103
104 bcm270x.dtsi contains the downstream bcm283x.dtsi diff.
105 bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi.
106
107 Other changes:
108 - The led node has moved from /soc/leds to /leds. This is not a problem
109 since the label is used to reference it.
110 - The clk_osc reg property changes from 6 to 3.
111 - The gpu nodes has their interrupt property set in the base file.
112 - the clocks label does not point to the /clocks node anymore, but
113 points to the cprman node. This is not a problem since the overlays
114 that use the clock node refer to it directly: target-path = "/clocks";
115 - some nodes now have 2 labels since mainline and downstream differs in
116 this respect: cprman/clocks, spi0/spi, gpu/vc4.
117 - some nodes doesn't have an explicit status = "okay" since they're not
118 disabled in the base file: watchdog and random.
119 - gpiomem doesn't need an explicit status = "okay".
120 - bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi,
121 it's now set directly in that file.
122 - bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer.
123 - Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes.
124
125 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
126
127 BCM270X_DT: Use raspberrypi-power to turn on USB power
128
129 Use the raspberrypi-power driver to turn on USB power.
130
131 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
132
133 BCM270X_DT: Add a .dtbo target, use for overlays
134
135 Change the filenames and extensions to keep the pre-DDT style of
136 overlay (<name>-overlay.dtb) distinct from new ones that use a
137 different style of local fixups (<name>.dtbo), and to match other
138 platforms.
139
140 The RPi firmware uses the DDTK trailer atom to choose which type of
141 overlay to use for each kernel.
142
143 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
144
145 BCM270X_DT: Don't generate "linux,phandle" props
146
147 The EPAPR standard says to use "phandle" properties to store phandles,
148 rather than the deprecated "linux,phandle" version. By default, dtc
149 generates both, but adding "-H epapr" causes it to only generate
150 "phandle"s, saving some space and clutter.
151
152 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
153
154 BCM270X_DT: Add overlay for enc28j60 on SPI2
155
156 Works on SPI2 for compute module
157
158 BCM270X_DT: Add midi-uart0 overlay
159
160 MIDI requires 31.25kbaud, a baudrate unsupported by Linux. The
161 midi-uart0 overlay configures uart0 (ttyAMA0) to use a fake clock
162 so that requesting 38.4kbaud actually gets 31.25kbaud.
163
164 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
165
166 BCM270X_DT: Add i2c-sensor overlay
167
168 The i2c-sensor overlay is a container for various pressure and
169 temperature sensors, currently bmp085 and bmp280. The standalone
170 bmp085_i2c-sensor overlay is now deprecated.
171
172 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
173
174 BCM270X_DT: overlays/*-overlay.dtb -> overlays/*.dtbo (#1752)
175
176 We now create overlays as .dtbo files.
177
178 build: support for .dtbo files for dtb overlays
179
180 Kernel 4.4.6+ on RaspberryPi support .dtbo files for overlays, instead of .dtb.
181 Patch the kernel, which has faulty rules to generate .dtbo the way yocto does
182
183 Signed-off-by: Herve Jourdain <herve.jourdain@neuf.fr>
184 Signed-off-by: Khem Raj <raj.khem@gmail.com>
185
186 BCM270X: Drop position requirement for CMA in VC4 overlay.
187
188 No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f,
189 and will probably let peeople that want to choose a larger CMA
190 allocation (particularly on pi0/1).
191
192 Signed-off-by: Eric Anholt <eric@anholt.net>
193
194 BCM270X_DT: RPi Device Tree tidy
195
196 Use the upstream sdhost node, add thermal-zones, and factor out some
197 common elements.
198
199 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
200
201 kbuild: Silence unhelpful DTC warnings
202
203 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
204 ---
205 .gitignore | 2 +-
206 arch/arm/Makefile | 2 +
207 arch/arm/boot/dts/Makefile | 21 +
208 arch/arm/boot/dts/bcm2708-rpi-0-w.dts | 166 ++
209 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 122 ++
210 arch/arm/boot/dts/bcm2708-rpi-b.dts | 112 +
211 arch/arm/boot/dts/bcm2708-rpi-cm.dts | 95 +
212 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 17 +
213 arch/arm/boot/dts/bcm2708-rpi.dtsi | 159 ++
214 arch/arm/boot/dts/bcm2708.dtsi | 11 +
215 arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 123 ++
216 arch/arm/boot/dts/bcm2709.dtsi | 19 +
217 arch/arm/boot/dts/bcm270x.dtsi | 152 ++
218 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 183 ++
219 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 191 ++
220 arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 129 ++
221 arch/arm/boot/dts/bcm2710.dtsi | 29 +
222 arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +-
223 arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 17 +
224 arch/arm/boot/dts/overlays/Makefile | 145 ++
225 arch/arm/boot/dts/overlays/README | 1952 +++++++++++++++++
226 .../dts/overlays/adau1977-adc-overlay.dts | 40 +
227 .../dts/overlays/adau7002-simple-overlay.dts | 52 +
228 .../arm/boot/dts/overlays/ads1015-overlay.dts | 98 +
229 .../arm/boot/dts/overlays/ads1115-overlay.dts | 103 +
230 .../arm/boot/dts/overlays/ads7846-overlay.dts | 89 +
231 .../overlays/akkordion-iqdacplus-overlay.dts | 49 +
232 .../allo-boss-dac-pcm512x-audio-overlay.dts | 59 +
233 .../dts/overlays/allo-digione-overlay.dts | 44 +
234 .../allo-katana-dac-audio-overlay.dts | 57 +
235 .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 +
236 ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 55 +
237 .../boot/dts/overlays/applepi-dac-overlay.dts | 57 +
238 .../boot/dts/overlays/at86rf233-overlay.dts | 57 +
239 .../overlays/audioinjector-addons-overlay.dts | 59 +
240 .../audioinjector-wm8731-audio-overlay.dts | 39 +
241 .../boot/dts/overlays/audremap-overlay.dts | 19 +
242 .../boot/dts/overlays/balena-fin-overlay.dts | 79 +
243 .../overlays/bmp085_i2c-sensor-overlay.dts | 23 +
244 arch/arm/boot/dts/overlays/dht11-overlay.dts | 39 +
245 .../dts/overlays/dionaudio-loco-overlay.dts | 39 +
246 .../overlays/dionaudio-loco-v2-overlay.dts | 49 +
247 arch/arm/boot/dts/overlays/dpi18-overlay.dts | 31 +
248 arch/arm/boot/dts/overlays/dpi24-overlay.dts | 31 +
249 .../arm/boot/dts/overlays/dwc-otg-overlay.dts | 20 +
250 arch/arm/boot/dts/overlays/dwc2-overlay.dts | 28 +
251 .../boot/dts/overlays/enc28j60-overlay.dts | 53 +
252 .../dts/overlays/enc28j60-spi2-overlay.dts | 47 +
253 .../arm/boot/dts/overlays/exc3000-overlay.dts | 48 +
254 .../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 +
255 arch/arm/boot/dts/overlays/goodix-overlay.dts | 46 +
256 .../googlevoicehat-soundcard-overlay.dts | 49 +
257 .../arm/boot/dts/overlays/gpio-ir-overlay.dts | 48 +
258 .../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 +
259 .../boot/dts/overlays/gpio-key-overlay.dts | 48 +
260 .../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 +
261 .../dts/overlays/gpio-poweroff-overlay.dts | 36 +
262 .../dts/overlays/gpio-shutdown-overlay.dts | 80 +
263 .../dts/overlays/hifiberry-amp-overlay.dts | 39 +
264 .../dts/overlays/hifiberry-dac-overlay.dts | 34 +
265 .../overlays/hifiberry-dacplus-overlay.dts | 59 +
266 .../dts/overlays/hifiberry-digi-overlay.dts | 41 +
267 .../overlays/hifiberry-digi-pro-overlay.dts | 43 +
268 arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 +
269 arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 ++
270 .../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 +
271 .../boot/dts/overlays/i2c-gpio-overlay.dts | 43 +
272 .../arm/boot/dts/overlays/i2c-mux-overlay.dts | 139 ++
273 .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 26 +
274 .../dts/overlays/i2c-rtc-gpio-overlay.dts | 183 ++
275 .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 181 ++
276 .../boot/dts/overlays/i2c-sensor-overlay.dts | 223 ++
277 .../dts/overlays/i2c0-bcm2708-overlay.dts | 69 +
278 .../dts/overlays/i2c1-bcm2708-overlay.dts | 43 +
279 .../dts/overlays/i2s-gpio28-31-overlay.dts | 18 +
280 .../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 +
281 .../dts/overlays/iqaudio-dacplus-overlay.dts | 49 +
282 .../iqaudio-digi-wm8804-audio-overlay.dts | 47 +
283 .../dts/overlays/jedec-spi-nor-overlay.dts | 309 +++
284 .../dts/overlays/justboom-dac-overlay.dts | 46 +
285 .../dts/overlays/justboom-digi-overlay.dts | 41 +
286 .../boot/dts/overlays/lirc-rpi-overlay.dts | 57 +
287 .../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 +
288 .../boot/dts/overlays/mbed-dac-overlay.dts | 64 +
289 .../boot/dts/overlays/mcp23017-overlay.dts | 54 +
290 .../boot/dts/overlays/mcp23s17-overlay.dts | 732 +++++++
291 .../dts/overlays/mcp2515-can0-overlay.dts | 73 +
292 .../dts/overlays/mcp2515-can1-overlay.dts | 73 +
293 .../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 ++
294 .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 ++
295 .../dts/overlays/media-center-overlay.dts | 134 ++
296 .../boot/dts/overlays/midi-uart0-overlay.dts | 36 +
297 .../boot/dts/overlays/midi-uart1-overlay.dts | 43 +
298 arch/arm/boot/dts/overlays/mmc-overlay.dts | 39 +
299 .../arm/boot/dts/overlays/mpu6050-overlay.dts | 28 +
300 .../arm/boot/dts/overlays/mz61581-overlay.dts | 117 +
301 .../arm/boot/dts/overlays/papirus-overlay.dts | 89 +
302 .../boot/dts/overlays/pi3-act-led-overlay.dts | 27 +
303 .../dts/overlays/pi3-disable-bt-overlay.dts | 46 +
304 .../dts/overlays/pi3-disable-wifi-overlay.dts | 13 +
305 .../dts/overlays/pi3-miniuart-bt-overlay.dts | 74 +
306 arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 +
307 .../boot/dts/overlays/piscreen-overlay.dts | 102 +
308 .../boot/dts/overlays/piscreen2r-overlay.dts | 106 +
309 .../arm/boot/dts/overlays/pisound-overlay.dts | 120 +
310 .../arm/boot/dts/overlays/pitft22-overlay.dts | 69 +
311 .../overlays/pitft28-capacitive-overlay.dts | 91 +
312 .../overlays/pitft28-resistive-overlay.dts | 121 +
313 .../overlays/pitft35-resistive-overlay.dts | 121 +
314 .../boot/dts/overlays/pps-gpio-overlay.dts | 38 +
315 .../boot/dts/overlays/pwm-2chan-overlay.dts | 47 +
316 .../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 +
317 arch/arm/boot/dts/overlays/pwm-overlay.dts | 43 +
318 .../arm/boot/dts/overlays/qca7000-overlay.dts | 52 +
319 .../dts/overlays/rotary-encoder-overlay.dts | 59 +
320 .../dts/overlays/rpi-backlight-overlay.dts | 21 +
321 .../overlays/rpi-cirrus-wm5102-overlay.dts | 146 ++
322 .../arm/boot/dts/overlays/rpi-dac-overlay.dts | 34 +
323 .../boot/dts/overlays/rpi-display-overlay.dts | 91 +
324 .../boot/dts/overlays/rpi-ft5406-overlay.dts | 30 +
325 .../boot/dts/overlays/rpi-proto-overlay.dts | 39 +
326 .../boot/dts/overlays/rpi-sense-overlay.dts | 47 +
327 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 31 +
328 .../rra-digidac1-wm8741-audio-overlay.dts | 49 +
329 .../dts/overlays/sc16is750-i2c-overlay.dts | 37 +
330 .../dts/overlays/sc16is752-i2c-overlay.dts | 40 +
331 .../dts/overlays/sc16is752-spi1-overlay.dts | 61 +
332 arch/arm/boot/dts/overlays/sdhost-overlay.dts | 31 +
333 .../boot/dts/overlays/sdio-1bit-overlay.dts | 63 +
334 arch/arm/boot/dts/overlays/sdio-overlay.dts | 63 +
335 .../arm/boot/dts/overlays/sdtweak-overlay.dts | 25 +
336 .../arm/boot/dts/overlays/smi-dev-overlay.dts | 18 +
337 .../boot/dts/overlays/smi-nand-overlay.dts | 69 +
338 arch/arm/boot/dts/overlays/smi-overlay.dts | 37 +
339 .../dts/overlays/spi-gpio35-39-overlay.dts | 31 +
340 .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 +
341 .../arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 +
342 .../boot/dts/overlays/spi0-hw-cs-overlay.dts | 26 +
343 .../boot/dts/overlays/spi1-1cs-overlay.dts | 57 +
344 .../boot/dts/overlays/spi1-2cs-overlay.dts | 69 +
345 .../boot/dts/overlays/spi1-3cs-overlay.dts | 81 +
346 .../boot/dts/overlays/spi2-1cs-overlay.dts | 57 +
347 .../boot/dts/overlays/spi2-2cs-overlay.dts | 69 +
348 .../boot/dts/overlays/spi2-3cs-overlay.dts | 81 +
349 .../dts/overlays/superaudioboard-overlay.dts | 73 +
350 arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 ++++++++++++++
351 .../boot/dts/overlays/tinylcd35-overlay.dts | 224 ++
352 arch/arm/boot/dts/overlays/uart0-overlay.dts | 32 +
353 arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 +
354 .../upstream-aux-interrupt-overlay.dts | 33 +
355 .../boot/dts/overlays/upstream-overlay.dts | 154 ++
356 .../dts/overlays/vc4-fkms-v3d-overlay.dts | 89 +
357 .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 151 ++
358 arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 +
359 .../arm/boot/dts/overlays/w1-gpio-overlay.dts | 41 +
360 .../dts/overlays/w1-gpio-pullup-overlay.dts | 43 +
361 .../arm/boot/dts/overlays/wittypi-overlay.dts | 44 +
362 scripts/Makefile.dtbinst | 8 +-
363 scripts/Makefile.lib | 13 +
364 159 files changed, 14852 insertions(+), 4 deletions(-)
365 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-0-w.dts
366 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
367 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b.dts
368 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dts
369 create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
370 create mode 100644 arch/arm/boot/dts/bcm2708-rpi.dtsi
371 create mode 100644 arch/arm/boot/dts/bcm2708.dtsi
372 create mode 100644 arch/arm/boot/dts/bcm2709-rpi-2-b.dts
373 create mode 100644 arch/arm/boot/dts/bcm2709.dtsi
374 create mode 100644 arch/arm/boot/dts/bcm270x.dtsi
375 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
376 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
377 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts
378 create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
379 create mode 100644 arch/arm/boot/dts/overlays/Makefile
380 create mode 100644 arch/arm/boot/dts/overlays/README
381 create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
382 create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
383 create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
384 create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts
385 create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts
386 create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
387 create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
388 create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts
389 create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
390 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
391 create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
392 create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
393 create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts
394 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
395 create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
396 create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts
397 create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts
398 create mode 100644 arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
399 create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts
400 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
401 create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
402 create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts
403 create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts
404 create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
405 create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts
406 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-overlay.dts
407 create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
408 create mode 100644 arch/arm/boot/dts/overlays/exc3000-overlay.dts
409 create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
410 create mode 100644 arch/arm/boot/dts/overlays/goodix-overlay.dts
411 create mode 100644 arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
412 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
413 create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
414 create mode 100644 arch/arm/boot/dts/overlays/gpio-key-overlay.dts
415 create mode 100644 arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
416 create mode 100644 arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
417 create mode 100644 arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
418 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
419 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
420 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
421 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
422 create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
423 create mode 100644 arch/arm/boot/dts/overlays/hy28a-overlay.dts
424 create mode 100644 arch/arm/boot/dts/overlays/hy28b-overlay.dts
425 create mode 100644 arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
426 create mode 100644 arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
427 create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
428 create mode 100644 arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
429 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
430 create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
431 create mode 100644 arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
432 create mode 100644 arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
433 create mode 100644 arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
434 create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
435 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
436 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
437 create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
438 create mode 100644 arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
439 create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
440 create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
441 create mode 100644 arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts
442 create mode 100644 arch/arm/boot/dts/overlays/ltc294x-overlay.dts
443 create mode 100644 arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
444 create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
445 create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
446 create mode 100755 arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
447 create mode 100644 arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
448 create mode 100755 arch/arm/boot/dts/overlays/mcp3008-overlay.dts
449 create mode 100755 arch/arm/boot/dts/overlays/mcp3202-overlay.dts
450 create mode 100644 arch/arm/boot/dts/overlays/media-center-overlay.dts
451 create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
452 create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
453 create mode 100644 arch/arm/boot/dts/overlays/mmc-overlay.dts
454 create mode 100644 arch/arm/boot/dts/overlays/mpu6050-overlay.dts
455 create mode 100644 arch/arm/boot/dts/overlays/mz61581-overlay.dts
456 create mode 100644 arch/arm/boot/dts/overlays/papirus-overlay.dts
457 create mode 100644 arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
458 create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
459 create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
460 create mode 100644 arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
461 create mode 100644 arch/arm/boot/dts/overlays/pibell-overlay.dts
462 create mode 100644 arch/arm/boot/dts/overlays/piscreen-overlay.dts
463 create mode 100644 arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
464 create mode 100644 arch/arm/boot/dts/overlays/pisound-overlay.dts
465 create mode 100644 arch/arm/boot/dts/overlays/pitft22-overlay.dts
466 create mode 100644 arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
467 create mode 100644 arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
468 create mode 100644 arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
469 create mode 100644 arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
470 create mode 100644 arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
471 create mode 100644 arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
472 create mode 100644 arch/arm/boot/dts/overlays/pwm-overlay.dts
473 create mode 100644 arch/arm/boot/dts/overlays/qca7000-overlay.dts
474 create mode 100644 arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
475 create mode 100644 arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
476 create mode 100644 arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
477 create mode 100644 arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
478 create mode 100644 arch/arm/boot/dts/overlays/rpi-display-overlay.dts
479 create mode 100644 arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
480 create mode 100644 arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
481 create mode 100644 arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
482 create mode 100644 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
483 create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
484 create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
485 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
486 create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
487 create mode 100644 arch/arm/boot/dts/overlays/sdhost-overlay.dts
488 create mode 100644 arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts
489 create mode 100644 arch/arm/boot/dts/overlays/sdio-overlay.dts
490 create mode 100644 arch/arm/boot/dts/overlays/sdtweak-overlay.dts
491 create mode 100644 arch/arm/boot/dts/overlays/smi-dev-overlay.dts
492 create mode 100644 arch/arm/boot/dts/overlays/smi-nand-overlay.dts
493 create mode 100644 arch/arm/boot/dts/overlays/smi-overlay.dts
494 create mode 100644 arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
495 create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
496 create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
497 create mode 100644 arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
498 create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
499 create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
500 create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
501 create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
502 create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
503 create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
504 create mode 100755 arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
505 create mode 100644 arch/arm/boot/dts/overlays/sx150x-overlay.dts
506 create mode 100644 arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
507 create mode 100755 arch/arm/boot/dts/overlays/uart0-overlay.dts
508 create mode 100644 arch/arm/boot/dts/overlays/uart1-overlay.dts
509 create mode 100644 arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts
510 create mode 100644 arch/arm/boot/dts/overlays/upstream-overlay.dts
511 create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
512 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
513 create mode 100644 arch/arm/boot/dts/overlays/vga666-overlay.dts
514 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
515 create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
516 create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts
517
518 --- a/.gitignore
519 +++ b/.gitignore
520 @@ -15,7 +15,7 @@
521 *.bin
522 *.bz2
523 *.c.[012]*.*
524 -*.dtb
525 +*.dtb*
526 *.dtb.S
527 *.dwo
528 *.elf
529 --- a/arch/arm/Makefile
530 +++ b/arch/arm/Makefile
531 @@ -341,6 +341,8 @@ $(INSTALL_TARGETS):
532
533 %.dtb: | scripts
534 $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
535 +%.dtbo: | scripts
536 + $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@
537
538 PHONY += dtbs dtbs_install
539
540 --- a/arch/arm/boot/dts/Makefile
541 +++ b/arch/arm/boot/dts/Makefile
542 @@ -1,4 +1,15 @@
543 # SPDX-License-Identifier: GPL-2.0
544 +
545 +dtb-$(CONFIG_ARCH_BCM2835) += \
546 + bcm2708-rpi-b.dtb \
547 + bcm2708-rpi-b-plus.dtb \
548 + bcm2708-rpi-cm.dtb \
549 + bcm2708-rpi-0-w.dtb \
550 + bcm2709-rpi-2-b.dtb \
551 + bcm2710-rpi-3-b.dtb \
552 + bcm2710-rpi-3-b-plus.dtb \
553 + bcm2710-rpi-cm3.dtb
554 +
555 dtb-$(CONFIG_ARCH_ALPINE) += \
556 alpine-db.dtb
557 dtb-$(CONFIG_MACH_ARTPEC6) += \
558 @@ -1207,3 +1218,13 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
559 aspeed-bmc-opp-zaius.dtb \
560 aspeed-bmc-portwell-neptune.dtb \
561 aspeed-bmc-quanta-q71l.dtb
562 +
563 +targets += dtbs dtbs_install
564 +targets += $(dtb-y)
565 +
566 +subdir-y := overlays
567 +
568 +# Enable fixups to support overlays on BCM2835 platforms
569 +ifeq ($(CONFIG_ARCH_BCM2835),y)
570 + DTC_FLAGS ?= -@
571 +endif
572 --- /dev/null
573 +++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts
574 @@ -0,0 +1,166 @@
575 +/dts-v1/;
576 +
577 +#include "bcm2708.dtsi"
578 +
579 +/ {
580 + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
581 + model = "Raspberry Pi Zero W";
582 +
583 + chosen {
584 + bootargs = "8250.nr_uarts=1";
585 + };
586 +
587 + aliases {
588 + serial0 = &uart1;
589 + serial1 = &uart0;
590 + };
591 +};
592 +
593 +&gpio {
594 + spi0_pins: spi0_pins {
595 + brcm,pins = <9 10 11>;
596 + brcm,function = <4>; /* alt0 */
597 + };
598 +
599 + spi0_cs_pins: spi0_cs_pins {
600 + brcm,pins = <8 7>;
601 + brcm,function = <1>; /* output */
602 + };
603 +
604 + i2c0_pins: i2c0 {
605 + brcm,pins = <0 1>;
606 + brcm,function = <4>;
607 + };
608 +
609 + i2c1_pins: i2c1 {
610 + brcm,pins = <2 3>;
611 + brcm,function = <4>;
612 + };
613 +
614 + i2s_pins: i2s {
615 + brcm,pins = <18 19 20 21>;
616 + brcm,function = <4>; /* alt0 */
617 + };
618 +
619 + sdio_pins: sdio_pins {
620 + brcm,pins = <34 35 36 37 38 39>;
621 + brcm,function = <7>; /* ALT3 = SD1 */
622 + brcm,pull = <0 2 2 2 2 2>;
623 + };
624 +
625 + bt_pins: bt_pins {
626 + brcm,pins = <43>;
627 + brcm,function = <4>; /* alt0:GPCLK2 */
628 + brcm,pull = <0>; /* none */
629 + };
630 +
631 + uart0_pins: uart0_pins {
632 + brcm,pins = <30 31 32 33>;
633 + brcm,function = <7>; /* alt3=UART0 */
634 + brcm,pull = <2 0 0 2>; /* up none none up */
635 + };
636 +
637 + uart1_pins: uart1_pins {
638 + brcm,pins;
639 + brcm,function;
640 + brcm,pull;
641 + };
642 +
643 + audio_pins: audio_pins {
644 + brcm,pins = <>;
645 + brcm,function = <>;
646 + };
647 +};
648 +
649 +&mmc {
650 + pinctrl-names = "default";
651 + pinctrl-0 = <&sdio_pins>;
652 + non-removable;
653 + bus-width = <4>;
654 + status = "okay";
655 +};
656 +
657 +&uart0 {
658 + pinctrl-names = "default";
659 + pinctrl-0 = <&uart0_pins &bt_pins>;
660 + status = "okay";
661 +};
662 +
663 +&uart1 {
664 + pinctrl-names = "default";
665 + pinctrl-0 = <&uart1_pins>;
666 + status = "okay";
667 +};
668 +
669 +&spi0 {
670 + pinctrl-names = "default";
671 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
672 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
673 +
674 + spidev0: spidev@0{
675 + compatible = "spidev";
676 + reg = <0>; /* CE0 */
677 + #address-cells = <1>;
678 + #size-cells = <0>;
679 + spi-max-frequency = <125000000>;
680 + };
681 +
682 + spidev1: spidev@1{
683 + compatible = "spidev";
684 + reg = <1>; /* CE1 */
685 + #address-cells = <1>;
686 + #size-cells = <0>;
687 + spi-max-frequency = <125000000>;
688 + };
689 +};
690 +
691 +&i2c0 {
692 + pinctrl-names = "default";
693 + pinctrl-0 = <&i2c0_pins>;
694 + clock-frequency = <100000>;
695 +};
696 +
697 +&i2c1 {
698 + pinctrl-names = "default";
699 + pinctrl-0 = <&i2c1_pins>;
700 + clock-frequency = <100000>;
701 +};
702 +
703 +&i2c2 {
704 + clock-frequency = <100000>;
705 +};
706 +
707 +&i2s {
708 + #sound-dai-cells = <0>;
709 + pinctrl-names = "default";
710 + pinctrl-0 = <&i2s_pins>;
711 +};
712 +
713 +&random {
714 + status = "okay";
715 +};
716 +
717 +&leds {
718 + act_led: act {
719 + label = "led0";
720 + linux,default-trigger = "mmc0";
721 + gpios = <&gpio 47 0>;
722 + };
723 +};
724 +
725 +&hdmi {
726 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
727 +};
728 +
729 +&audio {
730 + pinctrl-names = "default";
731 + pinctrl-0 = <&audio_pins>;
732 +};
733 +
734 +/ {
735 + __overrides__ {
736 + act_led_gpio = <&act_led>,"gpios:4";
737 + act_led_activelow = <&act_led>,"gpios:8";
738 + act_led_trigger = <&act_led>,"linux,default-trigger";
739 + };
740 +};
741 --- /dev/null
742 +++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
743 @@ -0,0 +1,122 @@
744 +/dts-v1/;
745 +
746 +#include "bcm2708.dtsi"
747 +#include "bcm283x-rpi-smsc9514.dtsi"
748 +
749 +/ {
750 + model = "Raspberry Pi Model B+";
751 +};
752 +
753 +&gpio {
754 + spi0_pins: spi0_pins {
755 + brcm,pins = <9 10 11>;
756 + brcm,function = <4>; /* alt0 */
757 + };
758 +
759 + spi0_cs_pins: spi0_cs_pins {
760 + brcm,pins = <8 7>;
761 + brcm,function = <1>; /* output */
762 + };
763 +
764 + i2c0_pins: i2c0 {
765 + brcm,pins = <0 1>;
766 + brcm,function = <4>;
767 + };
768 +
769 + i2c1_pins: i2c1 {
770 + brcm,pins = <2 3>;
771 + brcm,function = <4>;
772 + };
773 +
774 + i2s_pins: i2s {
775 + brcm,pins = <18 19 20 21>;
776 + brcm,function = <4>; /* alt0 */
777 + };
778 +
779 + audio_pins: audio_pins {
780 + brcm,pins = <40 45>;
781 + brcm,function = <4>;
782 + };
783 +};
784 +
785 +&uart0 {
786 + status = "okay";
787 +};
788 +
789 +&spi0 {
790 + pinctrl-names = "default";
791 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
792 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
793 +
794 + spidev0: spidev@0{
795 + compatible = "spidev";
796 + reg = <0>; /* CE0 */
797 + #address-cells = <1>;
798 + #size-cells = <0>;
799 + spi-max-frequency = <125000000>;
800 + };
801 +
802 + spidev1: spidev@1{
803 + compatible = "spidev";
804 + reg = <1>; /* CE1 */
805 + #address-cells = <1>;
806 + #size-cells = <0>;
807 + spi-max-frequency = <125000000>;
808 + };
809 +};
810 +
811 +&i2c0 {
812 + pinctrl-names = "default";
813 + pinctrl-0 = <&i2c0_pins>;
814 + clock-frequency = <100000>;
815 +};
816 +
817 +&i2c1 {
818 + pinctrl-names = "default";
819 + pinctrl-0 = <&i2c1_pins>;
820 + clock-frequency = <100000>;
821 +};
822 +
823 +&i2c2 {
824 + clock-frequency = <100000>;
825 +};
826 +
827 +&i2s {
828 + pinctrl-names = "default";
829 + pinctrl-0 = <&i2s_pins>;
830 +};
831 +
832 +&leds {
833 + act_led: act {
834 + label = "led0";
835 + linux,default-trigger = "mmc0";
836 + gpios = <&gpio 47 0>;
837 + };
838 +
839 + pwr_led: pwr {
840 + label = "led1";
841 + linux,default-trigger = "input";
842 + gpios = <&gpio 35 0>;
843 + };
844 +};
845 +
846 +&hdmi {
847 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
848 +};
849 +
850 +&audio {
851 + pinctrl-names = "default";
852 + pinctrl-0 = <&audio_pins>;
853 +};
854 +
855 +/ {
856 + __overrides__ {
857 + act_led_gpio = <&act_led>,"gpios:4";
858 + act_led_activelow = <&act_led>,"gpios:8";
859 + act_led_trigger = <&act_led>,"linux,default-trigger";
860 +
861 + pwr_led_gpio = <&pwr_led>,"gpios:4";
862 + pwr_led_activelow = <&pwr_led>,"gpios:8";
863 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
864 + };
865 +};
866 --- /dev/null
867 +++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
868 @@ -0,0 +1,112 @@
869 +/dts-v1/;
870 +
871 +#include "bcm2708.dtsi"
872 +#include "bcm283x-rpi-smsc9512.dtsi"
873 +
874 +/ {
875 + model = "Raspberry Pi Model B";
876 +};
877 +
878 +&gpio {
879 + spi0_pins: spi0_pins {
880 + brcm,pins = <9 10 11>;
881 + brcm,function = <4>; /* alt0 */
882 + };
883 +
884 + spi0_cs_pins: spi0_cs_pins {
885 + brcm,pins = <8 7>;
886 + brcm,function = <1>; /* output */
887 + };
888 +
889 + i2c0_pins: i2c0 {
890 + brcm,pins = <0 1>;
891 + brcm,function = <4>;
892 + };
893 +
894 + i2c1_pins: i2c1 {
895 + brcm,pins = <2 3>;
896 + brcm,function = <4>;
897 + };
898 +
899 + i2s_pins: i2s {
900 + brcm,pins = <28 29 30 31>;
901 + brcm,function = <6>; /* alt2 */
902 + };
903 +
904 + audio_pins: audio_pins {
905 + brcm,pins = <40 45>;
906 + brcm,function = <4>;
907 + };
908 +};
909 +
910 +&uart0 {
911 + status = "okay";
912 +};
913 +
914 +&spi0 {
915 + pinctrl-names = "default";
916 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
917 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
918 +
919 + spidev0: spidev@0{
920 + compatible = "spidev";
921 + reg = <0>; /* CE0 */
922 + #address-cells = <1>;
923 + #size-cells = <0>;
924 + spi-max-frequency = <125000000>;
925 + };
926 +
927 + spidev1: spidev@1{
928 + compatible = "spidev";
929 + reg = <1>; /* CE1 */
930 + #address-cells = <1>;
931 + #size-cells = <0>;
932 + spi-max-frequency = <125000000>;
933 + };
934 +};
935 +
936 +&i2c0 {
937 + pinctrl-names = "default";
938 + pinctrl-0 = <&i2c0_pins>;
939 + clock-frequency = <100000>;
940 +};
941 +
942 +&i2c1 {
943 + pinctrl-names = "default";
944 + pinctrl-0 = <&i2c1_pins>;
945 + clock-frequency = <100000>;
946 +};
947 +
948 +&i2c2 {
949 + clock-frequency = <100000>;
950 +};
951 +
952 +&i2s {
953 + pinctrl-names = "default";
954 + pinctrl-0 = <&i2s_pins>;
955 +};
956 +
957 +&leds {
958 + act_led: act {
959 + label = "led0";
960 + linux,default-trigger = "mmc0";
961 + gpios = <&gpio 16 1>;
962 + };
963 +};
964 +
965 +&hdmi {
966 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
967 +};
968 +
969 +&audio {
970 + pinctrl-names = "default";
971 + pinctrl-0 = <&audio_pins>;
972 +};
973 +
974 +/ {
975 + __overrides__ {
976 + act_led_gpio = <&act_led>,"gpios:4";
977 + act_led_activelow = <&act_led>,"gpios:8";
978 + act_led_trigger = <&act_led>,"linux,default-trigger";
979 + };
980 +};
981 --- /dev/null
982 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
983 @@ -0,0 +1,95 @@
984 +/dts-v1/;
985 +
986 +#include "bcm2708-rpi-cm.dtsi"
987 +
988 +/ {
989 + model = "Raspberry Pi Compute Module";
990 +};
991 +
992 +&uart0 {
993 + status = "okay";
994 +};
995 +
996 +&gpio {
997 + spi0_pins: spi0_pins {
998 + brcm,pins = <9 10 11>;
999 + brcm,function = <4>; /* alt0 */
1000 + };
1001 +
1002 + spi0_cs_pins: spi0_cs_pins {
1003 + brcm,pins = <8 7>;
1004 + brcm,function = <1>; /* output */
1005 + };
1006 +
1007 + i2c0_pins: i2c0 {
1008 + brcm,pins = <0 1>;
1009 + brcm,function = <4>;
1010 + };
1011 +
1012 + i2c1_pins: i2c1 {
1013 + brcm,pins = <2 3>;
1014 + brcm,function = <4>;
1015 + };
1016 +
1017 + i2s_pins: i2s {
1018 + brcm,pins = <18 19 20 21>;
1019 + brcm,function = <4>; /* alt0 */
1020 + };
1021 +
1022 + audio_pins: audio_pins {
1023 + brcm,pins;
1024 + brcm,function;
1025 + };
1026 +};
1027 +
1028 +&spi0 {
1029 + pinctrl-names = "default";
1030 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1031 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1032 +
1033 + spidev0: spidev@0{
1034 + compatible = "spidev";
1035 + reg = <0>; /* CE0 */
1036 + #address-cells = <1>;
1037 + #size-cells = <0>;
1038 + spi-max-frequency = <125000000>;
1039 + };
1040 +
1041 + spidev1: spidev@1{
1042 + compatible = "spidev";
1043 + reg = <1>; /* CE1 */
1044 + #address-cells = <1>;
1045 + #size-cells = <0>;
1046 + spi-max-frequency = <125000000>;
1047 + };
1048 +};
1049 +
1050 +&i2c0 {
1051 + pinctrl-names = "default";
1052 + pinctrl-0 = <&i2c0_pins>;
1053 + clock-frequency = <100000>;
1054 +};
1055 +
1056 +&i2c1 {
1057 + pinctrl-names = "default";
1058 + pinctrl-0 = <&i2c1_pins>;
1059 + clock-frequency = <100000>;
1060 +};
1061 +
1062 +&i2c2 {
1063 + clock-frequency = <100000>;
1064 +};
1065 +
1066 +&i2s {
1067 + pinctrl-names = "default";
1068 + pinctrl-0 = <&i2s_pins>;
1069 +};
1070 +
1071 +&audio {
1072 + pinctrl-names = "default";
1073 + pinctrl-0 = <&audio_pins>;
1074 +};
1075 +
1076 +&hdmi {
1077 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
1078 +};
1079 --- /dev/null
1080 +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
1081 @@ -0,0 +1,17 @@
1082 +#include "bcm2708.dtsi"
1083 +
1084 +&leds {
1085 + act_led: act {
1086 + label = "led0";
1087 + linux,default-trigger = "mmc0";
1088 + gpios = <&gpio 47 0>;
1089 + };
1090 +};
1091 +
1092 +/ {
1093 + __overrides__ {
1094 + act_led_gpio = <&act_led>,"gpios:4";
1095 + act_led_activelow = <&act_led>,"gpios:8";
1096 + act_led_trigger = <&act_led>,"linux,default-trigger";
1097 + };
1098 +};
1099 --- /dev/null
1100 +++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi
1101 @@ -0,0 +1,159 @@
1102 +/* Downstream version of bcm2835-rpi.dtsi */
1103 +
1104 +#include <dt-bindings/power/raspberrypi-power.h>
1105 +
1106 +/ {
1107 + memory {
1108 + device_type = "memory";
1109 + reg = <0x0 0x0>;
1110 + };
1111 +
1112 + aliases {
1113 + audio = &audio;
1114 + aux = &aux;
1115 + sound = &sound;
1116 + soc = &soc;
1117 + dma = &dma;
1118 + intc = &intc;
1119 + watchdog = &watchdog;
1120 + random = &random;
1121 + mailbox = &mailbox;
1122 + gpio = &gpio;
1123 + uart0 = &uart0;
1124 + sdhost = &sdhost;
1125 + mmc0 = &sdhost;
1126 + i2s = &i2s;
1127 + spi0 = &spi0;
1128 + i2c0 = &i2c0;
1129 + uart1 = &uart1;
1130 + spi1 = &spi1;
1131 + spi2 = &spi2;
1132 + mmc = &mmc;
1133 + mmc1 = &mmc;
1134 + i2c1 = &i2c1;
1135 + i2c2 = &i2c2;
1136 + usb = &usb;
1137 + leds = &leds;
1138 + fb = &fb;
1139 + thermal = &thermal;
1140 + axiperf = &axiperf;
1141 + };
1142 +
1143 + leds: leds {
1144 + compatible = "gpio-leds";
1145 + };
1146 +
1147 + soc {
1148 + gpiomem {
1149 + compatible = "brcm,bcm2835-gpiomem";
1150 + reg = <0x7e200000 0x1000>;
1151 + };
1152 +
1153 + firmware: firmware {
1154 + compatible = "raspberrypi,bcm2835-firmware";
1155 + mboxes = <&mailbox>;
1156 + };
1157 +
1158 + power: power {
1159 + compatible = "raspberrypi,bcm2835-power";
1160 + firmware = <&firmware>;
1161 + #power-domain-cells = <1>;
1162 + };
1163 +
1164 + fb: fb {
1165 + compatible = "brcm,bcm2708-fb";
1166 + firmware = <&firmware>;
1167 + status = "disabled";
1168 + };
1169 +
1170 + mailbox@7e00b840 {
1171 + compatible = "brcm,bcm2835-vchiq";
1172 + reg = <0x7e00b840 0x3c>;
1173 + interrupts = <0 2>;
1174 + };
1175 +
1176 + vcsm: vcsm {
1177 + compatible = "raspberrypi,bcm2835-vcsm";
1178 + firmware = <&firmware>;
1179 + status = "okay";
1180 + };
1181 +
1182 + /* Onboard audio */
1183 + audio: audio {
1184 + compatible = "brcm,bcm2835-audio";
1185 + brcm,pwm-channels = <8>;
1186 + status = "disabled";
1187 + };
1188 +
1189 + /* External sound card */
1190 + sound: sound {
1191 + status = "disabled";
1192 + };
1193 + };
1194 +
1195 + __overrides__ {
1196 + cache_line_size;
1197 +
1198 + uart0 = <&uart0>,"status";
1199 + uart1 = <&uart1>,"status";
1200 + i2s = <&i2s>,"status";
1201 + spi = <&spi0>,"status";
1202 + i2c0 = <&i2c0>,"status";
1203 + i2c1 = <&i2c1>,"status";
1204 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
1205 + i2c0_baudrate = <&i2c0>,"clock-frequency:0";
1206 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
1207 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
1208 +
1209 + audio = <&audio>,"status";
1210 + watchdog = <&watchdog>,"status";
1211 + random = <&random>,"status";
1212 + sd_overclock = <&sdhost>,"brcm,overclock-50:0";
1213 + sd_force_pio = <&sdhost>,"brcm,force-pio?";
1214 + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
1215 + sd_debug = <&sdhost>,"brcm,debug";
1216 + sdio_overclock = <&mmc>,"brcm,overclock-50:0";
1217 + axiperf = <&axiperf>,"status";
1218 + };
1219 +};
1220 +
1221 +&dma {
1222 + brcm,dma-channel-mask = <0x7f34>;
1223 +};
1224 +
1225 +&hdmi {
1226 + power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
1227 +};
1228 +
1229 +&usb {
1230 + power-domains = <&power RPI_POWER_DOMAIN_USB>;
1231 +};
1232 +
1233 +&clocks {
1234 + firmware = <&firmware>;
1235 +};
1236 +
1237 +sdhost_pins: &sdhost_gpio48 {
1238 + /* Add alias */
1239 +};
1240 +
1241 +&sdhost {
1242 + pinctrl-names = "default";
1243 + pinctrl-0 = <&sdhost_gpio48>;
1244 + bus-width = <4>;
1245 + brcm,overclock-50 = <0>;
1246 + brcm,pio-limit = <1>;
1247 + status = "okay";
1248 +};
1249 +
1250 +&fb {
1251 + status = "okay";
1252 +};
1253 +
1254 +&cpu_thermal {
1255 + /delete-node/ trips;
1256 +};
1257 +
1258 +&vec {
1259 + status = "disabled";
1260 +};
1261 --- /dev/null
1262 +++ b/arch/arm/boot/dts/bcm2708.dtsi
1263 @@ -0,0 +1,11 @@
1264 +#include "bcm2835.dtsi"
1265 +#include "bcm270x.dtsi"
1266 +#include "bcm2708-rpi.dtsi"
1267 +
1268 +/ {
1269 + /delete-node/ cpus;
1270 +
1271 + __overrides__ {
1272 + arm_freq;
1273 + };
1274 +};
1275 --- /dev/null
1276 +++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
1277 @@ -0,0 +1,123 @@
1278 +/dts-v1/;
1279 +
1280 +#include "bcm2709.dtsi"
1281 +#include "bcm283x-rpi-smsc9514.dtsi"
1282 +
1283 +/ {
1284 + compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
1285 + model = "Raspberry Pi 2 Model B";
1286 +};
1287 +
1288 +&gpio {
1289 + spi0_pins: spi0_pins {
1290 + brcm,pins = <9 10 11>;
1291 + brcm,function = <4>; /* alt0 */
1292 + };
1293 +
1294 + spi0_cs_pins: spi0_cs_pins {
1295 + brcm,pins = <8 7>;
1296 + brcm,function = <1>; /* output */
1297 + };
1298 +
1299 + i2c0_pins: i2c0 {
1300 + brcm,pins = <0 1>;
1301 + brcm,function = <4>;
1302 + };
1303 +
1304 + i2c1_pins: i2c1 {
1305 + brcm,pins = <2 3>;
1306 + brcm,function = <4>;
1307 + };
1308 +
1309 + i2s_pins: i2s {
1310 + brcm,pins = <18 19 20 21>;
1311 + brcm,function = <4>; /* alt0 */
1312 + };
1313 +
1314 + audio_pins: audio_pins {
1315 + brcm,pins = <40 45>;
1316 + brcm,function = <4>;
1317 + };
1318 +};
1319 +
1320 +&uart0 {
1321 + status = "okay";
1322 +};
1323 +
1324 +&spi0 {
1325 + pinctrl-names = "default";
1326 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1327 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1328 +
1329 + spidev0: spidev@0{
1330 + compatible = "spidev";
1331 + reg = <0>; /* CE0 */
1332 + #address-cells = <1>;
1333 + #size-cells = <0>;
1334 + spi-max-frequency = <125000000>;
1335 + };
1336 +
1337 + spidev1: spidev@1{
1338 + compatible = "spidev";
1339 + reg = <1>; /* CE1 */
1340 + #address-cells = <1>;
1341 + #size-cells = <0>;
1342 + spi-max-frequency = <125000000>;
1343 + };
1344 +};
1345 +
1346 +&i2c0 {
1347 + pinctrl-names = "default";
1348 + pinctrl-0 = <&i2c0_pins>;
1349 + clock-frequency = <100000>;
1350 +};
1351 +
1352 +&i2c1 {
1353 + pinctrl-names = "default";
1354 + pinctrl-0 = <&i2c1_pins>;
1355 + clock-frequency = <100000>;
1356 +};
1357 +
1358 +&i2c2 {
1359 + clock-frequency = <100000>;
1360 +};
1361 +
1362 +&i2s {
1363 + pinctrl-names = "default";
1364 + pinctrl-0 = <&i2s_pins>;
1365 +};
1366 +
1367 +&leds {
1368 + act_led: act {
1369 + label = "led0";
1370 + linux,default-trigger = "mmc0";
1371 + gpios = <&gpio 47 0>;
1372 + };
1373 +
1374 + pwr_led: pwr {
1375 + label = "led1";
1376 + linux,default-trigger = "input";
1377 + gpios = <&gpio 35 0>;
1378 + };
1379 +};
1380 +
1381 +&hdmi {
1382 + hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
1383 +};
1384 +
1385 +&audio {
1386 + pinctrl-names = "default";
1387 + pinctrl-0 = <&audio_pins>;
1388 +};
1389 +
1390 +/ {
1391 + __overrides__ {
1392 + act_led_gpio = <&act_led>,"gpios:4";
1393 + act_led_activelow = <&act_led>,"gpios:8";
1394 + act_led_trigger = <&act_led>,"linux,default-trigger";
1395 +
1396 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1397 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1398 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1399 + };
1400 +};
1401 --- /dev/null
1402 +++ b/arch/arm/boot/dts/bcm2709.dtsi
1403 @@ -0,0 +1,19 @@
1404 +#include "bcm2836.dtsi"
1405 +#include "bcm270x.dtsi"
1406 +#include "bcm2708-rpi.dtsi"
1407 +
1408 +/ {
1409 + soc {
1410 + ranges = <0x7e000000 0x3f000000 0x01000000>,
1411 + <0x40000000 0x40000000 0x00040000>;
1412 +
1413 + /delete-node/ timer@7e003000;
1414 + };
1415 +
1416 + __overrides__ {
1417 + arm_freq = <&v7_cpu0>, "clock-frequency:0",
1418 + <&v7_cpu1>, "clock-frequency:0",
1419 + <&v7_cpu2>, "clock-frequency:0",
1420 + <&v7_cpu3>, "clock-frequency:0";
1421 + };
1422 +};
1423 --- /dev/null
1424 +++ b/arch/arm/boot/dts/bcm270x.dtsi
1425 @@ -0,0 +1,152 @@
1426 +/* Downstream bcm283x.dtsi diff */
1427 +#include <dt-bindings/power/raspberrypi-power.h>
1428 +
1429 +/ {
1430 + chosen {
1431 + bootargs = "";
1432 + /delete-property/ stdout-path;
1433 + };
1434 +
1435 + soc: soc {
1436 +
1437 + watchdog: watchdog@7e100000 {
1438 + /* Add alias */
1439 + };
1440 +
1441 + random: rng@7e104000 {
1442 + /* Add alias */
1443 + };
1444 +
1445 + gpio@7e200000 { /* gpio */
1446 + interrupts = <2 17>, <2 18>;
1447 + };
1448 +
1449 + serial@7e201000 { /* uart0 */
1450 + /* Enable CTS bug workaround */
1451 + cts-event-workaround;
1452 + };
1453 +
1454 + i2s@7e203000 { /* i2s */
1455 + #sound-dai-cells = <0>;
1456 + reg = <0x7e203000 0x24>;
1457 + clocks = <&clocks BCM2835_CLOCK_PCM>;
1458 + };
1459 +
1460 + spi0: spi@7e204000 {
1461 + /* Add alias */
1462 + dmas = <&dma 6>, <&dma 7>;
1463 + dma-names = "tx", "rx";
1464 + };
1465 +
1466 + pixelvalve0: pixelvalve@7e206000 {
1467 + /* Add alias */
1468 + status = "disabled";
1469 + };
1470 +
1471 + pixelvalve1: pixelvalve@7e207000 {
1472 + /* Add alias */
1473 + status = "disabled";
1474 + };
1475 +
1476 + dpi: dpi@7e208000 {
1477 + compatible = "brcm,bcm2835-dpi";
1478 + reg = <0x7e208000 0x8c>;
1479 + clocks = <&clocks BCM2835_CLOCK_VPU>,
1480 + <&clocks BCM2835_CLOCK_DPI>;
1481 + clock-names = "core", "pixel";
1482 + #address-cells = <1>;
1483 + #size-cells = <0>;
1484 + status = "disabled";
1485 + };
1486 +
1487 + /delete-node/ sdhci@7e300000;
1488 +
1489 + mmc: mmc@7e300000 {
1490 + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
1491 + reg = <0x7e300000 0x100>;
1492 + interrupts = <2 30>;
1493 + clocks = <&clocks BCM2835_CLOCK_EMMC>;
1494 + dmas = <&dma 11>;
1495 + dma-names = "rx-tx";
1496 + brcm,overclock-50 = <0>;
1497 + status = "disabled";
1498 + };
1499 +
1500 + hvs: hvs@7e400000 {
1501 + /* Add alias */
1502 + status = "disabled";
1503 + };
1504 +
1505 + firmwarekms: firmwarekms@7e600000 {
1506 + compatible = "raspberrypi,rpi-firmware-kms";
1507 + /* SMI interrupt reg */
1508 + reg = <0x7e600000 0x100>;
1509 + interrupts = <2 16>;
1510 + brcm,firmware = <&firmware>;
1511 + status = "disabled";
1512 + };
1513 +
1514 + smi: smi@7e600000 {
1515 + compatible = "brcm,bcm2835-smi";
1516 + reg = <0x7e600000 0x100>;
1517 + interrupts = <2 16>;
1518 + clocks = <&clocks BCM2835_CLOCK_SMI>;
1519 + assigned-clocks = <&clocks BCM2835_CLOCK_SMI>;
1520 + assigned-clock-rates = <125000000>;
1521 + dmas = <&dma 4>;
1522 + dma-names = "rx-tx";
1523 + status = "disabled";
1524 + };
1525 +
1526 + pixelvalve2: pixelvalve@7e807000 {
1527 + /* Add alias */
1528 + status = "disabled";
1529 + };
1530 +
1531 + hdmi@7e902000 { /* hdmi */
1532 + status = "disabled";
1533 + };
1534 +
1535 + usb@7e980000 { /* usb */
1536 + compatible = "brcm,bcm2708-usb";
1537 + reg = <0x7e980000 0x10000>,
1538 + <0x7e006000 0x1000>;
1539 + interrupts = <2 0>,
1540 + <1 9>;
1541 + };
1542 +
1543 + v3d@7ec00000 { /* vd3 */
1544 + compatible = "brcm,vc4-v3d";
1545 + power-domains = <&power RPI_POWER_DOMAIN_V3D>;
1546 + status = "disabled";
1547 + };
1548 +
1549 + axiperf: axiperf {
1550 + compatible = "brcm,bcm2835-axiperf";
1551 + reg = <0x7e009800 0x100>,
1552 + <0x7ee08000 0x100>;
1553 + firmware = <&firmware>;
1554 + status = "disabled";
1555 + };
1556 + };
1557 +
1558 + vdd_5v0_reg: fixedregulator_5v0 {
1559 + compatible = "regulator-fixed";
1560 + regulator-name = "5v0";
1561 + regulator-min-microvolt = <5000000>;
1562 + regulator-max-microvolt = <5000000>;
1563 + regulator-always-on;
1564 + };
1565 +
1566 + vdd_3v3_reg: fixedregulator_3v3 {
1567 + compatible = "regulator-fixed";
1568 + regulator-name = "3v3";
1569 + regulator-min-microvolt = <3300000>;
1570 + regulator-max-microvolt = <3300000>;
1571 + regulator-always-on;
1572 + };
1573 +};
1574 +
1575 +&vc4 {
1576 + status = "disabled";
1577 +};
1578 --- /dev/null
1579 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
1580 @@ -0,0 +1,183 @@
1581 +/dts-v1/;
1582 +
1583 +#include "bcm2710.dtsi"
1584 +#include "bcm283x-rpi-lan7515.dtsi"
1585 +
1586 +/ {
1587 + compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
1588 + model = "Raspberry Pi 3 Model B+";
1589 +
1590 + chosen {
1591 + bootargs = "8250.nr_uarts=1";
1592 + };
1593 +
1594 + aliases {
1595 + serial0 = &uart1;
1596 + serial1 = &uart0;
1597 + };
1598 +};
1599 +
1600 +&gpio {
1601 + spi0_pins: spi0_pins {
1602 + brcm,pins = <9 10 11>;
1603 + brcm,function = <4>; /* alt0 */
1604 + };
1605 +
1606 + spi0_cs_pins: spi0_cs_pins {
1607 + brcm,pins = <8 7>;
1608 + brcm,function = <1>; /* output */
1609 + };
1610 +
1611 + i2c0_pins: i2c0 {
1612 + brcm,pins = <0 1>;
1613 + brcm,function = <4>;
1614 + };
1615 +
1616 + i2c1_pins: i2c1 {
1617 + brcm,pins = <2 3>;
1618 + brcm,function = <4>;
1619 + };
1620 +
1621 + i2s_pins: i2s {
1622 + brcm,pins = <18 19 20 21>;
1623 + brcm,function = <4>; /* alt0 */
1624 + };
1625 +
1626 + sdio_pins: sdio_pins {
1627 + brcm,pins = <34 35 36 37 38 39>;
1628 + brcm,function = <7>; // alt3 = SD1
1629 + brcm,pull = <0 2 2 2 2 2>;
1630 + };
1631 +
1632 + bt_pins: bt_pins {
1633 + brcm,pins = <43>;
1634 + brcm,function = <4>; /* alt0:GPCLK2 */
1635 + brcm,pull = <0>;
1636 + };
1637 +
1638 + uart0_pins: uart0_pins {
1639 + brcm,pins = <32 33>;
1640 + brcm,function = <7>; /* alt3=UART0 */
1641 + brcm,pull = <0 2>;
1642 + };
1643 +
1644 + uart1_pins: uart1_pins {
1645 + brcm,pins;
1646 + brcm,function;
1647 + brcm,pull;
1648 + };
1649 +
1650 + audio_pins: audio_pins {
1651 + brcm,pins = <40 41>;
1652 + brcm,function = <4>;
1653 + };
1654 +};
1655 +
1656 +&mmc {
1657 + pinctrl-names = "default";
1658 + pinctrl-0 = <&sdio_pins>;
1659 + non-removable;
1660 + bus-width = <4>;
1661 + status = "okay";
1662 + brcm,overclock-50 = <0>;
1663 +};
1664 +
1665 +&soc {
1666 + expgpio: expgpio {
1667 + compatible = "brcm,bcm2835-expgpio";
1668 + gpio-controller;
1669 + #gpio-cells = <2>;
1670 + firmware = <&firmware>;
1671 + status = "okay";
1672 + };
1673 +};
1674 +
1675 +&uart0 {
1676 + pinctrl-names = "default";
1677 + pinctrl-0 = <&uart0_pins &bt_pins>;
1678 + status = "okay";
1679 +};
1680 +
1681 +&uart1 {
1682 + pinctrl-names = "default";
1683 + pinctrl-0 = <&uart1_pins>;
1684 + status = "okay";
1685 +};
1686 +
1687 +&spi0 {
1688 + pinctrl-names = "default";
1689 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1690 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1691 +
1692 + spidev0: spidev@0{
1693 + compatible = "spidev";
1694 + reg = <0>; /* CE0 */
1695 + #address-cells = <1>;
1696 + #size-cells = <0>;
1697 + spi-max-frequency = <125000000>;
1698 + };
1699 +
1700 + spidev1: spidev@1{
1701 + compatible = "spidev";
1702 + reg = <1>; /* CE1 */
1703 + #address-cells = <1>;
1704 + #size-cells = <0>;
1705 + spi-max-frequency = <125000000>;
1706 + };
1707 +};
1708 +
1709 +&i2c0 {
1710 + pinctrl-names = "default";
1711 + pinctrl-0 = <&i2c0_pins>;
1712 + clock-frequency = <100000>;
1713 +};
1714 +
1715 +&i2c1 {
1716 + pinctrl-names = "default";
1717 + pinctrl-0 = <&i2c1_pins>;
1718 + clock-frequency = <100000>;
1719 +};
1720 +
1721 +&i2c2 {
1722 + clock-frequency = <100000>;
1723 +};
1724 +
1725 +&i2s {
1726 + pinctrl-names = "default";
1727 + pinctrl-0 = <&i2s_pins>;
1728 +};
1729 +
1730 +&leds {
1731 + act_led: act {
1732 + label = "led0";
1733 + linux,default-trigger = "mmc0";
1734 + gpios = <&gpio 29 0>;
1735 + };
1736 +
1737 + pwr_led: pwr {
1738 + label = "led1";
1739 + linux,default-trigger = "default-on";
1740 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
1741 + };
1742 +};
1743 +
1744 +&hdmi {
1745 + hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
1746 +};
1747 +
1748 +&audio {
1749 + pinctrl-names = "default";
1750 + pinctrl-0 = <&audio_pins>;
1751 +};
1752 +
1753 +/ {
1754 + __overrides__ {
1755 + act_led_gpio = <&act_led>,"gpios:4";
1756 + act_led_activelow = <&act_led>,"gpios:8";
1757 + act_led_trigger = <&act_led>,"linux,default-trigger";
1758 +
1759 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1760 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1761 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1762 + };
1763 +};
1764 --- /dev/null
1765 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
1766 @@ -0,0 +1,191 @@
1767 +/dts-v1/;
1768 +
1769 +#include "bcm2710.dtsi"
1770 +#include "bcm283x-rpi-smsc9514.dtsi"
1771 +
1772 +/ {
1773 + compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
1774 + model = "Raspberry Pi 3 Model B";
1775 +
1776 + chosen {
1777 + bootargs = "8250.nr_uarts=1";
1778 + };
1779 +
1780 + aliases {
1781 + serial0 = &uart1;
1782 + serial1 = &uart0;
1783 + };
1784 +};
1785 +
1786 +&gpio {
1787 + spi0_pins: spi0_pins {
1788 + brcm,pins = <9 10 11>;
1789 + brcm,function = <4>; /* alt0 */
1790 + };
1791 +
1792 + spi0_cs_pins: spi0_cs_pins {
1793 + brcm,pins = <8 7>;
1794 + brcm,function = <1>; /* output */
1795 + };
1796 +
1797 + i2c0_pins: i2c0 {
1798 + brcm,pins = <0 1>;
1799 + brcm,function = <4>;
1800 + };
1801 +
1802 + i2c1_pins: i2c1 {
1803 + brcm,pins = <2 3>;
1804 + brcm,function = <4>;
1805 + };
1806 +
1807 + i2s_pins: i2s {
1808 + brcm,pins = <18 19 20 21>;
1809 + brcm,function = <4>; /* alt0 */
1810 + };
1811 +
1812 + sdio_pins: sdio_pins {
1813 + brcm,pins = <34 35 36 37 38 39>;
1814 + brcm,function = <7>; // alt3 = SD1
1815 + brcm,pull = <0 2 2 2 2 2>;
1816 + };
1817 +
1818 + bt_pins: bt_pins {
1819 + brcm,pins = <43>;
1820 + brcm,function = <4>; /* alt0:GPCLK2 */
1821 + brcm,pull = <0>;
1822 + };
1823 +
1824 + uart0_pins: uart0_pins {
1825 + brcm,pins = <32 33>;
1826 + brcm,function = <7>; /* alt3=UART0 */
1827 + brcm,pull = <0 2>;
1828 + };
1829 +
1830 + uart1_pins: uart1_pins {
1831 + brcm,pins;
1832 + brcm,function;
1833 + brcm,pull;
1834 + };
1835 +
1836 + audio_pins: audio_pins {
1837 + brcm,pins = <40 41>;
1838 + brcm,function = <4>;
1839 + };
1840 +};
1841 +
1842 +&mmc {
1843 + pinctrl-names = "default";
1844 + pinctrl-0 = <&sdio_pins>;
1845 + non-removable;
1846 + bus-width = <4>;
1847 + status = "okay";
1848 + brcm,overclock-50 = <0>;
1849 +};
1850 +
1851 +&soc {
1852 + virtgpio: virtgpio {
1853 + compatible = "brcm,bcm2835-virtgpio";
1854 + gpio-controller;
1855 + #gpio-cells = <2>;
1856 + firmware = <&firmware>;
1857 + status = "okay";
1858 + };
1859 +
1860 + expgpio: expgpio {
1861 + compatible = "brcm,bcm2835-expgpio";
1862 + gpio-controller;
1863 + #gpio-cells = <2>;
1864 + firmware = <&firmware>;
1865 + status = "okay";
1866 + };
1867 +};
1868 +
1869 +&uart0 {
1870 + pinctrl-names = "default";
1871 + pinctrl-0 = <&uart0_pins &bt_pins>;
1872 + status = "okay";
1873 +};
1874 +
1875 +&uart1 {
1876 + pinctrl-names = "default";
1877 + pinctrl-0 = <&uart1_pins>;
1878 + status = "okay";
1879 +};
1880 +
1881 +&spi0 {
1882 + pinctrl-names = "default";
1883 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
1884 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
1885 +
1886 + spidev0: spidev@0{
1887 + compatible = "spidev";
1888 + reg = <0>; /* CE0 */
1889 + #address-cells = <1>;
1890 + #size-cells = <0>;
1891 + spi-max-frequency = <125000000>;
1892 + };
1893 +
1894 + spidev1: spidev@1{
1895 + compatible = "spidev";
1896 + reg = <1>; /* CE1 */
1897 + #address-cells = <1>;
1898 + #size-cells = <0>;
1899 + spi-max-frequency = <125000000>;
1900 + };
1901 +};
1902 +
1903 +&i2c0 {
1904 + pinctrl-names = "default";
1905 + pinctrl-0 = <&i2c0_pins>;
1906 + clock-frequency = <100000>;
1907 +};
1908 +
1909 +&i2c1 {
1910 + pinctrl-names = "default";
1911 + pinctrl-0 = <&i2c1_pins>;
1912 + clock-frequency = <100000>;
1913 +};
1914 +
1915 +&i2c2 {
1916 + clock-frequency = <100000>;
1917 +};
1918 +
1919 +&i2s {
1920 + pinctrl-names = "default";
1921 + pinctrl-0 = <&i2s_pins>;
1922 +};
1923 +
1924 +&leds {
1925 + act_led: act {
1926 + label = "led0";
1927 + linux,default-trigger = "mmc0";
1928 + gpios = <&virtgpio 0 0>;
1929 + };
1930 +
1931 + pwr_led: pwr {
1932 + label = "led1";
1933 + linux,default-trigger = "input";
1934 + gpios = <&expgpio 7 0>;
1935 + };
1936 +};
1937 +
1938 +&hdmi {
1939 + hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
1940 +};
1941 +
1942 +&audio {
1943 + pinctrl-names = "default";
1944 + pinctrl-0 = <&audio_pins>;
1945 +};
1946 +
1947 +/ {
1948 + __overrides__ {
1949 + act_led_gpio = <&act_led>,"gpios:4";
1950 + act_led_activelow = <&act_led>,"gpios:8";
1951 + act_led_trigger = <&act_led>,"linux,default-trigger";
1952 +
1953 + pwr_led_gpio = <&pwr_led>,"gpios:4";
1954 + pwr_led_activelow = <&pwr_led>,"gpios:8";
1955 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
1956 + };
1957 +};
1958 --- /dev/null
1959 +++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
1960 @@ -0,0 +1,129 @@
1961 +/dts-v1/;
1962 +
1963 +#include "bcm2710.dtsi"
1964 +
1965 +/ {
1966 + model = "Raspberry Pi Compute Module 3";
1967 +};
1968 +
1969 +&uart0 {
1970 + status = "okay";
1971 +};
1972 +
1973 +&gpio {
1974 + spi0_pins: spi0_pins {
1975 + brcm,pins = <9 10 11>;
1976 + brcm,function = <4>; /* alt0 */
1977 + };
1978 +
1979 + spi0_cs_pins: spi0_cs_pins {
1980 + brcm,pins = <8 7>;
1981 + brcm,function = <1>; /* output */
1982 + };
1983 +
1984 + i2c0_pins: i2c0 {
1985 + brcm,pins = <0 1>;
1986 + brcm,function = <4>;
1987 + };
1988 +
1989 + i2c1_pins: i2c1 {
1990 + brcm,pins = <2 3>;
1991 + brcm,function = <4>;
1992 + };
1993 +
1994 + i2s_pins: i2s {
1995 + brcm,pins = <18 19 20 21>;
1996 + brcm,function = <4>; /* alt0 */
1997 + };
1998 +
1999 + audio_pins: audio_pins {
2000 + brcm,pins;
2001 + brcm,function;
2002 + };
2003 +};
2004 +
2005 +&soc {
2006 + virtgpio: virtgpio {
2007 + compatible = "brcm,bcm2835-virtgpio";
2008 + gpio-controller;
2009 + #gpio-cells = <2>;
2010 + firmware = <&firmware>;
2011 + status = "okay";
2012 + };
2013 +
2014 + expgpio: expgpio {
2015 + compatible = "brcm,bcm2835-expgpio";
2016 + gpio-controller;
2017 + #gpio-cells = <2>;
2018 + firmware = <&firmware>;
2019 + status = "okay";
2020 + };
2021 +};
2022 +
2023 +&spi0 {
2024 + pinctrl-names = "default";
2025 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
2026 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
2027 +
2028 + spidev0: spidev@0{
2029 + compatible = "spidev";
2030 + reg = <0>; /* CE0 */
2031 + #address-cells = <1>;
2032 + #size-cells = <0>;
2033 + spi-max-frequency = <125000000>;
2034 + };
2035 +
2036 + spidev1: spidev@1{
2037 + compatible = "spidev";
2038 + reg = <1>; /* CE1 */
2039 + #address-cells = <1>;
2040 + #size-cells = <0>;
2041 + spi-max-frequency = <125000000>;
2042 + };
2043 +};
2044 +
2045 +&i2c0 {
2046 + pinctrl-names = "default";
2047 + pinctrl-0 = <&i2c0_pins>;
2048 + clock-frequency = <100000>;
2049 +};
2050 +
2051 +&i2c1 {
2052 + pinctrl-names = "default";
2053 + pinctrl-0 = <&i2c1_pins>;
2054 + clock-frequency = <100000>;
2055 +};
2056 +
2057 +&i2c2 {
2058 + clock-frequency = <100000>;
2059 +};
2060 +
2061 +&i2s {
2062 + pinctrl-names = "default";
2063 + pinctrl-0 = <&i2s_pins>;
2064 +};
2065 +
2066 +&leds {
2067 + act_led: act {
2068 + label = "led0";
2069 + linux,default-trigger = "mmc0";
2070 + gpios = <&virtgpio 0 0>;
2071 + };
2072 +};
2073 +
2074 +&hdmi {
2075 + hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>;
2076 +};
2077 +
2078 +&audio {
2079 + pinctrl-names = "default";
2080 + pinctrl-0 = <&audio_pins>;
2081 +};
2082 +
2083 +/ {
2084 + __overrides__ {
2085 + act_led_gpio = <&act_led>,"gpios:4";
2086 + act_led_activelow = <&act_led>,"gpios:8";
2087 + act_led_trigger = <&act_led>,"linux,default-trigger";
2088 + };
2089 +};
2090 --- /dev/null
2091 +++ b/arch/arm/boot/dts/bcm2710.dtsi
2092 @@ -0,0 +1,29 @@
2093 +#include "bcm2837.dtsi"
2094 +#include "bcm270x.dtsi"
2095 +#include "bcm2708-rpi.dtsi"
2096 +
2097 +/ {
2098 + compatible = "brcm,bcm2837", "brcm,bcm2836";
2099 +
2100 + soc {
2101 +
2102 + arm-pmu {
2103 +#ifdef RPI364
2104 + compatible = "arm,armv8-pmuv3", "arm,cortex-a7-pmu";
2105 +#else
2106 + compatible = "arm,cortex-a7-pmu";
2107 +#endif
2108 + interrupt-parent = <&local_intc>;
2109 + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
2110 + };
2111 +
2112 + /delete-node/ timer@7e003000;
2113 + };
2114 +
2115 + __overrides__ {
2116 + arm_freq = <&cpu0>, "clock-frequency:0",
2117 + <&cpu1>, "clock-frequency:0",
2118 + <&cpu2>, "clock-frequency:0",
2119 + <&cpu3>, "clock-frequency:0";
2120 + };
2121 +};
2122 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
2123 +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
2124 @@ -32,7 +32,7 @@
2125
2126 mailbox@7e00b840 {
2127 compatible = "brcm,bcm2835-vchiq";
2128 - reg = <0x7e00b840 0xf>;
2129 + reg = <0x7e00b840 0x3c>;
2130 interrupts = <0 2>;
2131 };
2132 };
2133 --- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
2134 +++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
2135 @@ -21,7 +21,24 @@
2136 ethernet: ethernet@1 {
2137 compatible = "usb424,7800";
2138 reg = <1>;
2139 + microchip,eee-enabled;
2140 + microchip,tx-lpi-timer = <600>; /* non-aggressive*/
2141 + /*
2142 + * led0 = 1:link1000/activity
2143 + * led1 = 6:link10/100/activity
2144 + */
2145 + microchip,led-modes = <1 6>;
2146 };
2147 };
2148 };
2149 };
2150 +
2151 +
2152 +/ {
2153 + __overrides__ {
2154 + eee = <&ethernet>,"microchip,eee-enabled?";
2155 + tx_lpi_timer = <&ethernet>,"microchip,tx-lpi-timer:0";
2156 + eth_led0 = <&ethernet>,"microchip,led-modes:0";
2157 + eth_led1 = <&ethernet>,"microchip,led-modes:4";
2158 + };
2159 +};
2160 --- /dev/null
2161 +++ b/arch/arm/boot/dts/overlays/Makefile
2162 @@ -0,0 +1,145 @@
2163 +# Overlays for the Raspberry Pi platform
2164 +
2165 +dtbo-$(CONFIG_ARCH_BCM2835) += \
2166 + adau1977-adc.dtbo \
2167 + adau7002-simple.dtbo \
2168 + ads1015.dtbo \
2169 + ads1115.dtbo \
2170 + ads7846.dtbo \
2171 + akkordion-iqdacplus.dtbo \
2172 + allo-boss-dac-pcm512x-audio.dtbo \
2173 + allo-digione.dtbo \
2174 + allo-katana-dac-audio.dtbo \
2175 + allo-piano-dac-pcm512x-audio.dtbo \
2176 + allo-piano-dac-plus-pcm512x-audio.dtbo \
2177 + applepi-dac.dtbo \
2178 + at86rf233.dtbo \
2179 + audioinjector-addons.dtbo \
2180 + audioinjector-wm8731-audio.dtbo \
2181 + audremap.dtbo \
2182 + balena-fin.dtbo \
2183 + bmp085_i2c-sensor.dtbo \
2184 + dht11.dtbo \
2185 + dionaudio-loco.dtbo \
2186 + dionaudio-loco-v2.dtbo \
2187 + dpi18.dtbo \
2188 + dpi24.dtbo \
2189 + dwc-otg.dtbo \
2190 + dwc2.dtbo \
2191 + enc28j60.dtbo \
2192 + enc28j60-spi2.dtbo \
2193 + exc3000.dtbo \
2194 + fe-pi-audio.dtbo \
2195 + goodix.dtbo \
2196 + googlevoicehat-soundcard.dtbo \
2197 + gpio-ir.dtbo \
2198 + gpio-ir-tx.dtbo \
2199 + gpio-key.dtbo \
2200 + gpio-no-irq.dtbo \
2201 + gpio-poweroff.dtbo \
2202 + gpio-shutdown.dtbo \
2203 + hifiberry-amp.dtbo \
2204 + hifiberry-dac.dtbo \
2205 + hifiberry-dacplus.dtbo \
2206 + hifiberry-digi.dtbo \
2207 + hifiberry-digi-pro.dtbo \
2208 + hy28a.dtbo \
2209 + hy28b.dtbo \
2210 + i2c-bcm2708.dtbo \
2211 + i2c-gpio.dtbo \
2212 + i2c-mux.dtbo \
2213 + i2c-pwm-pca9685a.dtbo \
2214 + i2c-rtc.dtbo \
2215 + i2c-rtc-gpio.dtbo \
2216 + i2c-sensor.dtbo \
2217 + i2c0-bcm2708.dtbo \
2218 + i2c1-bcm2708.dtbo \
2219 + i2s-gpio28-31.dtbo \
2220 + iqaudio-dac.dtbo \
2221 + iqaudio-dacplus.dtbo \
2222 + iqaudio-digi-wm8804-audio.dtbo \
2223 + jedec-spi-nor.dtbo \
2224 + justboom-dac.dtbo \
2225 + justboom-digi.dtbo \
2226 + lirc-rpi.dtbo \
2227 + ltc294x.dtbo \
2228 + mbed-dac.dtbo \
2229 + mcp23017.dtbo \
2230 + mcp23s17.dtbo \
2231 + mcp2515-can0.dtbo \
2232 + mcp2515-can1.dtbo \
2233 + mcp3008.dtbo \
2234 + mcp3202.dtbo \
2235 + media-center.dtbo \
2236 + midi-uart0.dtbo \
2237 + midi-uart1.dtbo \
2238 + mmc.dtbo \
2239 + mpu6050.dtbo \
2240 + mz61581.dtbo \
2241 + papirus.dtbo \
2242 + pi3-act-led.dtbo \
2243 + pi3-disable-bt.dtbo \
2244 + pi3-disable-wifi.dtbo \
2245 + pi3-miniuart-bt.dtbo \
2246 + pibell.dtbo \
2247 + piscreen.dtbo \
2248 + piscreen2r.dtbo \
2249 + pisound.dtbo \
2250 + pitft22.dtbo \
2251 + pitft28-capacitive.dtbo \
2252 + pitft28-resistive.dtbo \
2253 + pitft35-resistive.dtbo \
2254 + pps-gpio.dtbo \
2255 + pwm.dtbo \
2256 + pwm-2chan.dtbo \
2257 + pwm-ir-tx.dtbo \
2258 + qca7000.dtbo \
2259 + rotary-encoder.dtbo \
2260 + rpi-backlight.dtbo \
2261 + rpi-cirrus-wm5102.dtbo \
2262 + rpi-dac.dtbo \
2263 + rpi-display.dtbo \
2264 + rpi-ft5406.dtbo \
2265 + rpi-proto.dtbo \
2266 + rpi-sense.dtbo \
2267 + rpi-tv.dtbo \
2268 + rra-digidac1-wm8741-audio.dtbo \
2269 + sc16is750-i2c.dtbo \
2270 + sc16is752-i2c.dtbo \
2271 + sc16is752-spi1.dtbo \
2272 + sdhost.dtbo \
2273 + sdio.dtbo \
2274 + sdio-1bit.dtbo \
2275 + sdtweak.dtbo \
2276 + smi.dtbo \
2277 + smi-dev.dtbo \
2278 + smi-nand.dtbo \
2279 + spi-gpio35-39.dtbo \
2280 + spi-rtc.dtbo \
2281 + spi0-cs.dtbo \
2282 + spi0-hw-cs.dtbo \
2283 + spi1-1cs.dtbo \
2284 + spi1-2cs.dtbo \
2285 + spi1-3cs.dtbo \
2286 + spi2-1cs.dtbo \
2287 + spi2-2cs.dtbo \
2288 + spi2-3cs.dtbo \
2289 + superaudioboard.dtbo \
2290 + sx150x.dtbo \
2291 + tinylcd35.dtbo \
2292 + uart0.dtbo \
2293 + uart1.dtbo \
2294 + upstream.dtbo \
2295 + upstream-aux-interrupt.dtbo \
2296 + vc4-fkms-v3d.dtbo \
2297 + vc4-kms-v3d.dtbo \
2298 + vga666.dtbo \
2299 + w1-gpio.dtbo \
2300 + w1-gpio-pullup.dtbo \
2301 + wittypi.dtbo
2302 +
2303 +targets += dtbs dtbs_install
2304 +targets += $(dtbo-y)
2305 +
2306 +always := $(dtbo-y)
2307 +clean-files := *.dtbo
2308 --- /dev/null
2309 +++ b/arch/arm/boot/dts/overlays/README
2310 @@ -0,0 +1,1952 @@
2311 +Introduction
2312 +============
2313 +
2314 +This directory contains Device Tree overlays. Device Tree makes it possible
2315 +to support many hardware configurations with a single kernel and without the
2316 +need to explicitly load or blacklist kernel modules. Note that this isn't a
2317 +"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
2318 +are still configured by the board support code, but the intention is to
2319 +eventually reach that goal.
2320 +
2321 +On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
2322 +default, the Raspberry Pi kernel boots with device tree enabled. You can
2323 +completely disable DT usage (for now) by adding:
2324 +
2325 + device_tree=
2326 +
2327 +to your config.txt, which should cause your Pi to revert to the old way of
2328 +doing things after a reboot.
2329 +
2330 +In /boot you will find a .dtb for each base platform. This describes the
2331 +hardware that is part of the Raspberry Pi board. The loader (start.elf and its
2332 +siblings) selects the .dtb file appropriate for the platform by name, and reads
2333 +it into memory. At this point, all of the optional interfaces (i2c, i2s, spi)
2334 +are disabled, but they can be enabled using Device Tree parameters:
2335 +
2336 + dtparam=i2c=on,i2s=on,spi=on
2337 +
2338 +However, this shouldn't be necessary in many use cases because loading an
2339 +overlay that requires one of those interfaces will cause it to be enabled
2340 +automatically, and it is advisable to only enable interfaces if they are
2341 +needed.
2342 +
2343 +Configuring additional, optional hardware is done using Device Tree overlays
2344 +(see below).
2345 +
2346 +GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and
2347 +not the physical pin numbers.
2348 +
2349 +raspi-config
2350 +============
2351 +
2352 +The Advanced Options section of the raspi-config utility can enable and disable
2353 +Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it
2354 +is possible to both enable an interface and blacklist the driver, if for some
2355 +reason you should want to defer the loading.
2356 +
2357 +Modules
2358 +=======
2359 +
2360 +As well as describing the hardware, Device Tree also gives enough information
2361 +to allow suitable driver modules to be located and loaded, with the corollary
2362 +that unneeded modules are not loaded. As a result it should be possible to
2363 +remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can
2364 +have its contents deleted (or commented out).
2365 +
2366 +Using Overlays
2367 +==============
2368 +
2369 +Overlays are loaded using the "dtoverlay" directive. As an example, consider
2370 +the popular lirc-rpi module, the Linux Infrared Remote Control driver. In the
2371 +pre-DT world this would be loaded from /etc/modules, with an explicit
2372 +"modprobe lirc-rpi" command, or programmatically by lircd. With DT enabled,
2373 +this becomes a line in config.txt:
2374 +
2375 + dtoverlay=lirc-rpi
2376 +
2377 +This causes the file /boot/overlays/lirc-rpi.dtbo to be loaded. By
2378 +default it will use GPIOs 17 (out) and 18 (in), but this can be modified using
2379 +DT parameters:
2380 +
2381 + dtoverlay=lirc-rpi,gpio_out_pin=17,gpio_in_pin=13
2382 +
2383 +Parameters always have default values, although in some cases (e.g. "w1-gpio")
2384 +it is necessary to provided multiple overlays in order to get the desired
2385 +behaviour. See the list of overlays below for a description of the parameters
2386 +and their defaults.
2387 +
2388 +The Overlay and Parameter Reference
2389 +===================================
2390 +
2391 +N.B. When editing this file, please preserve the indentation levels to make it
2392 +simple to parse programmatically. NO HARD TABS.
2393 +
2394 +
2395 +Name: <The base DTB>
2396 +Info: Configures the base Raspberry Pi hardware
2397 +Load: <loaded automatically>
2398 +Params:
2399 + audio Set to "on" to enable the onboard ALSA audio
2400 + interface (default "off")
2401 +
2402 + eee Enable Energy Efficient Ethernet support for
2403 + compatible devices (default "on"). See also
2404 + "tx_lpi_timer".
2405 +
2406 + eth_led0 Set mode of LED0 (usually orange) (default
2407 + "1"). The legal values are:
2408 + 0=link/activity 1=link1000/activity
2409 + 2=link100/activity 3=link10/activity
2410 + 4=link100/1000/activity 5=link10/1000/activity
2411 + 6=link10/100/activity 14=off 15=on
2412 +
2413 + eth_led1 Set mode of LED1 (usually green) (default
2414 + "6"). See eth_led0 for legal values.
2415 +
2416 + i2c_arm Set to "on" to enable the ARM's i2c interface
2417 + (default "off")
2418 +
2419 + i2c_vc Set to "on" to enable the i2c interface
2420 + usually reserved for the VideoCore processor
2421 + (default "off")
2422 +
2423 + i2c An alias for i2c_arm
2424 +
2425 + i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
2426 + (default "100000")
2427 +
2428 + i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
2429 + (default "100000")
2430 +
2431 + i2c_baudrate An alias for i2c_arm_baudrate
2432 +
2433 + i2s Set to "on" to enable the i2s interface
2434 + (default "off")
2435 +
2436 + spi Set to "on" to enable the spi interfaces
2437 + (default "off")
2438 +
2439 + random Set to "on" to enable the hardware random
2440 + number generator (default "on")
2441 +
2442 + sd_overclock Clock (in MHz) to use when the MMC framework
2443 + requests 50MHz
2444 +
2445 + sd_force_pio Disable DMA support for SD driver (default off)
2446 +
2447 + sd_pio_limit Number of blocks above which to use DMA for
2448 + SD card (default 1)
2449 +
2450 + sd_debug Enable debug output from SD driver (default off)
2451 +
2452 + sdio_overclock Clock (in MHz) to use when the MMC framework
2453 + requests 50MHz for the SDIO/WiFi interface.
2454 +
2455 + tx_lpi_timer Set the delay in microseconds between going idle
2456 + and entering the low power state (default 600).
2457 + Requires EEE to be enabled - see "eee".
2458 +
2459 + uart0 Set to "off" to disable uart0 (default "on")
2460 +
2461 + uart1 Set to "on" or "off" to enable or disable uart1
2462 + (default varies)
2463 +
2464 + watchdog Set to "on" to enable the hardware watchdog
2465 + (default "off")
2466 +
2467 + act_led_trigger Choose which activity the LED tracks.
2468 + Use "heartbeat" for a nice load indicator.
2469 + (default "mmc")
2470 +
2471 + act_led_activelow Set to "on" to invert the sense of the LED
2472 + (default "off")
2473 + N.B. For Pi3 see pi3-act-led overlay.
2474 +
2475 + act_led_gpio Set which GPIO to use for the activity LED
2476 + (in case you want to connect it to an external
2477 + device)
2478 + (default "16" on a non-Plus board, "47" on a
2479 + Plus or Pi 2)
2480 + N.B. For Pi3 see pi3-act-led overlay.
2481 +
2482 + pwr_led_trigger
2483 + pwr_led_activelow
2484 + pwr_led_gpio
2485 + As for act_led_*, but using the PWR LED.
2486 + Not available on Model A/B boards.
2487 +
2488 + N.B. It is recommended to only enable those interfaces that are needed.
2489 + Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc
2490 + interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.)
2491 + Note also that i2c, i2c_arm and i2c_vc are aliases for the physical
2492 + interfaces i2c0 and i2c1. Use of the numeric variants is still possible
2493 + but deprecated because the ARM/VC assignments differ between board
2494 + revisions. The same board-specific mapping applies to i2c_baudrate,
2495 + and the other i2c baudrate parameters.
2496 +
2497 +
2498 +Name: adau1977-adc
2499 +Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
2500 + and I2S for data.
2501 +Load: dtoverlay=adau1977-adc
2502 +Params: <None>
2503 +
2504 +
2505 +Name: adau7002-simple
2506 +Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter.
2507 +Load: dtoverlay=adau7002-simple,<param>=<val>
2508 +Params: card-name Override the default, "adau7002", card name.
2509 +
2510 +
2511 +Name: ads1015
2512 +Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
2513 +Load: dtoverlay=ads1015,<param>=<val>
2514 +Params: addr I2C bus address of device. Set based on how the
2515 + addr pin is wired. (default=0x48 assumes addr
2516 + is pulled to GND)
2517 + cha_enable Enable virtual channel a. (default=true)
2518 + cha_cfg Set the configuration for virtual channel a.
2519 + (default=4 configures this channel for the
2520 + voltage at A0 with respect to GND)
2521 + cha_datarate Set the datarate (samples/sec) for this channel.
2522 + (default=4 sets 1600 sps)
2523 + cha_gain Set the gain of the Programmable Gain
2524 + Amplifier for this channel. (default=2 sets the
2525 + full scale of the channel to 2.048 Volts)
2526 +
2527 + Channel (ch) parameters can be set for each enabled channel.
2528 + A maximum of 4 channels can be enabled (letters a thru d).
2529 + For more information refer to the device datasheet at:
2530 + http://www.ti.com/lit/ds/symlink/ads1015.pdf
2531 +
2532 +
2533 +Name: ads1115
2534 +Info: Texas Instruments ADS1115 ADC
2535 +Load: dtoverlay=ads1115,<param>[=<val>]
2536 +Params: addr I2C bus address of device. Set based on how the
2537 + addr pin is wired. (default=0x48 assumes addr
2538 + is pulled to GND)
2539 + cha_enable Enable virtual channel a.
2540 + cha_cfg Set the configuration for virtual channel a.
2541 + (default=4 configures this channel for the
2542 + voltage at A0 with respect to GND)
2543 + cha_datarate Set the datarate (samples/sec) for this channel.
2544 + (default=7 sets 860 sps)
2545 + cha_gain Set the gain of the Programmable Gain
2546 + Amplifier for this channel. (Default 1 sets the
2547 + full scale of the channel to 4.096 Volts)
2548 +
2549 + Channel parameters can be set for each enabled channel.
2550 + A maximum of 4 channels can be enabled (letters a thru d).
2551 + For more information refer to the device datasheet at:
2552 + http://www.ti.com/lit/ds/symlink/ads1115.pdf
2553 +
2554 +
2555 +Name: ads7846
2556 +Info: ADS7846 Touch controller
2557 +Load: dtoverlay=ads7846,<param>=<val>
2558 +Params: cs SPI bus Chip Select (default 1)
2559 + speed SPI bus speed (default 2MHz, max 3.25MHz)
2560 + penirq GPIO used for PENIRQ. REQUIRED
2561 + penirq_pull Set GPIO pull (default 0=none, 2=pullup)
2562 + swapxy Swap x and y axis
2563 + xmin Minimum value on the X axis (default 0)
2564 + ymin Minimum value on the Y axis (default 0)
2565 + xmax Maximum value on the X axis (default 4095)
2566 + ymax Maximum value on the Y axis (default 4095)
2567 + pmin Minimum reported pressure value (default 0)
2568 + pmax Maximum reported pressure value (default 65535)
2569 + xohms Touchpanel sensitivity (X-plate resistance)
2570 + (default 400)
2571 +
2572 + penirq is required and usually xohms (60-100) has to be set as well.
2573 + Apart from that, pmax (255) and swapxy are also common.
2574 + The rest of the calibration can be done with xinput-calibrator.
2575 + See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian
2576 + Device Tree binding document:
2577 + www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt
2578 +
2579 +
2580 +Name: akkordion-iqdacplus
2581 +Info: Configures the Digital Dreamtime Akkordion Music Player (based on the
2582 + OEM IQAudIO DAC+ or DAC Zero module).
2583 +Load: dtoverlay=akkordion-iqdacplus,<param>=<val>
2584 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2585 + Digital volume control. Enable with
2586 + dtoverlay=akkordion-iqdacplus,24db_digital_gain
2587 + (The default behaviour is that the Digital
2588 + volume control is limited to a maximum of
2589 + 0dB. ie. it can attenuate but not provide
2590 + gain. For most users, this will be desired
2591 + as it will prevent clipping. By appending
2592 + the 24db_digital_gain parameter, the Digital
2593 + volume control will allow up to 24dB of
2594 + gain. If this parameter is enabled, it is the
2595 + responsibility of the user to ensure that
2596 + the Digital volume control is set to a value
2597 + that does not result in clipping/distortion!)
2598 +
2599 +
2600 +Name: allo-boss-dac-pcm512x-audio
2601 +Info: Configures the Allo Boss DAC audio cards.
2602 +Load: dtoverlay=allo-boss-dac-pcm512x-audio,<param>
2603 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2604 + Digital volume control. Enable with
2605 + "dtoverlay=allo-boss-dac-pcm512x-audio,
2606 + 24db_digital_gain"
2607 + (The default behaviour is that the Digital
2608 + volume control is limited to a maximum of
2609 + 0dB. ie. it can attenuate but not provide
2610 + gain. For most users, this will be desired
2611 + as it will prevent clipping. By appending
2612 + the 24db_digital_gain parameter, the Digital
2613 + volume control will allow up to 24dB of
2614 + gain. If this parameter is enabled, it is the
2615 + responsibility of the user to ensure that
2616 + the Digital volume control is set to a value
2617 + that does not result in clipping/distortion!)
2618 + slave Force Boss DAC into slave mode, using Pi a
2619 + master for bit clock and frame clock. Enable
2620 + with "dtoverlay=allo-boss-dac-pcm512x-audio,
2621 + slave"
2622 +
2623 +
2624 +Name: allo-digione
2625 +Info: Configures the Allo Digione audio card
2626 +Load: dtoverlay=allo-digione
2627 +Params: <None>
2628 +
2629 +
2630 +Name: allo-katana-dac-audio
2631 +Info: Configures the Allo Katana DAC audio card
2632 +Load: dtoverlay=allo-katana-dac-audio
2633 +Params: <None>
2634 +
2635 +
2636 +Name: allo-piano-dac-pcm512x-audio
2637 +Info: Configures the Allo Piano DAC (2.0/2.1) audio cards.
2638 + (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo.
2639 + The subwoofer outputs on the Piano 2.1 are not currently supported!)
2640 +Load: dtoverlay=allo-piano-dac-pcm512x-audio,<param>
2641 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2642 + Digital volume control.
2643 + (The default behaviour is that the Digital
2644 + volume control is limited to a maximum of
2645 + 0dB. ie. it can attenuate but not provide
2646 + gain. For most users, this will be desired
2647 + as it will prevent clipping. By appending
2648 + the 24db_digital_gain parameter, the Digital
2649 + volume control will allow up to 24dB of
2650 + gain. If this parameter is enabled, it is the
2651 + responsibility of the user to ensure that
2652 + the Digital volume control is set to a value
2653 + that does not result in clipping/distortion!)
2654 +
2655 +
2656 +Name: allo-piano-dac-plus-pcm512x-audio
2657 +Info: Configures the Allo Piano DAC (2.1) audio cards.
2658 +Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio,<param>
2659 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2660 + Digital volume control.
2661 + (The default behaviour is that the Digital
2662 + volume control is limited to a maximum of
2663 + 0dB. ie. it can attenuate but not provide
2664 + gain. For most users, this will be desired
2665 + as it will prevent clipping. By appending
2666 + the 24db_digital_gain parameter, the Digital
2667 + volume control will allow up to 24dB of
2668 + gain. If this parameter is enabled, it is the
2669 + responsibility of the user to ensure that
2670 + the Digital volume control is set to a value
2671 + that does not result in clipping/distortion!)
2672 + glb_mclk This option is only with Kali board. If enabled,
2673 + MCLK for Kali is used and PLL is disabled for
2674 + better voice quality. (default Off)
2675 +
2676 +
2677 +Name: applepi-dac
2678 +Info: Configures the Orchard Audio ApplePi-DAC audio card
2679 +Load: dtoverlay=applepi-dac
2680 +Params: <None>
2681 +
2682 +
2683 +Name: at86rf233
2684 +Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver,
2685 + connected to spi0.0
2686 +Load: dtoverlay=at86rf233,<param>=<val>
2687 +Params: interrupt GPIO used for INT (default 23)
2688 + reset GPIO used for Reset (default 24)
2689 + sleep GPIO used for Sleep (default 25)
2690 + speed SPI bus speed in Hz (default 3000000)
2691 + trim Fine tuning of the internal capacitance
2692 + arrays (0=+0pF, 15=+4.5pF, default 15)
2693 +
2694 +
2695 +Name: audioinjector-addons
2696 +Info: Configures the audioinjector.net audio add on soundcards
2697 +Load: dtoverlay=audioinjector-addons,<param>=<val>
2698 +Params: non-stop-clocks Keeps the clocks running even when the stream
2699 + is paused or stopped (default off)
2700 +
2701 +
2702 +Name: audioinjector-wm8731-audio
2703 +Info: Configures the audioinjector.net audio add on soundcard
2704 +Load: dtoverlay=audioinjector-wm8731-audio
2705 +Params: <None>
2706 +
2707 +
2708 +Name: audremap
2709 +Info: Switches PWM sound output to pins 12 (Right) & 13 (Left)
2710 +Load: dtoverlay=audremap,<param>=<val>
2711 +Params: swap_lr Reverse the channel allocation, which will also
2712 + swap the audio jack outputs (default off)
2713 + enable_jack Don't switch off the audio jack output
2714 + (default off)
2715 +
2716 +
2717 +Name: balena-fin
2718 +Info: Overlay that enables WiFi, Bluetooth and the GPIO expander on the
2719 + Balena Fin board.
2720 +Load: dtoverlay=balena-fin
2721 +Params: <None>
2722 +
2723 +
2724 +Name: bmp085_i2c-sensor
2725 +Info: This overlay is now deprecated - see i2c-sensor
2726 +Load: dtoverlay=bmp085_i2c-sensor
2727 +Params: <None>
2728 +
2729 +
2730 +Name: dht11
2731 +Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
2732 + Also sometimes found with the part number(s) AM230x.
2733 +Load: dtoverlay=dht11,<param>=<val>
2734 +Params: gpiopin GPIO connected to the sensor's DATA output.
2735 + (default 4)
2736 +
2737 +
2738 +Name: dionaudio-loco
2739 +Info: Configures the Dion Audio LOCO DAC-AMP
2740 +Load: dtoverlay=dionaudio-loco
2741 +Params: <None>
2742 +
2743 +
2744 +Name: dionaudio-loco-v2
2745 +Info: Configures the Dion Audio LOCO-V2 DAC-AMP
2746 +Load: dtoverlay=dionaudio-loco-v2,<param>=<val>
2747 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2748 + Digital volume control. Enable with
2749 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
2750 + (The default behaviour is that the Digital
2751 + volume control is limited to a maximum of
2752 + 0dB. ie. it can attenuate but not provide
2753 + gain. For most users, this will be desired
2754 + as it will prevent clipping. By appending
2755 + the 24dB_digital_gain parameter, the Digital
2756 + volume control will allow up to 24dB of
2757 + gain. If this parameter is enabled, it is the
2758 + responsibility of the user to ensure that
2759 + the Digital volume control is set to a value
2760 + that does not result in clipping/distortion!)
2761 +
2762 +
2763 +Name: dpi18
2764 +Info: Overlay for a generic 18-bit DPI display
2765 + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
2766 + 2-3 seconds after the kernel has started.
2767 +Load: dtoverlay=dpi18
2768 +Params: <None>
2769 +
2770 +
2771 +Name: dpi24
2772 +Info: Overlay for a generic 24-bit DPI display
2773 + This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
2774 + 2-3 seconds after the kernel has started.
2775 +Load: dtoverlay=dpi24
2776 +Params: <None>
2777 +
2778 +
2779 +Name: dwc-otg
2780 +Info: Selects the dwc_otg USB controller driver which has fiq support. This
2781 + is the default on all except the Pi Zero which defaults to dwc2.
2782 +Load: dtoverlay=dwc-otg
2783 +Params: <None>
2784 +
2785 +
2786 +Name: dwc2
2787 +Info: Selects the dwc2 USB controller driver
2788 +Load: dtoverlay=dwc2,<param>=<val>
2789 +Params: dr_mode Dual role mode: "host", "peripheral" or "otg"
2790 +
2791 + g-rx-fifo-size Size of rx fifo size in gadget mode
2792 +
2793 + g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget
2794 + mode
2795 +
2796 +
2797 +[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ]
2798 +
2799 +
2800 +Name: enc28j60
2801 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0
2802 +Load: dtoverlay=enc28j60,<param>=<val>
2803 +Params: int_pin GPIO used for INT (default 25)
2804 +
2805 + speed SPI bus speed (default 12000000)
2806 +
2807 +
2808 +Name: enc28j60-spi2
2809 +Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2
2810 +Load: dtoverlay=enc28j60-spi2,<param>=<val>
2811 +Params: int_pin GPIO used for INT (default 39)
2812 +
2813 + speed SPI bus speed (default 12000000)
2814 +
2815 +
2816 +Name: exc3000
2817 +Info: Enables I2C connected EETI EXC3000 multiple touch controller using
2818 + GPIO 4 (pin 7 on GPIO header) for interrupt.
2819 +Load: dtoverlay=exc3000,<param>=<val>
2820 +Params: interrupt GPIO used for interrupt (default 4)
2821 + sizex Touchscreen size x (default 4096)
2822 + sizey Touchscreen size y (default 4096)
2823 + invx Touchscreen inverted x axis
2824 + invy Touchscreen inverted y axis
2825 + swapxy Touchscreen swapped x y axis
2826 +
2827 +
2828 +Name: fe-pi-audio
2829 +Info: Configures the Fe-Pi Audio Sound Card
2830 +Load: dtoverlay=fe-pi-audio
2831 +Params: <None>
2832 +
2833 +
2834 +Name: goodix
2835 +Info: Enables I2C connected Goodix gt9271 multiple touch controller using
2836 + GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset.
2837 +Load: dtoverlay=goodix,<param>=<val>
2838 +Params: interrupt GPIO used for interrupt (default 4)
2839 + reset GPIO used for reset (default 17)
2840 +
2841 +
2842 +Name: googlevoicehat-soundcard
2843 +Info: Configures the Google voiceHAT soundcard
2844 +Load: dtoverlay=googlevoicehat-soundcard
2845 +Params: <None>
2846 +
2847 +
2848 +Name: gpio-ir
2849 +Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core-
2850 + based gpio_ir_recv driver maps received keys directly to a
2851 + /dev/input/event* device, all decoding is done by the kernel - LIRC is
2852 + not required! The key mapping and other decoding parameters can be
2853 + configured by "ir-keytable" tool.
2854 +Load: dtoverlay=gpio-ir,<param>=<val>
2855 +Params: gpio_pin Input pin number. Default is 18.
2856 +
2857 + gpio_pull Desired pull-up/down state (off, down, up)
2858 + Default is "down".
2859 +
2860 + rc-map-name Default rc keymap (can also be changed by
2861 + ir-keytable), defaults to "rc-rc6-mce"
2862 +
2863 +
2864 +Name: gpio-ir-tx
2865 +Info: Use GPIO pin as bit-banged infrared transmitter output.
2866 + This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require
2867 + a PWM so it can be used together with onboard analog audio.
2868 +Load: dtoverlay=gpio-ir-tx,<param>=<val>
2869 +Params: gpio_pin Output GPIO (default 18)
2870 +
2871 + invert "1" = invert the output (make it active-low).
2872 + Default is "0" (active-high).
2873 +
2874 +
2875 +Name: gpio-key
2876 +Info: This is a generic overlay for activating GPIO keypresses using
2877 + the gpio-keys library and this dtoverlay. Multiple keys can be
2878 + set up using multiple calls to the overlay for configuring
2879 + additional buttons or joysticks. You can see available keycodes
2880 + at https://github.com/torvalds/linux/blob/v4.12/include/uapi/
2881 + linux/input-event-codes.h#L64
2882 +Load: dtoverlay=gpio-key,<param>=<val>
2883 +Params: gpio GPIO pin to trigger on (default 3)
2884 + active_low When this is 1 (active low), a falling
2885 + edge generates a key down event and a
2886 + rising edge generates a key up event.
2887 + When this is 0 (active high), this is
2888 + reversed. The default is 1 (active low)
2889 + gpio_pull Desired pull-up/down state (off, down, up)
2890 + Default is "up". Note that the default pin
2891 + (GPIO3) has an external pullup
2892 + label Set a label for the key
2893 + keycode Set the key code for the button
2894 +
2895 +
2896 +Name: gpio-no-irq
2897 +Info: Use this overlay to disable all GPIO interrupts, which can be useful
2898 + for user-space GPIO edge detection systems.
2899 +Load: dtoverlay=gpio-no-irq
2900 +Params: <None>
2901 +
2902 +
2903 +Name: gpio-poweroff
2904 +Info: Drives a GPIO high or low on poweroff (including halt). Enabling this
2905 + overlay will prevent the ability to boot by driving GPIO3 low.
2906 +Load: dtoverlay=gpio-poweroff,<param>=<val>
2907 +Params: gpiopin GPIO for signalling (default 26)
2908 +
2909 + active_low Set if the power control device requires a
2910 + high->low transition to trigger a power-down.
2911 + Note that this will require the support of a
2912 + custom dt-blob.bin to prevent a power-down
2913 + during the boot process, and that a reboot
2914 + will also cause the pin to go low.
2915 + input Set if the gpio pin should be configured as
2916 + an input.
2917 + export Set to export the configured pin to sysfs
2918 +
2919 +
2920 +Name: gpio-shutdown
2921 +Info: Initiates a shutdown when GPIO pin changes. The given GPIO pin
2922 + is configured as an input key that generates KEY_POWER events.
2923 + This event is handled by systemd-logind by initiating a
2924 + shutdown. Systemd versions older than 225 need an udev rule
2925 + enable listening to the input device:
2926 +
2927 + ACTION!="REMOVE", SUBSYSTEM=="input", KERNEL=="event*", \
2928 + SUBSYSTEMS=="platform", DRIVERS=="gpio-keys", \
2929 + ATTRS{keys}=="116", TAG+="power-switch"
2930 +
2931 + This overlay only handles shutdown. After shutdown, the system
2932 + can be powered up again by driving GPIO3 low. The default
2933 + configuration uses GPIO3 with a pullup, so if you connect a
2934 + button between GPIO3 and GND (pin 5 and 6 on the 40-pin header),
2935 + you get a shutdown and power-up button.
2936 +Load: dtoverlay=gpio-shutdown,<param>=<val>
2937 +Params: gpio_pin GPIO pin to trigger on (default 3)
2938 +
2939 + active_low When this is 1 (active low), a falling
2940 + edge generates a key down event and a
2941 + rising edge generates a key up event.
2942 + When this is 0 (active high), this is
2943 + reversed. The default is 1 (active low).
2944 +
2945 + gpio_pull Desired pull-up/down state (off, down, up)
2946 + Default is "up".
2947 +
2948 + Note that the default pin (GPIO3) has an
2949 + external pullup.
2950 +
2951 +
2952 +Name: hifiberry-amp
2953 +Info: Configures the HifiBerry Amp and Amp+ audio cards
2954 +Load: dtoverlay=hifiberry-amp
2955 +Params: <None>
2956 +
2957 +
2958 +Name: hifiberry-dac
2959 +Info: Configures the HifiBerry DAC audio card
2960 +Load: dtoverlay=hifiberry-dac
2961 +Params: <None>
2962 +
2963 +
2964 +Name: hifiberry-dacplus
2965 +Info: Configures the HifiBerry DAC+ audio card
2966 +Load: dtoverlay=hifiberry-dacplus,<param>=<val>
2967 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
2968 + Digital volume control. Enable with
2969 + "dtoverlay=hifiberry-dacplus,24db_digital_gain"
2970 + (The default behaviour is that the Digital
2971 + volume control is limited to a maximum of
2972 + 0dB. ie. it can attenuate but not provide
2973 + gain. For most users, this will be desired
2974 + as it will prevent clipping. By appending
2975 + the 24dB_digital_gain parameter, the Digital
2976 + volume control will allow up to 24dB of
2977 + gain. If this parameter is enabled, it is the
2978 + responsibility of the user to ensure that
2979 + the Digital volume control is set to a value
2980 + that does not result in clipping/distortion!)
2981 + slave Force DAC+ Pro into slave mode, using Pi as
2982 + master for bit clock and frame clock.
2983 +
2984 +
2985 +Name: hifiberry-digi
2986 +Info: Configures the HifiBerry Digi and Digi+ audio card
2987 +Load: dtoverlay=hifiberry-digi
2988 +Params: <None>
2989 +
2990 +
2991 +Name: hifiberry-digi-pro
2992 +Info: Configures the HifiBerry Digi+ Pro audio card
2993 +Load: dtoverlay=hifiberry-digi-pro
2994 +Params: <None>
2995 +
2996 +
2997 +Name: hy28a
2998 +Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
2999 + Default values match Texy's display shield
3000 +Load: dtoverlay=hy28a,<param>=<val>
3001 +Params: speed Display SPI bus speed
3002 +
3003 + rotate Display rotation {0,90,180,270}
3004 +
3005 + fps Delay between frame updates
3006 +
3007 + debug Debug output level {0-7}
3008 +
3009 + xohms Touchpanel sensitivity (X-plate resistance)
3010 +
3011 + resetgpio GPIO used to reset controller
3012 +
3013 + ledgpio GPIO used to control backlight
3014 +
3015 +
3016 +Name: hy28b
3017 +Info: HY28B - 2.8" TFT LCD Display Module by HAOYU Electronics
3018 + Default values match Texy's display shield
3019 +Load: dtoverlay=hy28b,<param>=<val>
3020 +Params: speed Display SPI bus speed
3021 +
3022 + rotate Display rotation {0,90,180,270}
3023 +
3024 + fps Delay between frame updates
3025 +
3026 + debug Debug output level {0-7}
3027 +
3028 + xohms Touchpanel sensitivity (X-plate resistance)
3029 +
3030 + resetgpio GPIO used to reset controller
3031 +
3032 + ledgpio GPIO used to control backlight
3033 +
3034 +
3035 +Name: i2c-bcm2708
3036 +Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus.
3037 +Load: dtoverlay=i2c-bcm2708
3038 +Params: <None>
3039 +
3040 +
3041 +Name: i2c-gpio
3042 +Info: Adds support for software i2c controller on gpio pins
3043 +Load: dtoverlay=i2c-gpio,<param>=<val>
3044 +Params: i2c_gpio_sda GPIO used for I2C data (default "23")
3045 +
3046 + i2c_gpio_scl GPIO used for I2C clock (default "24")
3047 +
3048 + i2c_gpio_delay_us Clock delay in microseconds
3049 + (default "2" = ~100kHz)
3050 +
3051 + bus Set to a unique, non-zero value if wanting
3052 + multiple i2c-gpio busses. If set, will be used
3053 + as the preferred bus number (/dev/i2c-<n>). If
3054 + not set, the default value is 0, but the bus
3055 + number will be dynamically assigned - probably
3056 + 3.
3057 +
3058 +
3059 +Name: i2c-mux
3060 +Info: Adds support for a number of I2C bus multiplexers on i2c_arm
3061 +Load: dtoverlay=i2c-mux,<param>=<val>
3062 +Params: pca9542 Select the NXP PCA9542 device
3063 +
3064 + pca9545 Select the NXP PCA9545 device
3065 +
3066 + pca9548 Select the NXP PCA9548 device
3067 +
3068 + addr Change I2C address of the device (default 0x70)
3069 +
3070 +
3071 +[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
3072 +
3073 +
3074 +Name: i2c-pwm-pca9685a
3075 +Info: Adds support for an NXP PCA9685A I2C PWM controller on i2c_arm
3076 +Load: dtoverlay=i2c-pwm-pca9685a,<param>=<val>
3077 +Params: addr I2C address of PCA9685A (default 0x40)
3078 +
3079 +
3080 +Name: i2c-rtc
3081 +Info: Adds support for a number of I2C Real Time Clock devices
3082 +Load: dtoverlay=i2c-rtc,<param>=<val>
3083 +Params: abx80x Select one of the ABx80x family:
3084 + AB0801, AB0803, AB0804, AB0805,
3085 + AB1801, AB1803, AB1804, AB1805
3086 +
3087 + ds1307 Select the DS1307 device
3088 +
3089 + ds1339 Select the DS1339 device
3090 +
3091 + ds3231 Select the DS3231 device
3092 +
3093 + m41t62 Select the M41T62 device
3094 +
3095 + mcp7940x Select the MCP7940x device
3096 +
3097 + mcp7941x Select the MCP7941x device
3098 +
3099 + pcf2127 Select the PCF2127 device
3100 +
3101 + pcf8523 Select the PCF8523 device
3102 +
3103 + pcf8563 Select the PCF8563 device
3104 +
3105 + trickle-diode-type Diode type for trickle charge - "standard" or
3106 + "schottky" (ABx80x only)
3107 +
3108 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
3109 + ABx80x)
3110 +
3111 + wakeup-source Specify that the RTC can be used as a wakeup
3112 + source
3113 +
3114 +
3115 +Name: i2c-rtc-gpio
3116 +Info: Adds support for a number of I2C Real Time Clock devices
3117 + using the software i2c controller
3118 +Load: dtoverlay=i2c-rtc-gpio,<param>=<val>
3119 +Params: abx80x Select one of the ABx80x family:
3120 + AB0801, AB0803, AB0804, AB0805,
3121 + AB1801, AB1803, AB1804, AB1805
3122 +
3123 + ds1307 Select the DS1307 device
3124 +
3125 + ds1339 Select the DS1339 device
3126 +
3127 + ds3231 Select the DS3231 device
3128 +
3129 + mcp7940x Select the MCP7940x device
3130 +
3131 + mcp7941x Select the MCP7941x device
3132 +
3133 + pcf2127 Select the PCF2127 device
3134 +
3135 + pcf8523 Select the PCF8523 device
3136 +
3137 + pcf8563 Select the PCF8563 device
3138 +
3139 + trickle-diode-type Diode type for trickle charge - "standard" or
3140 + "schottky" (ABx80x only)
3141 +
3142 + trickle-resistor-ohms Resistor value for trickle charge (DS1339,
3143 + ABx80x)
3144 +
3145 + wakeup-source Specify that the RTC can be used as a wakeup
3146 + source
3147 +
3148 + i2c_gpio_sda GPIO used for I2C data (default "23")
3149 +
3150 + i2c_gpio_scl GPIO used for I2C clock (default "24")
3151 +
3152 + i2c_gpio_delay_us Clock delay in microseconds
3153 + (default "2" = ~100kHz)
3154 +
3155 +
3156 +Name: i2c-sensor
3157 +Info: Adds support for a number of I2C barometric pressure and temperature
3158 + sensors on i2c_arm
3159 +Load: dtoverlay=i2c-sensor,<param>=<val>
3160 +Params: addr Set the address for the BME280, BMP280, DS1621,
3161 + HDC100X, LM75, SHT3x or TMP102
3162 +
3163 + bme280 Select the Bosch Sensortronic BME280
3164 + Valid addresses 0x76-0x77, default 0x76
3165 +
3166 + bmp085 Select the Bosch Sensortronic BMP085
3167 +
3168 + bmp180 Select the Bosch Sensortronic BMP180
3169 +
3170 + bmp280 Select the Bosch Sensortronic BMP280
3171 + Valid addresses 0x76-0x77, default 0x76
3172 +
3173 + ds1621 Select the Dallas Semiconductors DS1621 temp
3174 + sensor. Valid addresses 0x48-0x4f, default 0x48
3175 +
3176 + hdc100x Select the Texas Instruments HDC100x temp sensor
3177 + Valid addresses 0x40-0x43, default 0x40
3178 +
3179 + htu21 Select the HTU21 temperature and humidity sensor
3180 +
3181 + lm75 Select the Maxim LM75 temperature sensor
3182 + Valid addresses 0x48-0x4f, default 0x4f
3183 +
3184 + lm75addr Deprecated - use addr parameter instead
3185 +
3186 + sht3x Select the Sensiron SHT3x temperature and
3187 + humidity sensor. Valid addresses 0x44-0x45,
3188 + default 0x44
3189 +
3190 + si7020 Select the Silicon Labs Si7013/20/21 humidity/
3191 + temperature sensor
3192 +
3193 + tmp102 Select the Texas Instruments TMP102 temp sensor
3194 + Valid addresses 0x48-0x4b, default 0x48
3195 +
3196 + tsl4531 Select the AMS TSL4531 digital ambient light
3197 + sensor
3198 +
3199 + veml6070 Select the Vishay VEML6070 ultraviolet light
3200 + sensor
3201 +
3202 +
3203 +Name: i2c0-bcm2708
3204 +Info: Change i2c0 pin usage. Not all pin combinations are usable on all
3205 + platforms - platforms other then Compute Modules can only use this
3206 + to disable transaction combining.
3207 +Load: dtoverlay=i2c0-bcm2708,<param>=<val>
3208 +Params: sda0_pin GPIO pin for SDA0 (deprecated - use pins_*)
3209 + scl0_pin GPIO pin for SCL0 (deprecated - use pins_*)
3210 + pins_0_1 Use pins 0 and 1 (default)
3211 + pins_28_29 Use pins 28 and 29
3212 + pins_44_45 Use pins 44 and 45
3213 + pins_46_47 Use pins 46 and 47
3214 + combine Allow transactions to be combined (default
3215 + "yes")
3216 +
3217 +
3218 +Name: i2c1-bcm2708
3219 +Info: Change i2c1 pin usage. Not all pin combinations are usable on all
3220 + platforms - platforms other then Compute Modules can only use this
3221 + to disable transaction combining.
3222 +Info: Enable the i2c_bcm2708 driver for the i2c1 bus
3223 +Load: dtoverlay=i2c1-bcm2708,<param>=<val>
3224 +Params: sda1_pin GPIO pin for SDA1 (2 or 44 - default 2)
3225 + scl1_pin GPIO pin for SCL1 (3 or 45 - default 3)
3226 + pin_func Alternative pin function (4 (alt0), 6 (alt2) -
3227 + default 4)
3228 + combine Allow transactions to be combined (default
3229 + "yes")
3230 +
3231 +
3232 +Name: i2s-gpio28-31
3233 +Info: move I2S function block to GPIO 28 to 31
3234 +Load: dtoverlay=i2s-gpio28-31
3235 +Params: <None>
3236 +
3237 +
3238 +Name: iqaudio-dac
3239 +Info: Configures the IQaudio DAC audio card
3240 +Load: dtoverlay=iqaudio-dac,<param>
3241 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
3242 + Digital volume control. Enable with
3243 + "dtoverlay=iqaudio-dac,24db_digital_gain"
3244 + (The default behaviour is that the Digital
3245 + volume control is limited to a maximum of
3246 + 0dB. ie. it can attenuate but not provide
3247 + gain. For most users, this will be desired
3248 + as it will prevent clipping. By appending
3249 + the 24db_digital_gain parameter, the Digital
3250 + volume control will allow up to 24dB of
3251 + gain. If this parameter is enabled, it is the
3252 + responsibility of the user to ensure that
3253 + the Digital volume control is set to a value
3254 + that does not result in clipping/distortion!)
3255 +
3256 +
3257 +Name: iqaudio-dacplus
3258 +Info: Configures the IQaudio DAC+ audio card
3259 +Load: dtoverlay=iqaudio-dacplus,<param>=<val>
3260 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
3261 + Digital volume control. Enable with
3262 + "dtoverlay=iqaudio-dacplus,24db_digital_gain"
3263 + (The default behaviour is that the Digital
3264 + volume control is limited to a maximum of
3265 + 0dB. ie. it can attenuate but not provide
3266 + gain. For most users, this will be desired
3267 + as it will prevent clipping. By appending
3268 + the 24db_digital_gain parameter, the Digital
3269 + volume control will allow up to 24dB of
3270 + gain. If this parameter is enabled, it is the
3271 + responsibility of the user to ensure that
3272 + the Digital volume control is set to a value
3273 + that does not result in clipping/distortion!)
3274 + auto_mute_amp If specified, unmute/mute the IQaudIO amp when
3275 + starting/stopping audio playback.
3276 + unmute_amp If specified, unmute the IQaudIO amp once when
3277 + the DAC driver module loads.
3278 +
3279 +
3280 +Name: iqaudio-digi-wm8804-audio
3281 +Info: Configures the IQAudIO Digi WM8804 audio card
3282 +Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
3283 +Params: card_name Override the default, "IQAudIODigi", card name.
3284 + dai_name Override the default, "IQAudIO Digi", dai name.
3285 + dai_stream_name Override the default, "IQAudIO Digi HiFi",
3286 + dai stream name.
3287 +
3288 +
3289 +Name: jedec-spi-nor
3290 +Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The
3291 + "jedec,spi-nor" kernel driver was formerly known as "m25p80".)
3292 +Load: dtoverlay=jedec-spi-nor,<param>=<val>
3293 +Params: flash-spi<n>-<m> Enables flash device on SPI<n>, CS#<m>.
3294 + flash-fastr-spi<n>-<m> Enables flash device with fast read capability
3295 + on SPI<n>, CS#<m>.
3296 +
3297 +
3298 +Name: justboom-dac
3299 +Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
3300 + cards
3301 +Load: dtoverlay=justboom-dac,<param>=<val>
3302 +Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
3303 + Digital volume control. Enable with
3304 + "dtoverlay=justboom-dac,24db_digital_gain"
3305 + (The default behaviour is that the Digital
3306 + volume control is limited to a maximum of
3307 + 0dB. ie. it can attenuate but not provide
3308 + gain. For most users, this will be desired
3309 + as it will prevent clipping. By appending
3310 + the 24dB_digital_gain parameter, the Digital
3311 + volume control will allow up to 24dB of
3312 + gain. If this parameter is enabled, it is the
3313 + responsibility of the user to ensure that
3314 + the Digital volume control is set to a value
3315 + that does not result in clipping/distortion!)
3316 +
3317 +
3318 +Name: justboom-digi
3319 +Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
3320 +Load: dtoverlay=justboom-digi
3321 +Params: <None>
3322 +
3323 +
3324 +Name: lirc-rpi
3325 +Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi)
3326 + Consult the module documentation for more details.
3327 +Load: dtoverlay=lirc-rpi,<param>=<val>
3328 +Params: gpio_out_pin GPIO for output (default "17")
3329 +
3330 + gpio_in_pin GPIO for input (default "18")
3331 +
3332 + gpio_in_pull Pull up/down/off on the input pin
3333 + (default "down")
3334 +
3335 + sense Override the IR receive auto-detection logic:
3336 + "0" = force active-high
3337 + "1" = force active-low
3338 + "-1" = use auto-detection
3339 + (default "-1")
3340 +
3341 + softcarrier Turn the software carrier "on" or "off"
3342 + (default "on")
3343 +
3344 + invert "on" = invert the output pin (default "off")
3345 +
3346 + debug "on" = enable additional debug messages
3347 + (default "off")
3348 +
3349 +
3350 +Name: ltc294x
3351 +Info: Adds support for the ltc294x family of battery gauges
3352 +Load: dtoverlay=ltc294x,<param>=<val>
3353 +Params: ltc2941 Select the ltc2941 device
3354 +
3355 + ltc2942 Select the ltc2942 device
3356 +
3357 + ltc2943 Select the ltc2943 device
3358 +
3359 + ltc2944 Select the ltc2944 device
3360 +
3361 + resistor-sense The sense resistor value in milli-ohms.
3362 + Can be a 32-bit negative value when the battery
3363 + has been connected to the wrong end of the
3364 + resistor.
3365 +
3366 + prescaler-exponent Range and accuracy of the gauge. The value is
3367 + programmed into the chip only if it differs
3368 + from the current setting.
3369 + For LTC2941 only:
3370 + - Default value is 128
3371 + - the exponent is in the range 0-7 (default 7)
3372 + See the datasheet for more information.
3373 +
3374 +
3375 +Name: mbed-dac
3376 +Info: Configures the mbed AudioCODEC (TLV320AIC23B)
3377 +Load: dtoverlay=mbed-dac
3378 +Params: <None>
3379 +
3380 +
3381 +Name: mcp23017
3382 +Info: Configures the MCP23017 I2C GPIO expander
3383 +Load: dtoverlay=mcp23017,<param>=<val>
3384 +Params: gpiopin Gpio pin connected to the INTA output of the
3385 + MCP23017 (default: 4)
3386 +
3387 + addr I2C address of the MCP23017 (default: 0x20)
3388 +
3389 +
3390 +Name: mcp23s17
3391 +Info: Configures the MCP23S08/17 SPI GPIO expanders.
3392 + If devices are present on SPI1 or SPI2, those interfaces must be enabled
3393 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3394 + If interrupts are enabled for a device on a given CS# on a SPI bus, that
3395 + device must be the only one present on that SPI bus/CS#.
3396 +Load: dtoverlay=mcp23s17,<param>=<val>
3397 +Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
3398 + devices present on SPI<n>, CS#<m>
3399 +
3400 + s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
3401 + devices present on SPI<n>, CS#<m>
3402 +
3403 + s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
3404 + MCP23S08 device on SPI<n>, CS#<m>, specifies
3405 + the GPIO pin to which INT output of MCP23S08
3406 + is connected.
3407 +
3408 + s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
3409 + single MCP23S17 device on SPI<n>, CS#<m>,
3410 + specifies the GPIO pin to which either INTA
3411 + or INTB output of MCP23S17 is connected.
3412 +
3413 +
3414 +Name: mcp2515-can0
3415 +Info: Configures the MCP2515 CAN controller on spi0.0
3416 +Load: dtoverlay=mcp2515-can0,<param>=<val>
3417 +Params: oscillator Clock frequency for the CAN controller (Hz)
3418 +
3419 + spimaxfrequency Maximum SPI frequence (Hz)
3420 +
3421 + interrupt GPIO for interrupt signal
3422 +
3423 +
3424 +Name: mcp2515-can1
3425 +Info: Configures the MCP2515 CAN controller on spi0.1
3426 +Load: dtoverlay=mcp2515-can1,<param>=<val>
3427 +Params: oscillator Clock frequency for the CAN controller (Hz)
3428 +
3429 + spimaxfrequency Maximum SPI frequence (Hz)
3430 +
3431 + interrupt GPIO for interrupt signal
3432 +
3433 +
3434 +Name: mcp3008
3435 +Info: Configures MCP3008 A/D converters
3436 + For devices on spi1 or spi2, the interfaces should be enabled
3437 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3438 +Load: dtoverlay=mcp3008,<param>[=<val>]
3439 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
3440 + spi<n>-<m>-speed integer, set the spi bus speed for this device
3441 +
3442 +
3443 +Name: mcp3202
3444 +Info: Configures MCP3202 A/D converters
3445 + For devices on spi1 or spi2, the interfaces should be enabled
3446 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
3447 +Load: dtoverlay=mcp3202,<param>[=<val>]
3448 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
3449 + spi<n>-<m>-speed integer, set the spi bus speed for this device
3450 +
3451 +
3452 +Name: media-center
3453 +Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply
3454 +Load: dtoverlay=media-center,<param>=<val>
3455 +Params: speed Display SPI bus speed
3456 + rotate Display rotation {0,90,180,270}
3457 + fps Delay between frame updates
3458 + xohms Touchpanel sensitivity (X-plate resistance)
3459 + swapxy Swap x and y axis
3460 + backlight Change backlight GPIO pin {e.g. 12, 18}
3461 + gpio_out_pin GPIO for output (default "17")
3462 + gpio_in_pin GPIO for input (default "18")
3463 + gpio_in_pull Pull up/down/off on the input pin
3464 + (default "down")
3465 + sense Override the IR receive auto-detection logic:
3466 + "0" = force active-high
3467 + "1" = force active-low
3468 + "-1" = use auto-detection
3469 + (default "-1")
3470 + softcarrier Turn the software carrier "on" or "off"
3471 + (default "on")
3472 + invert "on" = invert the output pin (default "off")
3473 + debug "on" = enable additional debug messages
3474 + (default "off")
3475 +
3476 +
3477 +Name: midi-uart0
3478 +Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets
3479 + 31.25kbaud, the frequency required for MIDI
3480 +Load: dtoverlay=midi-uart0
3481 +Params: <None>
3482 +
3483 +
3484 +Name: midi-uart1
3485 +Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
3486 + 31.25kbaud, the frequency required for MIDI
3487 +Load: dtoverlay=midi-uart1
3488 +Params: <None>
3489 +
3490 +
3491 +Name: mmc
3492 +Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock
3493 +Load: dtoverlay=mmc,<param>=<val>
3494 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
3495 + requests 50MHz
3496 +
3497 +
3498 +Name: mpu6050
3499 +Info: Overlay for i2c connected mpu6050 imu
3500 +Load: dtoverlay=mpu6050,<param>=<val>
3501 +Params: interrupt GPIO pin for interrupt (default 4)
3502 +
3503 +
3504 +Name: mz61581
3505 +Info: MZ61581 display by Tontec
3506 +Load: dtoverlay=mz61581,<param>=<val>
3507 +Params: speed Display SPI bus speed
3508 +
3509 + rotate Display rotation {0,90,180,270}
3510 +
3511 + fps Delay between frame updates
3512 +
3513 + txbuflen Transmit buffer length (default 32768)
3514 +
3515 + debug Debug output level {0-7}
3516 +
3517 + xohms Touchpanel sensitivity (X-plate resistance)
3518 +
3519 +
3520 +Name: papirus
3521 +Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT)
3522 +Load: dtoverlay=papirus,<param>=<val>
3523 +Params: panel Display panel (required):
3524 + 1.44": e1144cs021
3525 + 2.0": e2200cs021
3526 + 2.7": e2271cs021
3527 +
3528 + speed Display SPI bus speed
3529 +
3530 +
3531 +[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
3532 +
3533 +
3534 +[ The pcf8523-rtc overlay has been deleted. See i2c-rtc. ]
3535 +
3536 +
3537 +[ The pcf8563-rtc overlay has been deleted. See i2c-rtc. ]
3538 +
3539 +
3540 +Name: pi3-act-led
3541 +Info: Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
3542 + from the VPU. There is a special driver for this with a separate DT
3543 + node, which has the unfortunate consequence of breaking the
3544 + act_led_gpio and act_led_activelow dtparams.
3545 + This overlay changes the GPIO controller back to the standard one and
3546 + restores the dtparams.
3547 +Load: dtoverlay=pi3-act-led,<param>=<val>
3548 +Params: activelow Set to "on" to invert the sense of the LED
3549 + (default "off")
3550 +
3551 + gpio Set which GPIO to use for the activity LED
3552 + (in case you want to connect it to an external
3553 + device)
3554 + REQUIRED
3555 +
3556 +
3557 +Name: pi3-disable-bt
3558 +Info: Disable Pi3 Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15
3559 + N.B. To disable the systemd service that initialises the modem so it
3560 + doesn't use the UART, use 'sudo systemctl disable hciuart'.
3561 +Load: dtoverlay=pi3-disable-bt
3562 +Params: <None>
3563 +
3564 +
3565 +Name: pi3-disable-wifi
3566 +Info: Disable Pi3 onboard WiFi
3567 +Load: dtoverlay=pi3-disable-wifi
3568 +Params: <None>
3569 +
3570 +
3571 +Name: pi3-miniuart-bt
3572 +Info: Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
3573 + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
3574 + usable baudrate.
3575 + N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
3576 + and replace ttyAMA0 with ttyS0, unless you have a system with udev rules
3577 + that create /dev/serial0 and /dev/serial1, in which case use
3578 + /dev/serial1 instead because it will always be correct. Furthermore,
3579 + you must also set core_freq=250 in config.txt or the miniuart will not
3580 + work.
3581 +Load: dtoverlay=pi3-miniuart-bt
3582 +Params: <None>
3583 +
3584 +
3585 +Name: pibell
3586 +Info: Configures the pibell audio card.
3587 +Load: dtoverlay=pibell,<param>=<val>
3588 +Params: alsaname Set the name as it appears in ALSA (default
3589 + "PiBell")
3590 +
3591 +
3592 +Name: piscreen
3593 +Info: PiScreen display by OzzMaker.com
3594 +Load: dtoverlay=piscreen,<param>=<val>
3595 +Params: speed Display SPI bus speed
3596 +
3597 + rotate Display rotation {0,90,180,270}
3598 +
3599 + fps Delay between frame updates
3600 +
3601 + debug Debug output level {0-7}
3602 +
3603 + xohms Touchpanel sensitivity (X-plate resistance)
3604 +
3605 +
3606 +Name: piscreen2r
3607 +Info: PiScreen 2 with resistive TP display by OzzMaker.com
3608 +Load: dtoverlay=piscreen2r,<param>=<val>
3609 +Params: speed Display SPI bus speed
3610 +
3611 + rotate Display rotation {0,90,180,270}
3612 +
3613 + fps Delay between frame updates
3614 +
3615 + debug Debug output level {0-7}
3616 +
3617 + xohms Touchpanel sensitivity (X-plate resistance)
3618 +
3619 +
3620 +Name: pisound
3621 +Info: Configures the Blokas Labs pisound card
3622 +Load: dtoverlay=pisound
3623 +Params: <None>
3624 +
3625 +
3626 +Name: pitft22
3627 +Info: Adafruit PiTFT 2.2" screen
3628 +Load: dtoverlay=pitft22,<param>=<val>
3629 +Params: speed Display SPI bus speed
3630 +
3631 + rotate Display rotation {0,90,180,270}
3632 +
3633 + fps Delay between frame updates
3634 +
3635 + debug Debug output level {0-7}
3636 +
3637 +
3638 +Name: pitft28-capacitive
3639 +Info: Adafruit PiTFT 2.8" capacitive touch screen
3640 +Load: dtoverlay=pitft28-capacitive,<param>=<val>
3641 +Params: speed Display SPI bus speed
3642 +
3643 + rotate Display rotation {0,90,180,270}
3644 +
3645 + fps Delay between frame updates
3646 +
3647 + debug Debug output level {0-7}
3648 +
3649 + touch-sizex Touchscreen size x (default 240)
3650 +
3651 + touch-sizey Touchscreen size y (default 320)
3652 +
3653 + touch-invx Touchscreen inverted x axis
3654 +
3655 + touch-invy Touchscreen inverted y axis
3656 +
3657 + touch-swapxy Touchscreen swapped x y axis
3658 +
3659 +
3660 +Name: pitft28-resistive
3661 +Info: Adafruit PiTFT 2.8" resistive touch screen
3662 +Load: dtoverlay=pitft28-resistive,<param>=<val>
3663 +Params: speed Display SPI bus speed
3664 +
3665 + rotate Display rotation {0,90,180,270}
3666 +
3667 + fps Delay between frame updates
3668 +
3669 + debug Debug output level {0-7}
3670 +
3671 +
3672 +Name: pitft35-resistive
3673 +Info: Adafruit PiTFT 3.5" resistive touch screen
3674 +Load: dtoverlay=pitft35-resistive,<param>=<val>
3675 +Params: speed Display SPI bus speed
3676 +
3677 + rotate Display rotation {0,90,180,270}
3678 +
3679 + fps Delay between frame updates
3680 +
3681 + debug Debug output level {0-7}
3682 +
3683 +
3684 +Name: pps-gpio
3685 +Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
3686 +Load: dtoverlay=pps-gpio,<param>=<val>
3687 +Params: gpiopin Input GPIO (default "18")
3688 + assert_falling_edge When present, assert is indicated by a falling
3689 + edge, rather than by a rising edge (default
3690 + off)
3691 + capture_clear Generate clear events on the trailing edge
3692 + (default off)
3693 +
3694 +
3695 +Name: pwm
3696 +Info: Configures a single PWM channel
3697 + Legal pin,function combinations for each channel:
3698 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
3699 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
3700 + N.B.:
3701 + 1) Pin 18 is the only one available on all platforms, and
3702 + it is the one used by the I2S audio interface.
3703 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
3704 + 2) The onboard analogue audio output uses both PWM channels.
3705 + 3) So be careful mixing audio and PWM.
3706 + 4) Currently the clock must have been enabled and configured
3707 + by other means.
3708 +Load: dtoverlay=pwm,<param>=<val>
3709 +Params: pin Output pin (default 18) - see table
3710 + func Pin function (default 2 = Alt5) - see above
3711 + clock PWM clock frequency (informational)
3712 +
3713 +
3714 +Name: pwm-2chan
3715 +Info: Configures both PWM channels
3716 + Legal pin,function combinations for each channel:
3717 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
3718 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
3719 + N.B.:
3720 + 1) Pin 18 is the only one available on all platforms, and
3721 + it is the one used by the I2S audio interface.
3722 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
3723 + 2) The onboard analogue audio output uses both PWM channels.
3724 + 3) So be careful mixing audio and PWM.
3725 + 4) Currently the clock must have been enabled and configured
3726 + by other means.
3727 +Load: dtoverlay=pwm-2chan,<param>=<val>
3728 +Params: pin Output pin (default 18) - see table
3729 + pin2 Output pin for other channel (default 19)
3730 + func Pin function (default 2 = Alt5) - see above
3731 + func2 Function for pin2 (default 2 = Alt5)
3732 + clock PWM clock frequency (informational)
3733 +
3734 +
3735 +Name: pwm-ir-tx
3736 +Info: Use GPIO pin as pwm-assisted infrared transmitter output.
3737 + This is an alternative to "gpio-ir-tx". pwm-ir-tx makes use
3738 + of PWM0 to reduce the CPU load during transmission compared to
3739 + gpio-ir-tx which uses bit-banging.
3740 + Legal pin,function combinations are:
3741 + 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
3742 +Load: dtoverlay=pwm-ir-tx,<param>=<val>
3743 +Params: gpio_pin Output GPIO (default 18)
3744 +
3745 + func Pin function (default 2 = Alt5)
3746 +
3747 +
3748 +Name: qca7000
3749 +Info: I2SE's Evaluation Board for PLC Stamp micro
3750 +Load: dtoverlay=qca7000,<param>=<val>
3751 +Params: int_pin GPIO pin for interrupt signal (default 23)
3752 +
3753 + speed SPI bus speed (default 12 MHz)
3754 +
3755 +
3756 +Name: rotary-encoder
3757 +Info: Overlay for GPIO connected rotary encoder.
3758 +Load: dtoverlay=rotary-encoder,<param>=<val>
3759 +Params: pin_a GPIO connected to rotary encoder channel A
3760 + (default 4).
3761 + pin_b GPIO connected to rotary encoder channel B
3762 + (default 17).
3763 + relative_axis register a relative axis rather than an
3764 + absolute one. Relative axis will only
3765 + generate +1/-1 events on the input device,
3766 + hence no steps need to be passed.
3767 + linux_axis the input subsystem axis to map to this
3768 + rotary encoder. Defaults to 0 (ABS_X / REL_X)
3769 + rollover Automatic rollover when the rotary value
3770 + becomes greater than the specified steps or
3771 + smaller than 0. For absolute axis only.
3772 + steps-per-period Number of steps (stable states) per period.
3773 + The values have the following meaning:
3774 + 1: Full-period mode (default)
3775 + 2: Half-period mode
3776 + 4: Quarter-period mode
3777 + steps Number of steps in a full turnaround of the
3778 + encoder. Only relevant for absolute axis.
3779 + Defaults to 24 which is a typical value for
3780 + such devices.
3781 + wakeup Boolean, rotary encoder can wake up the
3782 + system.
3783 + encoding String, the method used to encode steps.
3784 + Supported are "gray" (the default and more
3785 + common) and "binary".
3786 +
3787 +
3788 +Name: rpi-backlight
3789 +Info: Raspberry Pi official display backlight driver
3790 +Load: dtoverlay=rpi-backlight
3791 +Params: <None>
3792 +
3793 +
3794 +Name: rpi-cirrus-wm5102
3795 +Info: Configures the Cirrus Logic Audio Card
3796 +Load: dtoverlay=rpi-cirrus-wm5102
3797 +Params: <None>
3798 +
3799 +
3800 +Name: rpi-dac
3801 +Info: Configures the RPi DAC audio card
3802 +Load: dtoverlay=rpi-dac
3803 +Params: <None>
3804 +
3805 +
3806 +Name: rpi-display
3807 +Info: RPi-Display - 2.8" Touch Display by Watterott
3808 +Load: dtoverlay=rpi-display,<param>=<val>
3809 +Params: speed Display SPI bus speed
3810 + rotate Display rotation {0,90,180,270}
3811 + fps Delay between frame updates
3812 + debug Debug output level {0-7}
3813 + xohms Touchpanel sensitivity (X-plate resistance)
3814 + swapxy Swap x and y axis
3815 + backlight Change backlight GPIO pin {e.g. 12, 18}
3816 +
3817 +
3818 +Name: rpi-ft5406
3819 +Info: Official Raspberry Pi display touchscreen
3820 +Load: dtoverlay=rpi-ft5406,<param>=<val>
3821 +Params: touchscreen-size-x Touchscreen X resolution (default 800)
3822 + touchscreen-size-y Touchscreen Y resolution (default 600);
3823 + touchscreen-inverted-x Invert touchscreen X coordinates (default 0);
3824 + touchscreen-inverted-y Invert touchscreen Y coordinates (default 0);
3825 + touchscreen-swapped-x-y Swap X and Y cordinates (default 0);
3826 +
3827 +
3828 +Name: rpi-proto
3829 +Info: Configures the RPi Proto audio card
3830 +Load: dtoverlay=rpi-proto
3831 +Params: <None>
3832 +
3833 +
3834 +Name: rpi-sense
3835 +Info: Raspberry Pi Sense HAT
3836 +Load: dtoverlay=rpi-sense
3837 +Params: <None>
3838 +
3839 +
3840 +Name: rpi-tv
3841 +Info: Raspberry Pi TV HAT
3842 +Load: dtoverlay=rpi-tv
3843 +Params: <None>
3844 +
3845 +
3846 +Name: rra-digidac1-wm8741-audio
3847 +Info: Configures the Red Rocks Audio DigiDAC1 soundcard
3848 +Load: dtoverlay=rra-digidac1-wm8741-audio
3849 +Params: <None>
3850 +
3851 +
3852 +Name: sc16is750-i2c
3853 +Info: Overlay for the NXP SC16IS750 UART with I2C Interface
3854 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
3855 + select another address, please refer to table 10 in reference manual.
3856 +Load: dtoverlay=sc16is750-i2c,<param>=<val>
3857 +Params: int_pin GPIO used for IRQ (default 24)
3858 + addr Address (default 0x48)
3859 +
3860 +
3861 +Name: sc16is752-i2c
3862 +Info: Overlay for the NXP SC16IS752 dual UART with I2C Interface
3863 + Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
3864 + select another address, please refer to table 10 in reference manual.
3865 +Load: dtoverlay=sc16is752-i2c,<param>=<val>
3866 +Params: int_pin GPIO used for IRQ (default 24)
3867 + addr Address (default 0x48)
3868 + xtal On-board crystal frequency (default 14745600)
3869 +
3870 +
3871 +Name: sc16is752-spi1
3872 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
3873 + Enables the chip on SPI1.
3874 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3875 + A+, B+, Zero and PI2 B; as well as the Compute Module.
3876 +
3877 +Load: dtoverlay=sc16is752-spi1,<param>=<val>
3878 +Params: int_pin GPIO used for IRQ (default 24)
3879 +
3880 +
3881 +Name: sdhost
3882 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
3883 + N.B. This overlay is designed for situations where the mmc driver is
3884 + the default, so it disables the other (mmc) interface - this will kill
3885 + WiFi on a Pi3. If this isn't what you want, either use the sdtweak
3886 + overlay or the new sd_* dtparams of the base DTBs.
3887 +Load: dtoverlay=sdhost,<param>=<val>
3888 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
3889 + requests 50MHz
3890 +
3891 + force_pio Disable DMA support (default off)
3892 +
3893 + pio_limit Number of blocks above which to use DMA
3894 + (default 1)
3895 +
3896 + debug Enable debug output (default off)
3897 +
3898 +
3899 +Name: sdio
3900 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
3901 + and enables SDIO via GPIOs 22-27.
3902 +Load: dtoverlay=sdio,<param>=<val>
3903 +Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
3904 + framework requests 50MHz
3905 +
3906 + poll_once Disable SDIO-device polling every second
3907 + (default on: polling once at boot-time)
3908 +
3909 + bus_width Set the SDIO host bus width (default 4 bits)
3910 +
3911 +
3912 +Name: sdio-1bit
3913 +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
3914 + and enables 1-bit SDIO via GPIOs 22-25.
3915 +Load: dtoverlay=sdio-1bit,<param>=<val>
3916 +Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
3917 + framework requests 50MHz
3918 +
3919 + poll_once Disable SDIO-device polling every second
3920 + (default on: polling once at boot-time)
3921 +
3922 +
3923 +Name: sdtweak
3924 +Info: Tunes the bcm2835-sdhost SD/MMC driver
3925 + N.B. This functionality is now available via the sd_* dtparams in the
3926 + base DTB.
3927 +Load: dtoverlay=sdtweak,<param>=<val>
3928 +Params: overclock_50 Clock (in MHz) to use when the MMC framework
3929 + requests 50MHz
3930 +
3931 + force_pio Disable DMA support (default off)
3932 +
3933 + pio_limit Number of blocks above which to use DMA
3934 + (default 1)
3935 +
3936 + debug Enable debug output (default off)
3937 +
3938 + poll_once Looks for a card once after booting. Useful
3939 + for network booting scenarios to avoid the
3940 + overhead of continuous polling. N.B. Using
3941 + this option restricts the system to using a
3942 + single card per boot (or none at all).
3943 + (default off)
3944 +
3945 + enable Set to off to completely disable the interface
3946 + (default on)
3947 +
3948 +
3949 +Name: smi
3950 +Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
3951 +Load: dtoverlay=smi
3952 +Params: <None>
3953 +
3954 +
3955 +Name: smi-dev
3956 +Info: Enables the userspace interface for the SMI driver
3957 +Load: dtoverlay=smi-dev
3958 +Params: <None>
3959 +
3960 +
3961 +Name: smi-nand
3962 +Info: Enables access to NAND flash via the SMI interface
3963 +Load: dtoverlay=smi-nand
3964 +Params: <None>
3965 +
3966 +
3967 +Name: spi-gpio35-39
3968 +Info: Move SPI function block to GPIO 35 to 39
3969 +Load: dtoverlay=spi-gpio35-39
3970 +Params: <None>
3971 +
3972 +
3973 +Name: spi-rtc
3974 +Info: Adds support for a number of SPI Real Time Clock devices
3975 +Load: dtoverlay=spi-rtc,<param>=<val>
3976 +Params: pcf2123 Select the PCF2123 device
3977 +
3978 +
3979 +Name: spi0-cs
3980 +Info: Allows the (software) CS pins for SPI0 to be changed
3981 +Load: dtoverlay=spi0-cs,<param>=<val>
3982 +Params: cs0_pin GPIO pin for CS0 (default 8)
3983 + cs1_pin GPIO pin for CS1 (default 7)
3984 +
3985 +
3986 +Name: spi0-hw-cs
3987 +Info: Re-enables hardware CS/CE (chip selects) for SPI0
3988 +Load: dtoverlay=spi0-hw-cs
3989 +Params: <None>
3990 +
3991 +
3992 +Name: spi1-1cs
3993 +Info: Enables spi1 with a single chip select (CS) line and associated spidev
3994 + dev node. The gpio pin number for the CS line and spidev device node
3995 + creation are configurable.
3996 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
3997 + A+, B+, Zero and PI2 B; as well as the Compute Module.
3998 +Load: dtoverlay=spi1-1cs,<param>=<val>
3999 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
4000 + cs0_spidev Set to 'disabled' to stop the creation of a
4001 + userspace device node /dev/spidev1.0 (default
4002 + is 'okay' or enabled).
4003 +
4004 +
4005 +Name: spi1-2cs
4006 +Info: Enables spi1 with two chip select (CS) lines and associated spidev
4007 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4008 + creation are configurable.
4009 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
4010 + A+, B+, Zero and PI2 B; as well as the Compute Module.
4011 +Load: dtoverlay=spi1-2cs,<param>=<val>
4012 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
4013 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
4014 + cs0_spidev Set to 'disabled' to stop the creation of a
4015 + userspace device node /dev/spidev1.0 (default
4016 + is 'okay' or enabled).
4017 + cs1_spidev Set to 'disabled' to stop the creation of a
4018 + userspace device node /dev/spidev1.1 (default
4019 + is 'okay' or enabled).
4020 +
4021 +
4022 +Name: spi1-3cs
4023 +Info: Enables spi1 with three chip select (CS) lines and associated spidev
4024 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4025 + creation are configurable.
4026 + N.B.: spi1 is only accessible on devices with a 40pin header, eg:
4027 + A+, B+, Zero and PI2 B; as well as the Compute Module.
4028 +Load: dtoverlay=spi1-3cs,<param>=<val>
4029 +Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
4030 + cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
4031 + cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
4032 + cs0_spidev Set to 'disabled' to stop the creation of a
4033 + userspace device node /dev/spidev1.0 (default
4034 + is 'okay' or enabled).
4035 + cs1_spidev Set to 'disabled' to stop the creation of a
4036 + userspace device node /dev/spidev1.1 (default
4037 + is 'okay' or enabled).
4038 + cs2_spidev Set to 'disabled' to stop the creation of a
4039 + userspace device node /dev/spidev1.2 (default
4040 + is 'okay' or enabled).
4041 +
4042 +
4043 +Name: spi2-1cs
4044 +Info: Enables spi2 with a single chip select (CS) line and associated spidev
4045 + dev node. The gpio pin number for the CS line and spidev device node
4046 + creation are configurable.
4047 + N.B.: spi2 is only accessible with the Compute Module.
4048 +Load: dtoverlay=spi2-1cs,<param>=<val>
4049 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
4050 + cs0_spidev Set to 'disabled' to stop the creation of a
4051 + userspace device node /dev/spidev2.0 (default
4052 + is 'okay' or enabled).
4053 +
4054 +
4055 +Name: spi2-2cs
4056 +Info: Enables spi2 with two chip select (CS) lines and associated spidev
4057 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4058 + creation are configurable.
4059 + N.B.: spi2 is only accessible with the Compute Module.
4060 +Load: dtoverlay=spi2-2cs,<param>=<val>
4061 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
4062 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
4063 + cs0_spidev Set to 'disabled' to stop the creation of a
4064 + userspace device node /dev/spidev2.0 (default
4065 + is 'okay' or enabled).
4066 + cs1_spidev Set to 'disabled' to stop the creation of a
4067 + userspace device node /dev/spidev2.1 (default
4068 + is 'okay' or enabled).
4069 +
4070 +
4071 +Name: spi2-3cs
4072 +Info: Enables spi2 with three chip select (CS) lines and associated spidev
4073 + dev nodes. The gpio pin numbers for the CS lines and spidev device node
4074 + creation are configurable.
4075 + N.B.: spi2 is only accessible with the Compute Module.
4076 +Load: dtoverlay=spi2-3cs,<param>=<val>
4077 +Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
4078 + cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
4079 + cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
4080 + cs0_spidev Set to 'disabled' to stop the creation of a
4081 + userspace device node /dev/spidev2.0 (default
4082 + is 'okay' or enabled).
4083 + cs1_spidev Set to 'disabled' to stop the creation of a
4084 + userspace device node /dev/spidev2.1 (default
4085 + is 'okay' or enabled).
4086 + cs2_spidev Set to 'disabled' to stop the creation of a
4087 + userspace device node /dev/spidev2.2 (default
4088 + is 'okay' or enabled).
4089 +
4090 +
4091 +Name: superaudioboard
4092 +Info: Configures the SuperAudioBoard sound card
4093 +Load: dtoverlay=superaudioboard,<param>=<val>
4094 +Params: gpiopin GPIO pin for codec reset
4095 +
4096 +
4097 +Name: sx150x
4098 +Info: Configures the Semtech SX150X I2C GPIO expanders.
4099 +Load: dtoverlay=sx150x,<param>=<val>
4100 +Params: sx150<x>-<n>-<m> Enables SX150X device on I2C#<n> with slave
4101 + address <m>. <x> may be 1-9. <n> may be 0 or 1.
4102 + Permissible values of <m> (which is denoted in
4103 + hex) depend on the device variant. For SX1501,
4104 + SX1502, SX1504 and SX1505, <m> may be 20 or 21.
4105 + For SX1503 and SX1506, <m> may be 20. For
4106 + SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
4107 + For SX1508, <m> may be 20, 21, 22 or 23.
4108 +
4109 + sx150<x>-<n>-<m>-int-gpio
4110 + Integer, enables interrupts on SX150X device on
4111 + I2C#<n> with slave address <m>, specifies
4112 + the GPIO pin to which NINT output of SX150X is
4113 + connected.
4114 +
4115 +
4116 +Name: tinylcd35
4117 +Info: 3.5" Color TFT Display by www.tinylcd.com
4118 + Options: Touch, RTC, keypad
4119 +Load: dtoverlay=tinylcd35,<param>=<val>
4120 +Params: speed Display SPI bus speed
4121 +
4122 + rotate Display rotation {0,90,180,270}
4123 +
4124 + fps Delay between frame updates
4125 +
4126 + debug Debug output level {0-7}
4127 +
4128 + touch Enable touch panel
4129 +
4130 + touchgpio Touch controller IRQ GPIO
4131 +
4132 + xohms Touchpanel: Resistance of X-plate in ohms
4133 +
4134 + rtc-pcf PCF8563 Real Time Clock
4135 +
4136 + rtc-ds DS1307 Real Time Clock
4137 +
4138 + keypad Enable keypad
4139 +
4140 + Examples:
4141 + Display with touchpanel, PCF8563 RTC and keypad:
4142 + dtoverlay=tinylcd35,touch,rtc-pcf,keypad
4143 + Old touch display:
4144 + dtoverlay=tinylcd35,touch,touchgpio=3
4145 +
4146 +
4147 +Name: uart0
4148 +Info: Change the pin usage of uart0
4149 +Load: dtoverlay=uart0,<param>=<val>
4150 +Params: txd0_pin GPIO pin for TXD0 (14, 32 or 36 - default 14)
4151 +
4152 + rxd0_pin GPIO pin for RXD0 (15, 33 or 37 - default 15)
4153 +
4154 + pin_func Alternative pin function - 4(Alt0) for 14&15,
4155 + 7(Alt3) for 32&33, 6(Alt2) for 36&37
4156 +
4157 +
4158 +Name: uart1
4159 +Info: Change the pin usage of uart1
4160 +Load: dtoverlay=uart1,<param>=<val>
4161 +Params: txd1_pin GPIO pin for TXD1 (14, 32 or 40 - default 14)
4162 +
4163 + rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
4164 +
4165 +
4166 +Name: upstream
4167 +Info: Allow usage of downstream .dtb with upstream kernel. Comprises
4168 + vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays.
4169 +Load: dtoverlay=upstream
4170 +Params: <None>
4171 +
4172 +
4173 +Name: upstream-aux-interrupt
4174 +Info: Allow usage of downstream .dtb with upstream kernel by binding AUX
4175 + devices directly to the shared AUX interrupt line. One of the parts
4176 + of the 'upstream' overlay
4177 +Load: dtoverlay=upstream-aux-interrupt
4178 +Params: <None>
4179 +
4180 +
4181 +Name: vc4-fkms-v3d
4182 +Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
4183 + display stack.
4184 +Load: dtoverlay=vc4-fkms-v3d,<param>
4185 +Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
4186 + cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
4187 + cma-128 CMA is 128MB, 128MB-aligned
4188 + cma-96 CMA is 96MB, 128MB-aligned
4189 + cma-64 CMA is 64MB, 64MB-aligned
4190 +
4191 +
4192 +Name: vc4-kms-v3d
4193 +Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or
4194 + booting to GUI while this overlay is in use will cause interesting
4195 + lockups.
4196 +Load: dtoverlay=vc4-kms-v3d,<param>
4197 +Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
4198 + cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
4199 + cma-128 CMA is 128MB, 128MB-aligned
4200 + cma-96 CMA is 96MB, 128MB-aligned
4201 + cma-64 CMA is 64MB, 64MB-aligned
4202 +
4203 +
4204 +Name: vga666
4205 +Info: Overlay for the Fen Logic VGA666 board
4206 + This uses GPIOs 2-21 (so no I2C), and activates the output 2-3 seconds
4207 + after the kernel has started.
4208 +Load: dtoverlay=vga666
4209 +Params: <None>
4210 +
4211 +
4212 +Name: w1-gpio
4213 +Info: Configures the w1-gpio Onewire interface module.
4214 + Use this overlay if you *don't* need a GPIO to drive an external pullup.
4215 +Load: dtoverlay=w1-gpio,<param>=<val>
4216 +Params: gpiopin GPIO for I/O (default "4")
4217 +
4218 + pullup Non-zero, "on", or "y" to enable the parasitic
4219 + power (2-wire, power-on-data) feature
4220 +
4221 +
4222 +Name: w1-gpio-pullup
4223 +Info: Configures the w1-gpio Onewire interface module.
4224 + Use this overlay if you *do* need a GPIO to drive an external pullup.
4225 +Load: dtoverlay=w1-gpio-pullup,<param>=<val>
4226 +Params: gpiopin GPIO for I/O (default "4")
4227 +
4228 + pullup Non-zero, "on", or "y" to enable the parasitic
4229 + power (2-wire, power-on-data) feature
4230 +
4231 + extpullup GPIO for external pullup (default "5")
4232 +
4233 +
4234 +Name: wittypi
4235 +Info: Configures the wittypi RTC module.
4236 +Load: dtoverlay=wittypi,<param>=<val>
4237 +Params: led_gpio GPIO for LED (default "17")
4238 + led_trigger Choose which activity the LED tracks (default
4239 + "default-on")
4240 +
4241 +
4242 +Troubleshooting
4243 +===============
4244 +
4245 +If you are experiencing problems that you think are DT-related, enable DT
4246 +diagnostic output by adding this to /boot/config.txt:
4247 +
4248 + dtdebug=on
4249 +
4250 +and rebooting. Then run:
4251 +
4252 + sudo vcdbg log msg
4253 +
4254 +and look for relevant messages.
4255 +
4256 +Further reading
4257 +===============
4258 +
4259 +This is only meant to be a quick introduction to the subject of Device Tree on
4260 +Raspberry Pi. There is a more complete explanation here:
4261 +
4262 +http://www.raspberrypi.org/documentation/configuration/device-tree.md
4263 --- /dev/null
4264 +++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
4265 @@ -0,0 +1,40 @@
4266 +// Definitions for ADAU1977 ADC
4267 +/dts-v1/;
4268 +/plugin/;
4269 +
4270 +/ {
4271 + compatible = "brcm,bcm2708";
4272 +
4273 + fragment@0 {
4274 + target = <&i2c>;
4275 +
4276 + __overlay__ {
4277 + #address-cells = <1>;
4278 + #size-cells = <0>;
4279 + status = "okay";
4280 +
4281 + adau1977: codec@11 {
4282 + compatible = "adi,adau1977";
4283 + reg = <0x11>;
4284 + reset-gpios = <&gpio 5 0>;
4285 + AVDD-supply = <&vdd_3v3_reg>;
4286 + };
4287 + };
4288 + };
4289 +
4290 + fragment@1 {
4291 + target = <&i2s>;
4292 + __overlay__ {
4293 + status = "okay";
4294 + };
4295 + };
4296 +
4297 + fragment@2 {
4298 + target = <&sound>;
4299 + __overlay__ {
4300 + compatible = "adi,adau1977-adc";
4301 + i2s-controller = <&i2s>;
4302 + status = "okay";
4303 + };
4304 + };
4305 +};
4306 --- /dev/null
4307 +++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
4308 @@ -0,0 +1,52 @@
4309 +/dts-v1/;
4310 +/plugin/;
4311 +
4312 +/ {
4313 + compatible = "brcm,bcm2708";
4314 +
4315 + fragment@0 {
4316 + target = <&i2s>;
4317 + __overlay__ {
4318 + status = "okay";
4319 + };
4320 + };
4321 +
4322 + fragment@1 {
4323 + target-path = "/";
4324 + __overlay__ {
4325 + adau7002_codec: adau7002-codec {
4326 + #sound-dai-cells = <0>;
4327 + compatible = "adi,adau7002";
4328 +/* IOVDD-supply = <&supply>;*/
4329 + status = "okay";
4330 + };
4331 + };
4332 + };
4333 +
4334 + fragment@2 {
4335 + target = <&sound>;
4336 + sound_overlay: __overlay__ {
4337 + compatible = "simple-audio-card";
4338 + simple-audio-card,format = "i2s";
4339 + simple-audio-card,name = "adau7002";
4340 + simple-audio-card,bitclock-slave = <&dailink0_slave>;
4341 + simple-audio-card,frame-slave = <&dailink0_slave>;
4342 + simple-audio-card,widgets =
4343 + "Microphone", "Microphone Jack";
4344 + simple-audio-card,routing =
4345 + "PDM_DAT", "Microphone Jack";
4346 + status = "okay";
4347 + simple-audio-card,cpu {
4348 + sound-dai = <&i2s>;
4349 + };
4350 + dailink0_slave: simple-audio-card,codec {
4351 + sound-dai = <&adau7002_codec>;
4352 + };
4353 + };
4354 + };
4355 +
4356 +
4357 + __overrides__ {
4358 + card-name = <&sound_overlay>,"simple-audio-card,name";
4359 + };
4360 +};
4361 --- /dev/null
4362 +++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
4363 @@ -0,0 +1,98 @@
4364 +/*
4365 + * 2016 - Erik Sejr
4366 + */
4367 +/dts-v1/;
4368 +/plugin/;
4369 +
4370 +/ {
4371 + compatible = "brcm,bcm2708";
4372 + /* ----------- ADS1015 ------------ */
4373 + fragment@0 {
4374 + target = <&i2c_arm>;
4375 + __overlay__ {
4376 + #address-cells = <1>;
4377 + #size-cells = <0>;
4378 + status = "okay";
4379 + ads1015: ads1015 {
4380 + compatible = "ti,ads1015";
4381 + status = "okay";
4382 + #address-cells = <1>;
4383 + #size-cells = <0>;
4384 + reg = <0x48>;
4385 + };
4386 + };
4387 + };
4388 +
4389 + fragment@1 {
4390 + target-path = "i2c_arm/ads1015";
4391 + __overlay__ {
4392 + #address-cells = <1>;
4393 + #size-cells = <0>;
4394 + channel_a: channel_a {
4395 + reg = <4>;
4396 + ti,gain = <2>;
4397 + ti,datarate = <4>;
4398 + };
4399 + };
4400 + };
4401 +
4402 + fragment@2 {
4403 + target-path = "i2c_arm/ads1015";
4404 + __dormant__ {
4405 + #address-cells = <1>;
4406 + #size-cells = <0>;
4407 + channel_b: channel_b {
4408 + reg = <5>;
4409 + ti,gain = <2>;
4410 + ti,datarate = <4>;
4411 + };
4412 + };
4413 + };
4414 +
4415 + fragment@3 {
4416 + target-path = "i2c_arm/ads1015";
4417 + __dormant__ {
4418 + #address-cells = <1>;
4419 + #size-cells = <0>;
4420 + channel_c: channel_c {
4421 + reg = <6>;
4422 + ti,gain = <2>;
4423 + ti,datarate = <4>;
4424 + };
4425 + };
4426 + };
4427 +
4428 + fragment@4 {
4429 + target-path = "i2c_arm/ads1015";
4430 + __dormant__ {
4431 + #address-cells = <1>;
4432 + #size-cells = <0>;
4433 + channel_d: channel_d {
4434 + reg = <7>;
4435 + ti,gain = <2>;
4436 + ti,datarate = <4>;
4437 + };
4438 + };
4439 + };
4440 +
4441 + __overrides__ {
4442 + addr = <&ads1015>,"reg:0";
4443 + cha_enable = <0>,"=1";
4444 + cha_cfg = <&channel_a>,"reg:0";
4445 + cha_gain = <&channel_a>,"ti,gain:0";
4446 + cha_datarate = <&channel_a>,"ti,datarate:0";
4447 + chb_enable = <0>,"=2";
4448 + chb_cfg = <&channel_b>,"reg:0";
4449 + chb_gain = <&channel_b>,"ti,gain:0";
4450 + chb_datarate = <&channel_b>,"ti,datarate:0";
4451 + chc_enable = <0>,"=3";
4452 + chc_cfg = <&channel_c>,"reg:0";
4453 + chc_gain = <&channel_c>,"ti,gain:0";
4454 + chc_datarate = <&channel_c>,"ti,datarate:0";
4455 + chd_enable = <0>,"=4";
4456 + chd_cfg = <&channel_d>,"reg:0";
4457 + chd_gain = <&channel_d>,"ti,gain:0";
4458 + chd_datarate = <&channel_d>,"ti,datarate:0";
4459 + };
4460 +
4461 +};
4462 --- /dev/null
4463 +++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
4464 @@ -0,0 +1,103 @@
4465 +/*
4466 + * TI ADS1115 multi-channel ADC overlay
4467 + */
4468 +
4469 +/dts-v1/;
4470 +/plugin/;
4471 +
4472 +/ {
4473 + compatible = "brcm,bcm2708";
4474 +
4475 + fragment@0 {
4476 + target = <&i2c_arm>;
4477 + __overlay__ {
4478 + #address-cells = <1>;
4479 + #size-cells = <0>;
4480 + status = "okay";
4481 +
4482 + ads1115: ads1115 {
4483 + compatible = "ti,ads1115";
4484 + status = "okay";
4485 + #address-cells = <1>;
4486 + #size-cells = <0>;
4487 + reg = <0x48>;
4488 + };
4489 + };
4490 + };
4491 +
4492 + fragment@1 {
4493 + target-path = "i2c_arm/ads1115";
4494 + __dormant__ {
4495 + #address-cells = <1>;
4496 + #size-cells = <0>;
4497 +
4498 + channel_a: channel_a {
4499 + reg = <4>;
4500 + ti,gain = <1>;
4501 + ti,datarate = <7>;
4502 + };
4503 + };
4504 + };
4505 +
4506 + fragment@2 {
4507 + target-path = "i2c_arm/ads1115";
4508 + __dormant__ {
4509 + #address-cells = <1>;
4510 + #size-cells = <0>;
4511 +
4512 + channel_b: channel_b {
4513 + reg = <5>;
4514 + ti,gain = <1>;
4515 + ti,datarate = <7>;
4516 + };
4517 + };
4518 + };
4519 +
4520 + fragment@3 {
4521 + target-path = "i2c_arm/ads1115";
4522 + __dormant__ {
4523 + #address-cells = <1>;
4524 + #size-cells = <0>;
4525 +
4526 + channel_c: channel_c {
4527 + reg = <6>;
4528 + ti,gain = <1>;
4529 + ti,datarate = <7>;
4530 + };
4531 + };
4532 + };
4533 +
4534 + fragment@4 {
4535 + target-path = "i2c_arm/ads1115";
4536 + __dormant__ {
4537 + #address-cells = <1>;
4538 + #size-cells = <0>;
4539 +
4540 + channel_d: channel_d {
4541 + reg = <7>;
4542 + ti,gain = <1>;
4543 + ti,datarate = <7>;
4544 + };
4545 + };
4546 + };
4547 +
4548 + __overrides__ {
4549 + addr = <&ads1115>,"reg:0";
4550 + cha_enable = <0>,"=1";
4551 + cha_cfg = <&channel_a>,"reg:0";
4552 + cha_gain = <&channel_a>,"ti,gain:0";
4553 + cha_datarate = <&channel_a>,"ti,datarate:0";
4554 + chb_enable = <0>,"=2";
4555 + chb_cfg = <&channel_b>,"reg:0";
4556 + chb_gain = <&channel_b>,"ti,gain:0";
4557 + chb_datarate = <&channel_b>,"ti,datarate:0";
4558 + chc_enable = <0>,"=3";
4559 + chc_cfg = <&channel_c>,"reg:0";
4560 + chc_gain = <&channel_c>,"ti,gain:0";
4561 + chc_datarate = <&channel_c>,"ti,datarate:0";
4562 + chd_enable = <0>,"=4";
4563 + chd_cfg = <&channel_d>,"reg:0";
4564 + chd_gain = <&channel_d>,"ti,gain:0";
4565 + chd_datarate = <&channel_d>,"ti,datarate:0";
4566 + };
4567 +};
4568 --- /dev/null
4569 +++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
4570 @@ -0,0 +1,89 @@
4571 +/*
4572 + * Generic Device Tree overlay for the ADS7846 touch controller
4573 + *
4574 + */
4575 +
4576 +/dts-v1/;
4577 +/plugin/;
4578 +
4579 +/ {
4580 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
4581 +
4582 + fragment@0 {
4583 + target = <&spi0>;
4584 + __overlay__ {
4585 + status = "okay";
4586 + };
4587 + };
4588 +
4589 + fragment@1 {
4590 + target = <&spidev0>;
4591 + __overlay__ {
4592 + status = "disabled";
4593 + };
4594 + };
4595 +
4596 + fragment@2 {
4597 + target = <&spidev1>;
4598 + __overlay__ {
4599 + status = "disabled";
4600 + };
4601 + };
4602 +
4603 + fragment@3 {
4604 + target = <&gpio>;
4605 + __overlay__ {
4606 + ads7846_pins: ads7846_pins {
4607 + brcm,pins = <255>; /* illegal default value */
4608 + brcm,function = <0>; /* in */
4609 + brcm,pull = <0>; /* none */
4610 + };
4611 + };
4612 + };
4613 +
4614 + fragment@4 {
4615 + target = <&spi0>;
4616 + __overlay__ {
4617 + /* needed to avoid dtc warning */
4618 + #address-cells = <1>;
4619 + #size-cells = <0>;
4620 +
4621 + ads7846: ads7846@1 {
4622 + compatible = "ti,ads7846";
4623 + reg = <1>;
4624 + pinctrl-names = "default";
4625 + pinctrl-0 = <&ads7846_pins>;
4626 +
4627 + spi-max-frequency = <2000000>;
4628 + interrupts = <255 2>; /* high-to-low edge triggered */
4629 + interrupt-parent = <&gpio>;
4630 + pendown-gpio = <&gpio 255 0>;
4631 +
4632 + /* driver defaults */
4633 + ti,x-min = /bits/ 16 <0>;
4634 + ti,y-min = /bits/ 16 <0>;
4635 + ti,x-max = /bits/ 16 <0x0FFF>;
4636 + ti,y-max = /bits/ 16 <0x0FFF>;
4637 + ti,pressure-min = /bits/ 16 <0>;
4638 + ti,pressure-max = /bits/ 16 <0xFFFF>;
4639 + ti,x-plate-ohms = /bits/ 16 <400>;
4640 + };
4641 + };
4642 + };
4643 + __overrides__ {
4644 + cs = <&ads7846>,"reg:0";
4645 + speed = <&ads7846>,"spi-max-frequency:0";
4646 + penirq = <&ads7846_pins>,"brcm,pins:0", /* REQUIRED */
4647 + <&ads7846>,"interrupts:0",
4648 + <&ads7846>,"pendown-gpio:4";
4649 + penirq_pull = <&ads7846_pins>,"brcm,pull:0";
4650 + swapxy = <&ads7846>,"ti,swap-xy?";
4651 + xmin = <&ads7846>,"ti,x-min;0";
4652 + ymin = <&ads7846>,"ti,y-min;0";
4653 + xmax = <&ads7846>,"ti,x-max;0";
4654 + ymax = <&ads7846>,"ti,y-max;0";
4655 + pmin = <&ads7846>,"ti,pressure-min;0";
4656 + pmax = <&ads7846>,"ti,pressure-max;0";
4657 + xohms = <&ads7846>,"ti,x-plate-ohms;0";
4658 + };
4659 +};
4660 --- /dev/null
4661 +++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
4662 @@ -0,0 +1,49 @@
4663 +// Definitions for Digital Dreamtime Akkordion using IQaudIO DAC+ or DACZero
4664 +/dts-v1/;
4665 +/plugin/;
4666 +
4667 +/ {
4668 + compatible = "brcm,bcm2708";
4669 +
4670 + fragment@0 {
4671 + target = <&i2s>;
4672 + __overlay__ {
4673 + status = "okay";
4674 + };
4675 + };
4676 +
4677 + fragment@1 {
4678 + target = <&i2c1>;
4679 + __overlay__ {
4680 + #address-cells = <1>;
4681 + #size-cells = <0>;
4682 + status = "okay";
4683 +
4684 + pcm5122@4c {
4685 + #sound-dai-cells = <0>;
4686 + compatible = "ti,pcm5122";
4687 + reg = <0x4c>;
4688 + AVDD-supply = <&vdd_3v3_reg>;
4689 + DVDD-supply = <&vdd_3v3_reg>;
4690 + CPVDD-supply = <&vdd_3v3_reg>;
4691 + status = "okay";
4692 + };
4693 + };
4694 + };
4695 +
4696 + fragment@2 {
4697 + target = <&sound>;
4698 + frag2: __overlay__ {
4699 + compatible = "iqaudio,iqaudio-dac";
4700 + card_name = "Akkordion";
4701 + dai_name = "IQaudIO DAC";
4702 + dai_stream_name = "IQaudIO DAC HiFi";
4703 + i2s-controller = <&i2s>;
4704 + status = "okay";
4705 + };
4706 + };
4707 +
4708 + __overrides__ {
4709 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
4710 + };
4711 +};
4712 --- /dev/null
4713 +++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
4714 @@ -0,0 +1,59 @@
4715 +/*
4716 + * Definitions for Allo Boss DAC board
4717 + */
4718 +
4719 +/dts-v1/;
4720 +/plugin/;
4721 +
4722 +/ {
4723 + compatible = "brcm,bcm2708";
4724 +
4725 + fragment@0 {
4726 + target-path = "/clocks";
4727 + __overlay__ {
4728 + boss_osc: boss_osc {
4729 + compatible = "allo,dac-clk";
4730 + #clock-cells = <0>;
4731 + };
4732 + };
4733 + };
4734 +
4735 + fragment@1 {
4736 + target = <&i2s>;
4737 + __overlay__ {
4738 + status = "okay";
4739 + };
4740 + };
4741 +
4742 + fragment@2 {
4743 + target = <&i2c1>;
4744 + __overlay__ {
4745 + #address-cells = <1>;
4746 + #size-cells = <0>;
4747 + status = "okay";
4748 +
4749 + pcm5122@4d {
4750 + #sound-dai-cells = <0>;
4751 + compatible = "ti,pcm5122";
4752 + clocks = <&boss_osc>;
4753 + reg = <0x4d>;
4754 + status = "okay";
4755 + };
4756 + };
4757 + };
4758 +
4759 + fragment@3 {
4760 + target = <&sound>;
4761 + boss_dac: __overlay__ {
4762 + compatible = "allo,boss-dac";
4763 + i2s-controller = <&i2s>;
4764 + mute-gpios = <&gpio 6 1>;
4765 + status = "okay";
4766 + };
4767 + };
4768 +
4769 + __overrides__ {
4770 + 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
4771 + slave = <&boss_dac>,"allo,slave?";
4772 + };
4773 +};
4774 --- /dev/null
4775 +++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
4776 @@ -0,0 +1,44 @@
4777 +// Definitions for Allo DigiOne
4778 +/dts-v1/;
4779 +/plugin/;
4780 +
4781 +/ {
4782 + compatible = "brcm,bcm2708";
4783 +
4784 + fragment@0 {
4785 + target = <&i2s>;
4786 + __overlay__ {
4787 + status = "okay";
4788 + };
4789 + };
4790 +
4791 + fragment@1 {
4792 + target = <&i2c1>;
4793 + __overlay__ {
4794 + #address-cells = <1>;
4795 + #size-cells = <0>;
4796 + status = "okay";
4797 +
4798 + wm8804@3b {
4799 + #sound-dai-cells = <0>;
4800 + compatible = "wlf,wm8804";
4801 + reg = <0x3b>;
4802 + PVDD-supply = <&vdd_3v3_reg>;
4803 + DVDD-supply = <&vdd_3v3_reg>;
4804 + status = "okay";
4805 + wlf,reset-gpio = <&gpio 17 0>;
4806 + };
4807 + };
4808 + };
4809 +
4810 + fragment@2 {
4811 + target = <&sound>;
4812 + __overlay__ {
4813 + compatible = "allo,allo-digione";
4814 + i2s-controller = <&i2s>;
4815 + status = "okay";
4816 + clock44-gpio = <&gpio 5 0>;
4817 + clock48-gpio = <&gpio 6 0>;
4818 + };
4819 + };
4820 +};
4821 --- /dev/null
4822 +++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
4823 @@ -0,0 +1,57 @@
4824 +/*
4825 + * Definitions for Allo Katana DAC boards
4826 + */
4827 +
4828 +/dts-v1/;
4829 +/plugin/;
4830 +
4831 +/ {
4832 + compatible = "brcm,bcm2708";
4833 +
4834 + fragment@0 {
4835 + target = <&i2s>;
4836 + __overlay__ {
4837 + #sound-dai-cells = <0>;
4838 + status = "okay";
4839 + cpu_port: port {
4840 + cpu_endpoint: endpoint {
4841 + remote-endpoint = <&codec_endpoint>;
4842 + bitclock-master = <&codec_endpoint>;
4843 + frame-master = <&codec_endpoint>;
4844 + dai-format = "i2s";
4845 + };
4846 + };
4847 + };
4848 + };
4849 +
4850 + fragment@1 {
4851 + target = <&i2c1>;
4852 + __overlay__ {
4853 + #address-cells = <1>;
4854 + #size-cells = <0>;
4855 + status = "okay";
4856 +
4857 + allo-katana-codec@30 {
4858 + #sound-dai-cells = <0>;
4859 + compatible = "allo,allo-katana-codec";
4860 + reg = <0x30>;
4861 + port {
4862 + codec_endpoint: endpoint {
4863 + remote-endpoint = <&cpu_endpoint>;
4864 + };
4865 + };
4866 + };
4867 + };
4868 + };
4869 +
4870 + fragment@2 {
4871 + target = <&sound>;
4872 + katana_dac: __overlay__ {
4873 + compatible = "audio-graph-card";
4874 + label = "Allo Katana";
4875 + dais = <&cpu_port>;
4876 + status = "okay";
4877 + };
4878 + };
4879 +};
4880 +
4881 --- /dev/null
4882 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
4883 @@ -0,0 +1,54 @@
4884 +/*
4885 + * Definitions for Allo Piano DAC (2.0/2.1) boards
4886 + *
4887 + * NB. The Piano DAC 2.1 board contains 2x TI PCM5142 DAC's. One DAC is stereo
4888 + * (left/right) and the other provides a subwoofer output, using DSP on the
4889 + * chip for digital high/low pass crossover.
4890 + * The initial support for this hardware, that doesn't require any codec driver
4891 + * modifications, uses only one DAC chip for stereo (left/right) output, the
4892 + * chip with 0x4c slave address. The other chip at 0x4d is currently ignored!
4893 + */
4894 +
4895 +/dts-v1/;
4896 +/plugin/;
4897 +
4898 +/ {
4899 + compatible = "brcm,bcm2708";
4900 +
4901 + fragment@0 {
4902 + target = <&i2s>;
4903 + __overlay__ {
4904 + status = "okay";
4905 + };
4906 + };
4907 +
4908 + fragment@1 {
4909 + target = <&i2c1>;
4910 + __overlay__ {
4911 + #address-cells = <1>;
4912 + #size-cells = <0>;
4913 + status = "okay";
4914 +
4915 + pcm5142@4c {
4916 + #sound-dai-cells = <0>;
4917 + compatible = "ti,pcm5142";
4918 + reg = <0x4c>;
4919 + status = "okay";
4920 + };
4921 + };
4922 + };
4923 +
4924 + fragment@2 {
4925 + target = <&sound>;
4926 + piano_dac: __overlay__ {
4927 + compatible = "allo,piano-dac";
4928 + i2s-controller = <&i2s>;
4929 + status = "okay";
4930 + };
4931 + };
4932 +
4933 + __overrides__ {
4934 + 24db_digital_gain =
4935 + <&piano_dac>,"allo,24db_digital_gain?";
4936 + };
4937 +};
4938 --- /dev/null
4939 +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
4940 @@ -0,0 +1,55 @@
4941 +// Definitions for Piano DAC
4942 +/dts-v1/;
4943 +/plugin/;
4944 +
4945 +/ {
4946 + compatible = "brcm,bcm2708";
4947 +
4948 + fragment@0 {
4949 + target = <&i2s>;
4950 + __overlay__ {
4951 + status = "okay";
4952 + };
4953 + };
4954 +
4955 + fragment@1 {
4956 + target = <&i2c1>;
4957 + __overlay__ {
4958 + #address-cells = <1>;
4959 + #size-cells = <0>;
4960 + status = "okay";
4961 +
4962 + allo_pcm5122_4c: pcm5122@4c {
4963 + #sound-dai-cells = <0>;
4964 + compatible = "ti,pcm5122";
4965 + reg = <0x4c>;
4966 + status = "okay";
4967 + };
4968 + allo_pcm5122_4d: pcm5122@4d {
4969 + #sound-dai-cells = <0>;
4970 + compatible = "ti,pcm5122";
4971 + reg = <0x4d>;
4972 + status = "okay";
4973 + };
4974 + };
4975 + };
4976 +
4977 + fragment@2 {
4978 + target = <&sound>;
4979 + piano_dac: __overlay__ {
4980 + compatible = "allo,piano-dac-plus";
4981 + audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
4982 + i2s-controller = <&i2s>;
4983 + mute1-gpios = <&gpio 6 1>;
4984 + mute2-gpios = <&gpio 25 1>;
4985 + status = "okay";
4986 + };
4987 + };
4988 +
4989 + __overrides__ {
4990 + 24db_digital_gain =
4991 + <&piano_dac>,"allo,24db_digital_gain?";
4992 + glb_mclk =
4993 + <&piano_dac>,"allo,glb_mclk?";
4994 + };
4995 +};
4996 --- /dev/null
4997 +++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
4998 @@ -0,0 +1,57 @@
4999 +/dts-v1/;
5000 +/plugin/;
5001 +
5002 +/ {
5003 + compatible = "brcm,bcm2708";
5004 +
5005 + fragment@0 {
5006 + target = <&sound>;
5007 + __overlay__ {
5008 + compatible = "simple-audio-card";
5009 + simple-audio-card,name = "ApplePi-DAC";
5010 +
5011 + status = "okay";
5012 +
5013 + playback_link: simple-audio-card,dai-link@1 {
5014 + format = "i2s";
5015 +
5016 + p_cpu_dai: cpu {
5017 + sound-dai = <&i2s>;
5018 + dai-tdm-slot-num = <2>;
5019 + dai-tdm-slot-width = <32>;
5020 + };
5021 +
5022 + p_codec_dai: codec {
5023 + sound-dai = <&codec_out>;
5024 + };
5025 + };
5026 + };
5027 + };
5028 +
5029 + fragment@1 {
5030 + target-path = "/";
5031 + __overlay__ {
5032 + codec_out: pcm1794a-codec {
5033 + #sound-dai-cells = <0>;
5034 + compatible = "ti,pcm1794a";
5035 + status = "okay";
5036 + };
5037 + };
5038 + };
5039 +
5040 + fragment@2 {
5041 + target = <&i2s>;
5042 + __overlay__ {
5043 + #sound-dai-cells = <0>;
5044 + status = "okay";
5045 + };
5046 + };
5047 +};
5048 +
5049 +/*
5050 + Written by: Leonid Ayzenshtat
5051 + Company: Orchard Audio (www.orchardaudio.com)
5052 +
5053 + compile with:
5054 + dtc -@ -H epapr -O dtb -o ApplePi-DAC.dtbo -W no-unit_address_vs_reg ApplePi-DAC.dts
5055 +*/
5056 --- /dev/null
5057 +++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
5058 @@ -0,0 +1,57 @@
5059 +/dts-v1/;
5060 +/plugin/;
5061 +
5062 +/* Overlay for Atmel AT86RF233 IEEE 802.15.4 WPAN transceiver on spi0.0 */
5063 +
5064 +/ {
5065 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
5066 +
5067 + fragment@0 {
5068 + target = <&spi0>;
5069 + __overlay__ {
5070 + #address-cells = <1>;
5071 + #size-cells = <0>;
5072 +
5073 + status = "okay";
5074 +
5075 + lowpan0: at86rf233@0 {
5076 + compatible = "atmel,at86rf233";
5077 + reg = <0>;
5078 + interrupt-parent = <&gpio>;
5079 + interrupts = <23 4>; /* active high */
5080 + reset-gpio = <&gpio 24 1>;
5081 + sleep-gpio = <&gpio 25 1>;
5082 + spi-max-frequency = <3000000>;
5083 + xtal-trim = /bits/ 8 <0xf>;
5084 + };
5085 + };
5086 + };
5087 +
5088 + fragment@1 {
5089 + target = <&spidev0>;
5090 + __overlay__ {
5091 + status = "disabled";
5092 + };
5093 + };
5094 +
5095 + fragment@2 {
5096 + target = <&gpio>;
5097 + __overlay__ {
5098 + lowpan0_pins: lowpan0_pins {
5099 + brcm,pins = <23 24 25>;
5100 + brcm,function = <0 1 1>; /* in out out */
5101 + };
5102 + };
5103 + };
5104 +
5105 + __overrides__ {
5106 + interrupt = <&lowpan0>, "interrupts:0",
5107 + <&lowpan0_pins>, "brcm,pins:0";
5108 + reset = <&lowpan0>, "reset-gpio:4",
5109 + <&lowpan0_pins>, "brcm,pins:4";
5110 + sleep = <&lowpan0>, "sleep-gpio:4",
5111 + <&lowpan0_pins>, "brcm,pins:8";
5112 + speed = <&lowpan0>, "spi-max-frequency:0";
5113 + trim = <&lowpan0>, "xtal-trim.0";
5114 + };
5115 +};
5116 --- /dev/null
5117 +++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
5118 @@ -0,0 +1,59 @@
5119 +// Definitions for audioinjector.net audio add on soundcard
5120 +/dts-v1/;
5121 +/plugin/;
5122 +
5123 +/ {
5124 + compatible = "brcm,bcm2708";
5125 +
5126 + fragment@0 {
5127 + target = <&i2s>;
5128 + __overlay__ {
5129 + status = "okay";
5130 + };
5131 + };
5132 +
5133 + fragment@1 {
5134 + target = <&i2c1>;
5135 + __overlay__ {
5136 + #address-cells = <1>;
5137 + #size-cells = <0>;
5138 + status = "okay";
5139 +
5140 + cs42448: cs42448@48 {
5141 + #sound-dai-cells = <0>;
5142 + compatible = "cirrus,cs42448";
5143 + reg = <0x48>;
5144 + clocks = <&cs42448_mclk>;
5145 + clock-names = "mclk";
5146 + VA-supply = <&vdd_5v0_reg>;
5147 + VD-supply = <&vdd_3v3_reg>;
5148 + VLS-supply = <&vdd_3v3_reg>;
5149 + VLC-supply = <&vdd_3v3_reg>;
5150 + status = "okay";
5151 + };
5152 +
5153 + cs42448_mclk: codec-mclk {
5154 + compatible = "fixed-clock";
5155 + #clock-cells = <0>;
5156 + clock-frequency = <49152000>;
5157 + };
5158 + };
5159 + };
5160 +
5161 + fragment@2 {
5162 + target = <&sound>;
5163 + snd: __overlay__ {
5164 + compatible = "ai,audioinjector-octo-soundcard";
5165 + mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
5166 + <&gpio 24 0>;
5167 + reset-gpios = <&gpio 5 0>;
5168 + i2s-controller = <&i2s>;
5169 + codec = <&cs42448>;
5170 + status = "okay";
5171 + };
5172 + };
5173 +
5174 + __overrides__ {
5175 + non-stop-clocks = <&snd>, "non-stop-clocks?";
5176 + };
5177 +};
5178 --- /dev/null
5179 +++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
5180 @@ -0,0 +1,39 @@
5181 +// Definitions for audioinjector.net audio add on soundcard
5182 +/dts-v1/;
5183 +/plugin/;
5184 +
5185 +/ {
5186 + compatible = "brcm,bcm2708";
5187 +
5188 + fragment@0 {
5189 + target = <&i2s>;
5190 + __overlay__ {
5191 + status = "okay";
5192 + };
5193 + };
5194 +
5195 + fragment@1 {
5196 + target = <&i2c1>;
5197 + __overlay__ {
5198 + #address-cells = <1>;
5199 + #size-cells = <0>;
5200 + status = "okay";
5201 +
5202 + wm8731@1a {
5203 + #sound-dai-cells = <0>;
5204 + compatible = "wlf,wm8731";
5205 + reg = <0x1a>;
5206 + status = "okay";
5207 + };
5208 + };
5209 + };
5210 +
5211 + fragment@2 {
5212 + target = <&sound>;
5213 + __overlay__ {
5214 + compatible = "ai,audioinjector-pi-soundcard";
5215 + i2s-controller = <&i2s>;
5216 + status = "okay";
5217 + };
5218 + };
5219 +};
5220 --- /dev/null
5221 +++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
5222 @@ -0,0 +1,19 @@
5223 +/dts-v1/;
5224 +/plugin/;
5225 +
5226 +/ {
5227 + compatible = "brcm,bcm2708";
5228 +
5229 + fragment@0 {
5230 + target = <&audio_pins>;
5231 + frag0: __overlay__ {
5232 + brcm,pins = < 12 13 >;
5233 + brcm,function = < 4 >; /* alt0 alt0 */
5234 + };
5235 + };
5236 +
5237 + __overrides__ {
5238 + swap_lr = <&frag0>, "swap_lr?";
5239 + enable_jack = <&frag0>, "enable_jack?";
5240 + };
5241 +};
5242 --- /dev/null
5243 +++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
5244 @@ -0,0 +1,79 @@
5245 +/dts-v1/;
5246 +/plugin/;
5247 +
5248 +/{
5249 + compatible = "brcm,bcm2708";
5250 +
5251 + fragment@0 {
5252 + target = <&mmc>;
5253 + sdio_wifi: __overlay__ {
5254 + pinctrl-names = "default";
5255 + pinctrl-0 = <&sdio_pins>;
5256 + bus-width = <4>;
5257 + brcm,overclock-50 = <35>;
5258 + status = "okay";
5259 + };
5260 + };
5261 +
5262 + fragment@1 {
5263 + target = <&gpio>;
5264 + __overlay__ {
5265 + sdio_pins: sdio_pins {
5266 + brcm,pins = <34 35 36 37 38 39>;
5267 + brcm,function = <7>; /* ALT3 = SD1 */
5268 + brcm,pull = <0 2 2 2 2 2>;
5269 + };
5270 +
5271 + power_ctrl_pins: power_ctrl_pins {
5272 + brcm,pins = <40>;
5273 + brcm,function = <1>; // out
5274 + };
5275 + };
5276 + };
5277 +
5278 + fragment@2 {
5279 + target-path = "/";
5280 + __overlay__ {
5281 + // We should investigate how to switch to mmc-pwrseq-sd8787
5282 + // Currently that module requires two GPIOs to function since it
5283 + // targets a slightly different chip
5284 + power_ctrl: power_ctrl {
5285 + compatible = "gpio-poweroff";
5286 + gpios = <&gpio 40 1>;
5287 + force;
5288 + };
5289 +
5290 + i2c_soft: i2c@0 {
5291 + compatible = "i2c-gpio";
5292 + gpios = <&gpio 43 0 /* sda */ &gpio 42 0 /* scl */>;
5293 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
5294 + #address-cells = <1>;
5295 + #size-cells = <0>;
5296 + };
5297 + };
5298 + };
5299 +
5300 + fragment@3 {
5301 + target = <&i2c_soft>;
5302 + __overlay__ {
5303 + #address-cells = <1>;
5304 + #size-cells = <0>;
5305 + status = "okay";
5306 +
5307 + gpio_expander: gpio_expander@20 {
5308 + compatible = "nxp,pca9554";
5309 + gpio-controller;
5310 + #gpio-cells = <2>;
5311 + reg = <0x20>;
5312 + status = "okay";
5313 + };
5314 +
5315 + // rtc clock
5316 + ds1307: ds1307@68 {
5317 + compatible = "maxim,ds1307";
5318 + reg = <0x68>;
5319 + status = "okay";
5320 + };
5321 + };
5322 + };
5323 +};
5324 --- /dev/null
5325 +++ b/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts
5326 @@ -0,0 +1,23 @@
5327 +// Definitions for BMP085/BMP180 digital barometric pressure and temperature sensors from Bosch Sensortec
5328 +/dts-v1/;
5329 +/plugin/;
5330 +
5331 +/ {
5332 + compatible = "brcm,bcm2708";
5333 +
5334 + fragment@0 {
5335 + target = <&i2c_arm>;
5336 + __overlay__ {
5337 + #address-cells = <1>;
5338 + #size-cells = <0>;
5339 + status = "okay";
5340 +
5341 + bmp085@77 {
5342 + compatible = "bosch,bmp085";
5343 + reg = <0x77>;
5344 + default-oversampling = <3>;
5345 + status = "okay";
5346 + };
5347 + };
5348 + };
5349 +};
5350 --- /dev/null
5351 +++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts
5352 @@ -0,0 +1,39 @@
5353 +/*
5354 + * Overlay for the DHT11/21/22 humidity/temperature sensor modules.
5355 + */
5356 +/dts-v1/;
5357 +/plugin/;
5358 +
5359 +/ {
5360 + compatible = "brcm,bcm2708";
5361 +
5362 + fragment@0 {
5363 + target-path = "/";
5364 + __overlay__ {
5365 +
5366 + dht11: dht11@0 {
5367 + compatible = "dht11";
5368 + pinctrl-names = "default";
5369 + pinctrl-0 = <&dht11_pins>;
5370 + gpios = <&gpio 4 0>;
5371 + status = "okay";
5372 + };
5373 + };
5374 + };
5375 +
5376 + fragment@1 {
5377 + target = <&gpio>;
5378 + __overlay__ {
5379 + dht11_pins: dht11_pins {
5380 + brcm,pins = <4>;
5381 + brcm,function = <0>; // in
5382 + brcm,pull = <0>; // off
5383 + };
5384 + };
5385 + };
5386 +
5387 + __overrides__ {
5388 + gpiopin = <&dht11_pins>,"brcm,pins:0",
5389 + <&dht11>,"gpios:4";
5390 + };
5391 +};
5392 --- /dev/null
5393 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
5394 @@ -0,0 +1,39 @@
5395 +// Definitions for Dion Audio LOCO DAC-AMP
5396 +
5397 +/*
5398 + * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
5399 + */
5400 +
5401 +/dts-v1/;
5402 +/plugin/;
5403 +
5404 +/ {
5405 + compatible = "brcm,bcm2708";
5406 +
5407 + fragment@0 {
5408 + target = <&i2s>;
5409 + __overlay__ {
5410 + status = "okay";
5411 + };
5412 + };
5413 +
5414 + fragment@1 {
5415 + target-path = "/";
5416 + __overlay__ {
5417 + pcm5102a-codec {
5418 + #sound-dai-cells = <0>;
5419 + compatible = "ti,pcm5102a";
5420 + status = "okay";
5421 + };
5422 + };
5423 + };
5424 +
5425 + fragment@2 {
5426 + target = <&sound>;
5427 + __overlay__ {
5428 + compatible = "dionaudio,loco-pcm5242-tpa3118";
5429 + i2s-controller = <&i2s>;
5430 + status = "okay";
5431 + };
5432 + };
5433 +};
5434 --- /dev/null
5435 +++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
5436 @@ -0,0 +1,49 @@
5437 +/*
5438 + * Definitions for Dion Audio LOCO-V2 DAC-AMP
5439 + * eg. dtoverlay=dionaudio-loco-v2
5440 + *
5441 + * PCM5242 DAC (in software mode) and TPA3255 AMP.
5442 + */
5443 +
5444 +/dts-v1/;
5445 +/plugin/;
5446 +
5447 +/ {
5448 + compatible = "brcm,bcm2708";
5449 +
5450 + fragment@0 {
5451 + target = <&sound>;
5452 + frag0: __overlay__ {
5453 + compatible = "dionaudio,dionaudio-loco-v2";
5454 + i2s-controller = <&i2s>;
5455 + status = "okay";
5456 + };
5457 + };
5458 +
5459 + fragment@1 {
5460 + target = <&i2s>;
5461 + __overlay__ {
5462 + status = "okay";
5463 + };
5464 + };
5465 +
5466 + fragment@2 {
5467 + target = <&i2c1>;
5468 + __overlay__ {
5469 + #address-cells = <1>;
5470 + #size-cells = <0>;
5471 + status = "okay";
5472 +
5473 + pcm5122@4c {
5474 + #sound-dai-cells = <0>;
5475 + compatible = "ti,pcm5122";
5476 + reg = <0x4d>;
5477 + status = "okay";
5478 + };
5479 + };
5480 + };
5481 +
5482 + __overrides__ {
5483 + 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?";
5484 + };
5485 +};
5486 --- /dev/null
5487 +++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
5488 @@ -0,0 +1,31 @@
5489 +/dts-v1/;
5490 +/plugin/;
5491 +
5492 +/{
5493 + compatible = "brcm,bcm2708";
5494 +
5495 + // There is no DPI driver module, but we need a platform device
5496 + // node (that doesn't already use pinctrl) to hang the pinctrl
5497 + // reference on - leds will do
5498 +
5499 + fragment@0 {
5500 + target = <&leds>;
5501 + __overlay__ {
5502 + pinctrl-names = "default";
5503 + pinctrl-0 = <&dpi18_pins>;
5504 + };
5505 + };
5506 +
5507 + fragment@1 {
5508 + target = <&gpio>;
5509 + __overlay__ {
5510 + dpi18_pins: dpi18_pins {
5511 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
5512 + 12 13 14 15 16 17 18 19 20
5513 + 21>;
5514 + brcm,function = <6>; /* alt2 */
5515 + brcm,pull = <0>; /* no pull */
5516 + };
5517 + };
5518 + };
5519 +};
5520 --- /dev/null
5521 +++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
5522 @@ -0,0 +1,31 @@
5523 +/dts-v1/;
5524 +/plugin/;
5525 +
5526 +/{
5527 + compatible = "brcm,bcm2708";
5528 +
5529 + // There is no DPI driver module, but we need a platform device
5530 + // node (that doesn't already use pinctrl) to hang the pinctrl
5531 + // reference on - leds will do
5532 +
5533 + fragment@0 {
5534 + target = <&leds>;
5535 + __overlay__ {
5536 + pinctrl-names = "default";
5537 + pinctrl-0 = <&dpi24_pins>;
5538 + };
5539 + };
5540 +
5541 + fragment@1 {
5542 + target = <&gpio>;
5543 + __overlay__ {
5544 + dpi24_pins: dpi24_pins {
5545 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
5546 + 12 13 14 15 16 17 18 19 20
5547 + 21 22 23 24 25 26 27>;
5548 + brcm,function = <6>; /* alt2 */
5549 + brcm,pull = <0>; /* no pull */
5550 + };
5551 + };
5552 + };
5553 +};
5554 --- /dev/null
5555 +++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
5556 @@ -0,0 +1,20 @@
5557 +/dts-v1/;
5558 +/plugin/;
5559 +
5560 +/{
5561 + compatible = "brcm,bcm2708";
5562 +
5563 + fragment@0 {
5564 + target = <&usb>;
5565 + #address-cells = <1>;
5566 + #size-cells = <1>;
5567 + __overlay__ {
5568 + compatible = "brcm,bcm2708-usb";
5569 + reg = <0x7e980000 0x10000>,
5570 + <0x7e006000 0x1000>;
5571 + interrupts = <2 0>,
5572 + <1 9>;
5573 + status = "okay";
5574 + };
5575 + };
5576 +};
5577 --- /dev/null
5578 +++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
5579 @@ -0,0 +1,28 @@
5580 +/dts-v1/;
5581 +/plugin/;
5582 +
5583 +/{
5584 + compatible = "brcm,bcm2708";
5585 +
5586 + fragment@0 {
5587 + target = <&usb>;
5588 + #address-cells = <1>;
5589 + #size-cells = <1>;
5590 + dwc2_usb: __overlay__ {
5591 + compatible = "brcm,bcm2835-usb";
5592 + reg = <0x7e980000 0x10000>;
5593 + interrupts = <1 9>;
5594 + dr_mode = "otg";
5595 + g-np-tx-fifo-size = <32>;
5596 + g-rx-fifo-size = <256>;
5597 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
5598 + status = "okay";
5599 + };
5600 + };
5601 +
5602 + __overrides__ {
5603 + dr_mode = <&dwc2_usb>, "dr_mode";
5604 + g-np-tx-fifo-size = <&dwc2_usb>,"g-np-tx-fifo-size:0";
5605 + g-rx-fifo-size = <&dwc2_usb>,"g-rx-fifo-size:0";
5606 + };
5607 +};
5608 --- /dev/null
5609 +++ b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
5610 @@ -0,0 +1,53 @@
5611 +// Overlay for the Microchip ENC28J60 Ethernet Controller
5612 +/dts-v1/;
5613 +/plugin/;
5614 +
5615 +/ {
5616 + compatible = "brcm,bcm2708";
5617 +
5618 + fragment@0 {
5619 + target = <&spi0>;
5620 + __overlay__ {
5621 + /* needed to avoid dtc warning */
5622 + #address-cells = <1>;
5623 + #size-cells = <0>;
5624 +
5625 + status = "okay";
5626 +
5627 + eth1: enc28j60@0{
5628 + compatible = "microchip,enc28j60";
5629 + reg = <0>; /* CE0 */
5630 + pinctrl-names = "default";
5631 + pinctrl-0 = <&eth1_pins>;
5632 + interrupt-parent = <&gpio>;
5633 + interrupts = <25 0x2>; /* falling edge */
5634 + spi-max-frequency = <12000000>;
5635 + status = "okay";
5636 + };
5637 + };
5638 + };
5639 +
5640 + fragment@1 {
5641 + target = <&spidev0>;
5642 + __overlay__ {
5643 + status = "disabled";
5644 + };
5645 + };
5646 +
5647 + fragment@2 {
5648 + target = <&gpio>;
5649 + __overlay__ {
5650 + eth1_pins: eth1_pins {
5651 + brcm,pins = <25>;
5652 + brcm,function = <0>; /* in */
5653 + brcm,pull = <0>; /* none */
5654 + };
5655 + };
5656 + };
5657 +
5658 + __overrides__ {
5659 + int_pin = <&eth1>, "interrupts:0",
5660 + <&eth1_pins>, "brcm,pins:0";
5661 + speed = <&eth1>, "spi-max-frequency:0";
5662 + };
5663 +};
5664 --- /dev/null
5665 +++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
5666 @@ -0,0 +1,47 @@
5667 +// Overlay for the Microchip ENC28J60 Ethernet Controller - SPI2 Compute Module
5668 +// Interrupt pin: 39
5669 +/dts-v1/;
5670 +/plugin/;
5671 +
5672 +/ {
5673 + compatible = "brcm,bcm2708";
5674 +
5675 + fragment@0 {
5676 + target = <&spi2>;
5677 + __overlay__ {
5678 + /* needed to avoid dtc warning */
5679 + #address-cells = <1>;
5680 + #size-cells = <0>;
5681 +
5682 + status = "okay";
5683 +
5684 + eth1: enc28j60@0{
5685 + compatible = "microchip,enc28j60";
5686 + reg = <0>; /* CE0 */
5687 + pinctrl-names = "default";
5688 + pinctrl-0 = <&eth1_pins>;
5689 + interrupt-parent = <&gpio>;
5690 + interrupts = <39 0x2>; /* falling edge */
5691 + spi-max-frequency = <12000000>;
5692 + status = "okay";
5693 + };
5694 + };
5695 + };
5696 +
5697 + fragment@1 {
5698 + target = <&gpio>;
5699 + __overlay__ {
5700 + eth1_pins: eth1_pins {
5701 + brcm,pins = <39>;
5702 + brcm,function = <0>; /* in */
5703 + brcm,pull = <0>; /* none */
5704 + };
5705 + };
5706 + };
5707 +
5708 + __overrides__ {
5709 + int_pin = <&eth1>, "interrupts:0",
5710 + <&eth1_pins>, "brcm,pins:0";
5711 + speed = <&eth1>, "spi-max-frequency:0";
5712 + };
5713 +};
5714 --- /dev/null
5715 +++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
5716 @@ -0,0 +1,48 @@
5717 +// Device tree overlay for I2C connected EETI EXC3000 multiple touch controller
5718 +/dts-v1/;
5719 +/plugin/;
5720 +
5721 +/ {
5722 + compatible = "brcm,bcm2708";
5723 +
5724 + fragment@0 {
5725 + target = <&gpio>;
5726 + __overlay__ {
5727 + exc3000_pins: exc3000_pins {
5728 + brcm,pins = <4>; // interrupt
5729 + brcm,function = <0>; // in
5730 + brcm,pull = <2>; // pull-up
5731 + };
5732 + };
5733 + };
5734 +
5735 + fragment@1 {
5736 + target = <&i2c1>;
5737 + __overlay__ {
5738 + #address-cells = <1>;
5739 + #size-cells = <0>;
5740 + status = "okay";
5741 +
5742 + exc3000: exc3000@2a {
5743 + compatible = "eeti,exc3000";
5744 + reg = <0x2a>;
5745 + pinctrl-names = "default";
5746 + pinctrl-0 = <&exc3000_pins>;
5747 + interrupt-parent = <&gpio>;
5748 + interrupts = <4 8>; // active low level-sensitive
5749 + touchscreen-size-x = <4096>;
5750 + touchscreen-size-y = <4096>;
5751 + };
5752 + };
5753 + };
5754 +
5755 + __overrides__ {
5756 + interrupt = <&exc3000_pins>,"brcm,pins:0",
5757 + <&exc3000>,"interrupts:0";
5758 + sizex = <&exc3000>,"touchscreen-size-x:0";
5759 + sizey = <&exc3000>,"touchscreen-size-y:0";
5760 + invx = <&exc3000>,"touchscreen-inverted-x?";
5761 + invy = <&exc3000>,"touchscreen-inverted-y?";
5762 + swapxy = <&exc3000>,"touchscreen-swapped-x-y?";
5763 + };
5764 +};
5765 --- /dev/null
5766 +++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
5767 @@ -0,0 +1,70 @@
5768 +// Definitions for Fe-Pi Audio
5769 +/dts-v1/;
5770 +/plugin/;
5771 +
5772 +/ {
5773 + compatible = "brcm,bcm2708";
5774 +
5775 + fragment@0 {
5776 + target = <&clocks>;
5777 + __overlay__ {
5778 + sgtl5000_mclk: sgtl5000_mclk {
5779 + compatible = "fixed-clock";
5780 + #clock-cells = <0>;
5781 + clock-frequency = <12288000>;
5782 + clock-output-names = "sgtl5000-mclk";
5783 + };
5784 + };
5785 + };
5786 +
5787 + fragment@1 {
5788 + target = <&soc>;
5789 + __overlay__ {
5790 + reg_1v8: reg_1v8@0 {
5791 + compatible = "regulator-fixed";
5792 + regulator-name = "1V8";
5793 + regulator-min-microvolt = <1800000>;
5794 + regulator-max-microvolt = <1800000>;
5795 + regulator-always-on;
5796 + };
5797 + };
5798 + };
5799 +
5800 + fragment@2 {
5801 + target = <&i2c1>;
5802 + __overlay__ {
5803 + #address-cells = <1>;
5804 + #size-cells = <0>;
5805 + status = "okay";
5806 +
5807 + sgtl5000@0a {
5808 + #sound-dai-cells = <0>;
5809 + compatible = "fepi,sgtl5000";
5810 + reg = <0x0a>;
5811 + clocks = <&sgtl5000_mclk>;
5812 + micbias-resistor-k-ohms = <2>;
5813 + micbias-voltage-m-volts = <3000>;
5814 + VDDA-supply = <&vdd_3v3_reg>;
5815 + VDDIO-supply = <&vdd_3v3_reg>;
5816 + VDDD-supply = <&reg_1v8>;
5817 + status = "okay";
5818 + };
5819 + };
5820 + };
5821 +
5822 + fragment@3 {
5823 + target = <&i2s>;
5824 + __overlay__ {
5825 + status = "okay";
5826 + };
5827 + };
5828 +
5829 + fragment@4 {
5830 + target = <&sound>;
5831 + __overlay__ {
5832 + compatible = "fe-pi,fe-pi-audio";
5833 + i2s-controller = <&i2s>;
5834 + status = "okay";
5835 + };
5836 + };
5837 +};
5838 --- /dev/null
5839 +++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts
5840 @@ -0,0 +1,46 @@
5841 +// Device tree overlay for I2C connected Goodix gt9271 multiple touch controller
5842 +/dts-v1/;
5843 +/plugin/;
5844 +
5845 +/ {
5846 + compatible = "brcm,bcm2708";
5847 +
5848 + fragment@0 {
5849 + target = <&gpio>;
5850 + __overlay__ {
5851 + goodix_pins: goodix_pins {
5852 + brcm,pins = <4 17>; // interrupt and reset
5853 + brcm,function = <0 0>; // in
5854 + brcm,pull = <2 2>; // pull-up
5855 + };
5856 + };
5857 + };
5858 +
5859 + fragment@1 {
5860 + target = <&i2c1>;
5861 + __overlay__ {
5862 + #address-cells = <1>;
5863 + #size-cells = <0>;
5864 + status = "okay";
5865 +
5866 + gt9271: gt9271@14 {
5867 + compatible = "goodix,gt9271";
5868 + reg = <0x14>;
5869 + pinctrl-names = "default";
5870 + pinctrl-0 = <&goodix_pins>;
5871 + interrupt-parent = <&gpio>;
5872 + interrupts = <4 2>; // high-to-low edge triggered
5873 + irq-gpios = <&gpio 4 0>; // Pin7 on GPIO header
5874 + reset-gpios = <&gpio 17 0>; // Pin11 on GPIO header
5875 + };
5876 + };
5877 + };
5878 +
5879 + __overrides__ {
5880 + interrupt = <&goodix_pins>,"brcm,pins:0",
5881 + <&gt9271>,"interrupts:0",
5882 + <&gt9271>,"irq-gpios:4";
5883 + reset = <&goodix_pins>,"brcm,pins:4",
5884 + <&gt9271>,"reset-gpios:4";
5885 + };
5886 +};
5887 --- /dev/null
5888 +++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
5889 @@ -0,0 +1,49 @@
5890 +// Definitions for Google voiceHAT v1 soundcard overlay
5891 +/dts-v1/;
5892 +/plugin/;
5893 +
5894 +/ {
5895 + compatible = "brcm,bcm2708";
5896 +
5897 + fragment@0 {
5898 + target = <&i2s>;
5899 + __overlay__ {
5900 + status = "okay";
5901 + };
5902 + };
5903 +
5904 + fragment@1 {
5905 + target = <&gpio>;
5906 + __overlay__ {
5907 + googlevoicehat_pins: googlevoicehat_pins {
5908 + brcm,pins = <16>;
5909 + brcm,function = <1>; /* out */
5910 + brcm,pull = <0>; /* up */
5911 + };
5912 + };
5913 + };
5914 +
5915 +
5916 + fragment@2 {
5917 + target-path = "/";
5918 + __overlay__ {
5919 + voicehat-codec {
5920 + #sound-dai-cells = <0>;
5921 + compatible = "google,voicehat";
5922 + pinctrl-names = "default";
5923 + pinctrl-0 = <&googlevoicehat_pins>;
5924 + sdmode-gpios= <&gpio 16 0>;
5925 + status = "okay";
5926 + };
5927 + };
5928 + };
5929 +
5930 + fragment@3 {
5931 + target = <&sound>;
5932 + __overlay__ {
5933 + compatible = "googlevoicehat,googlevoicehat-soundcard";
5934 + i2s-controller = <&i2s>;
5935 + status = "okay";
5936 + };
5937 + };
5938 +};
5939 --- /dev/null
5940 +++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
5941 @@ -0,0 +1,48 @@
5942 +// Definitions for ir-gpio module
5943 +/dts-v1/;
5944 +/plugin/;
5945 +
5946 +/ {
5947 + compatible = "brcm,bcm2708";
5948 +
5949 + fragment@0 {
5950 + target-path = "/";
5951 + __overlay__ {
5952 + gpio_ir: ir-receiver@12 {
5953 + compatible = "gpio-ir-receiver";
5954 + pinctrl-names = "default";
5955 + pinctrl-0 = <&gpio_ir_pins>;
5956 +
5957 + // pin number, high or low
5958 + gpios = <&gpio 18 1>;
5959 +
5960 + // parameter for keymap name
5961 + linux,rc-map-name = "rc-rc6-mce";
5962 +
5963 + status = "okay";
5964 + };
5965 + };
5966 + };
5967 +
5968 + fragment@1 {
5969 + target = <&gpio>;
5970 + __overlay__ {
5971 + gpio_ir_pins: gpio_ir_pins@12 {
5972 + brcm,pins = <18>; // pin 18
5973 + brcm,function = <0>; // in
5974 + brcm,pull = <1>; // down
5975 + };
5976 + };
5977 + };
5978 +
5979 + __overrides__ {
5980 + // parameters
5981 + gpio_pin = <&gpio_ir>,"gpios:4", // pin number
5982 + <&gpio_ir>,"reg:0",
5983 + <&gpio_ir_pins>,"brcm,pins:0",
5984 + <&gpio_ir_pins>,"reg:0";
5985 + gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
5986 +
5987 + rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
5988 + };
5989 +};
5990 --- /dev/null
5991 +++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
5992 @@ -0,0 +1,36 @@
5993 +/dts-v1/;
5994 +/plugin/;
5995 +
5996 +/ {
5997 + compatible = "brcm,bcm2708";
5998 +
5999 + fragment@0 {
6000 + target = <&gpio>;
6001 + __overlay__ {
6002 + gpio_ir_tx_pins: gpio_ir_tx_pins@12 {
6003 + brcm,pins = <18>;
6004 + brcm,function = <1>; // out
6005 + };
6006 + };
6007 + };
6008 +
6009 + fragment@1 {
6010 + target-path = "/";
6011 + __overlay__ {
6012 + gpio_ir_tx: gpio-ir-transmitter@12 {
6013 + compatible = "gpio-ir-tx";
6014 + pinctrl-names = "default";
6015 + pinctrl-0 = <&gpio_ir_tx_pins>;
6016 + gpios = <&gpio 18 0>;
6017 + };
6018 + };
6019 + };
6020 +
6021 + __overrides__ {
6022 + gpio_pin = <&gpio_ir_tx>, "gpios:4", // pin number
6023 + <&gpio_ir_tx>, "reg:0",
6024 + <&gpio_ir_tx_pins>, "brcm,pins:0",
6025 + <&gpio_ir_tx_pins>, "reg:0";
6026 + invert = <&gpio_ir_tx>, "gpios:8"; // 1 = active low
6027 + };
6028 +};
6029 --- /dev/null
6030 +++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
6031 @@ -0,0 +1,48 @@
6032 +// Definitions for gpio-key module
6033 +/dts-v1/;
6034 +/plugin/;
6035 +
6036 +/ {
6037 + compatible = "brcm,bcm2708";
6038 +
6039 + fragment@0 {
6040 + // Configure the gpio pin controller
6041 + target = <&gpio>;
6042 + __overlay__ {
6043 + pin_state: button_pins@0 {
6044 + brcm,pins = <3>; // gpio number
6045 + brcm,function = <0>; // 0 = input, 1 = output
6046 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
6047 + };
6048 + };
6049 + };
6050 + fragment@1 {
6051 + target-path = "/";
6052 + __overlay__ {
6053 + button: button@0 {
6054 + compatible = "gpio-keys";
6055 + pinctrl-names = "default";
6056 + pinctrl-0 = <&pin_state>;
6057 + status = "okay";
6058 +
6059 + key: key {
6060 + linux,code = <116>;
6061 + gpios = <&gpio 3 1>;
6062 + label = "KEY_POWER";
6063 + };
6064 + };
6065 + };
6066 + };
6067 +
6068 + __overrides__ {
6069 + gpio = <&key>,"gpios:4",
6070 + <&button>,"reg:0",
6071 + <&pin_state>,"brcm,pins:0",
6072 + <&pin_state>,"reg:0";
6073 + label = <&key>,"label";
6074 + keycode = <&key>,"linux,code:0";
6075 + gpio_pull = <&pin_state>,"brcm,pull:0";
6076 + active_low = <&key>,"gpios:8";
6077 + };
6078 +
6079 +};
6080 --- /dev/null
6081 +++ b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
6082 @@ -0,0 +1,14 @@
6083 +/dts-v1/;
6084 +/plugin/;
6085 +
6086 +/ {
6087 + compatible = "brcm,bcm2835";
6088 +
6089 + fragment@0 {
6090 + // Configure the gpio pin controller
6091 + target = <&gpio>;
6092 + __overlay__ {
6093 + interrupts;
6094 + };
6095 + };
6096 +};
6097 --- /dev/null
6098 +++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
6099 @@ -0,0 +1,36 @@
6100 +// Definitions for gpio-poweroff module
6101 +/dts-v1/;
6102 +/plugin/;
6103 +
6104 +/ {
6105 + compatible = "brcm,bcm2708";
6106 +
6107 + fragment@0 {
6108 + target-path = "/";
6109 + __overlay__ {
6110 + power_ctrl: power_ctrl {
6111 + compatible = "gpio-poweroff";
6112 + gpios = <&gpio 26 0>;
6113 + force;
6114 + };
6115 + };
6116 + };
6117 +
6118 + fragment@1 {
6119 + target = <&gpio>;
6120 + __overlay__ {
6121 + power_ctrl_pins: power_ctrl_pins {
6122 + brcm,pins = <26>;
6123 + brcm,function = <1>; // out
6124 + };
6125 + };
6126 + };
6127 +
6128 + __overrides__ {
6129 + gpiopin = <&power_ctrl>,"gpios:4",
6130 + <&power_ctrl_pins>,"brcm,pins:0";
6131 + active_low = <&power_ctrl>,"gpios:8";
6132 + input = <&power_ctrl>,"input?";
6133 + export = <&power_ctrl>,"export?";
6134 + };
6135 +};
6136 --- /dev/null
6137 +++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
6138 @@ -0,0 +1,80 @@
6139 +// Definitions for gpio-poweroff module
6140 +/dts-v1/;
6141 +/plugin/;
6142 +
6143 +// This overlay sets up an input device that generates KEY_POWER events
6144 +// when a given GPIO pin changes. It defaults to using GPIO3, which can
6145 +// also be used to wake up (start) the Rpi again after shutdown. Since
6146 +// wakeup is active-low, this defaults to active-low with a pullup
6147 +// enabled, but all of this can be changed using overlay parameters (but
6148 +// note that GPIO3 has an external pullup on at least some boards).
6149 +
6150 +/ {
6151 + compatible = "brcm,bcm2708";
6152 +
6153 + fragment@0 {
6154 + // Configure the gpio pin controller
6155 + target = <&gpio>;
6156 + __overlay__ {
6157 + // Define a pinctrl state, that sets up the gpio
6158 + // as an input with a pullup enabled. This does
6159 + // not take effect by itself, only when referenced
6160 + // by a "pinctrl client", as is done below. See:
6161 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
6162 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
6163 + pin_state: shutdown_button_pins {
6164 + brcm,pins = <3>; // gpio number
6165 + brcm,function = <0>; // 0 = input, 1 = output
6166 + brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
6167 + };
6168 + };
6169 + };
6170 + fragment@1 {
6171 + // Add a new device to the /soc devicetree node
6172 + target-path = "/soc";
6173 + __overlay__ {
6174 + shutdown_button {
6175 + // Let the gpio-keys driver handle this device. See:
6176 + // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt
6177 + compatible = "gpio-keys";
6178 +
6179 + // Declare a single pinctrl state (referencing the one declared above) and name it
6180 + // default, so it is activated automatically.
6181 + pinctrl-names = "default";
6182 + pinctrl-0 = <&pin_state>;
6183 +
6184 + // Enable this device
6185 + status = "okay";
6186 +
6187 + // Define a single key, called "shutdown" that monitors the gpio and sends KEY_POWER
6188 + // (keycode 116, see
6189 + // https://github.com/torvalds/linux/blob/v4.12/include/uapi/linux/input-event-codes.h#L190)
6190 + button: shutdown {
6191 + label = "shutdown";
6192 + linux,code = <116>; // KEY_POWER
6193 + gpios = <&gpio 3 1>;
6194 + };
6195 + };
6196 + };
6197 + };
6198 +
6199 + // This defines parameters that can be specified when loading
6200 + // the overlay. Each foo = line specifies one parameter, named
6201 + // foo. The rest of the specification gives properties where the
6202 + // parameter value is inserted into (changing the values above
6203 + // or adding new ones).
6204 + __overrides__ {
6205 + // Allow overriding the GPIO number.
6206 + gpio_pin = <&button>,"gpios:4",
6207 + <&pin_state>,"brcm,pins:0";
6208 +
6209 + // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup
6210 + // Note that GPIO3 and GPIO2 are the I2c pins and have an external pullup (at least
6211 + // on some boards).
6212 + gpio_pull = <&pin_state>,"brcm,pull:0";
6213 +
6214 + // Allow setting the active_low flag. 0 = active high, 1 = active low
6215 + active_low = <&button>,"gpios:8";
6216 + };
6217 +
6218 +};
6219 --- /dev/null
6220 +++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
6221 @@ -0,0 +1,39 @@
6222 +// Definitions for HiFiBerry Amp/Amp+
6223 +/dts-v1/;
6224 +/plugin/;
6225 +
6226 +/ {
6227 + compatible = "brcm,bcm2708";
6228 +
6229 + fragment@0 {
6230 + target = <&i2s>;
6231 + __overlay__ {
6232 + status = "okay";
6233 + };
6234 + };
6235 +
6236 + fragment@1 {
6237 + target = <&i2c1>;
6238 + __overlay__ {
6239 + #address-cells = <1>;
6240 + #size-cells = <0>;
6241 + status = "okay";
6242 +
6243 + tas5713@1b {
6244 + #sound-dai-cells = <0>;
6245 + compatible = "ti,tas5713";
6246 + reg = <0x1b>;
6247 + status = "okay";
6248 + };
6249 + };
6250 + };
6251 +
6252 + fragment@2 {
6253 + target = <&sound>;
6254 + __overlay__ {
6255 + compatible = "hifiberry,hifiberry-amp";
6256 + i2s-controller = <&i2s>;
6257 + status = "okay";
6258 + };
6259 + };
6260 +};
6261 --- /dev/null
6262 +++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
6263 @@ -0,0 +1,34 @@
6264 +// Definitions for HiFiBerry DAC
6265 +/dts-v1/;
6266 +/plugin/;
6267 +
6268 +/ {
6269 + compatible = "brcm,bcm2708";
6270 +
6271 + fragment@0 {
6272 + target = <&i2s>;
6273 + __overlay__ {
6274 + status = "okay";
6275 + };
6276 + };
6277 +
6278 + fragment@1 {
6279 + target-path = "/";
6280 + __overlay__ {
6281 + pcm5102a-codec {
6282 + #sound-dai-cells = <0>;
6283 + compatible = "ti,pcm5102a";
6284 + status = "okay";
6285 + };
6286 + };
6287 + };
6288 +
6289 + fragment@2 {
6290 + target = <&sound>;
6291 + __overlay__ {
6292 + compatible = "hifiberry,hifiberry-dac";
6293 + i2s-controller = <&i2s>;
6294 + status = "okay";
6295 + };
6296 + };
6297 +};
6298 --- /dev/null
6299 +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
6300 @@ -0,0 +1,59 @@
6301 +// Definitions for HiFiBerry DAC+
6302 +/dts-v1/;
6303 +/plugin/;
6304 +
6305 +/ {
6306 + compatible = "brcm,bcm2708";
6307 +
6308 + fragment@0 {
6309 + target-path = "/clocks";
6310 + __overlay__ {
6311 + dacpro_osc: dacpro_osc {
6312 + compatible = "hifiberry,dacpro-clk";
6313 + #clock-cells = <0>;
6314 + };
6315 + };
6316 + };
6317 +
6318 + fragment@1 {
6319 + target = <&i2s>;
6320 + __overlay__ {
6321 + status = "okay";
6322 + };
6323 + };
6324 +
6325 + fragment@2 {
6326 + target = <&i2c1>;
6327 + __overlay__ {
6328 + #address-cells = <1>;
6329 + #size-cells = <0>;
6330 + status = "okay";
6331 +
6332 + pcm5122@4d {
6333 + #sound-dai-cells = <0>;
6334 + compatible = "ti,pcm5122";
6335 + reg = <0x4d>;
6336 + clocks = <&dacpro_osc>;
6337 + AVDD-supply = <&vdd_3v3_reg>;
6338 + DVDD-supply = <&vdd_3v3_reg>;
6339 + CPVDD-supply = <&vdd_3v3_reg>;
6340 + status = "okay";
6341 + };
6342 + };
6343 + };
6344 +
6345 + fragment@3 {
6346 + target = <&sound>;
6347 + hifiberry_dacplus: __overlay__ {
6348 + compatible = "hifiberry,hifiberry-dacplus";
6349 + i2s-controller = <&i2s>;
6350 + status = "okay";
6351 + };
6352 + };
6353 +
6354 + __overrides__ {
6355 + 24db_digital_gain =
6356 + <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
6357 + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
6358 + };
6359 +};
6360 --- /dev/null
6361 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
6362 @@ -0,0 +1,41 @@
6363 +// Definitions for HiFiBerry Digi
6364 +/dts-v1/;
6365 +/plugin/;
6366 +
6367 +/ {
6368 + compatible = "brcm,bcm2708";
6369 +
6370 + fragment@0 {
6371 + target = <&i2s>;
6372 + __overlay__ {
6373 + status = "okay";
6374 + };
6375 + };
6376 +
6377 + fragment@1 {
6378 + target = <&i2c1>;
6379 + __overlay__ {
6380 + #address-cells = <1>;
6381 + #size-cells = <0>;
6382 + status = "okay";
6383 +
6384 + wm8804@3b {
6385 + #sound-dai-cells = <0>;
6386 + compatible = "wlf,wm8804";
6387 + reg = <0x3b>;
6388 + PVDD-supply = <&vdd_3v3_reg>;
6389 + DVDD-supply = <&vdd_3v3_reg>;
6390 + status = "okay";
6391 + };
6392 + };
6393 + };
6394 +
6395 + fragment@2 {
6396 + target = <&sound>;
6397 + __overlay__ {
6398 + compatible = "hifiberry,hifiberry-digi";
6399 + i2s-controller = <&i2s>;
6400 + status = "okay";
6401 + };
6402 + };
6403 +};
6404 --- /dev/null
6405 +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
6406 @@ -0,0 +1,43 @@
6407 +// Definitions for HiFiBerry Digi Pro
6408 +/dts-v1/;
6409 +/plugin/;
6410 +
6411 +/ {
6412 + compatible = "brcm,bcm2708";
6413 +
6414 + fragment@0 {
6415 + target = <&i2s>;
6416 + __overlay__ {
6417 + status = "okay";
6418 + };
6419 + };
6420 +
6421 + fragment@1 {
6422 + target = <&i2c1>;
6423 + __overlay__ {
6424 + #address-cells = <1>;
6425 + #size-cells = <0>;
6426 + status = "okay";
6427 +
6428 + wm8804@3b {
6429 + #sound-dai-cells = <0>;
6430 + compatible = "wlf,wm8804";
6431 + reg = <0x3b>;
6432 + PVDD-supply = <&vdd_3v3_reg>;
6433 + DVDD-supply = <&vdd_3v3_reg>;
6434 + status = "okay";
6435 + };
6436 + };
6437 + };
6438 +
6439 + fragment@2 {
6440 + target = <&sound>;
6441 + __overlay__ {
6442 + compatible = "hifiberry,hifiberry-digi";
6443 + i2s-controller = <&i2s>;
6444 + status = "okay";
6445 + clock44-gpio = <&gpio 5 0>;
6446 + clock48-gpio = <&gpio 6 0>;
6447 + };
6448 + };
6449 +};
6450 --- /dev/null
6451 +++ b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
6452 @@ -0,0 +1,93 @@
6453 +/*
6454 + * Device Tree overlay for HY28A display
6455 + *
6456 + */
6457 +
6458 +/dts-v1/;
6459 +/plugin/;
6460 +
6461 +/ {
6462 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
6463 +
6464 + fragment@0 {
6465 + target = <&spi0>;
6466 + __overlay__ {
6467 + status = "okay";
6468 + };
6469 + };
6470 +
6471 + fragment@1 {
6472 + target = <&spidev0>;
6473 + __overlay__ {
6474 + status = "disabled";
6475 + };
6476 + };
6477 +
6478 + fragment@2 {
6479 + target = <&spidev1>;
6480 + __overlay__ {
6481 + status = "disabled";
6482 + };
6483 + };
6484 +
6485 + fragment@3 {
6486 + target = <&gpio>;
6487 + __overlay__ {
6488 + hy28a_pins: hy28a_pins {
6489 + brcm,pins = <17 25 18>;
6490 + brcm,function = <0 1 1>; /* in out out */
6491 + };
6492 + };
6493 + };
6494 +
6495 + fragment@4 {
6496 + target = <&spi0>;
6497 + __overlay__ {
6498 + /* needed to avoid dtc warning */
6499 + #address-cells = <1>;
6500 + #size-cells = <0>;
6501 +
6502 + hy28a: hy28a@0{
6503 + compatible = "ilitek,ili9320";
6504 + reg = <0>;
6505 + pinctrl-names = "default";
6506 + pinctrl-0 = <&hy28a_pins>;
6507 +
6508 + spi-max-frequency = <32000000>;
6509 + spi-cpol;
6510 + spi-cpha;
6511 + rotate = <270>;
6512 + bgr;
6513 + fps = <50>;
6514 + buswidth = <8>;
6515 + startbyte = <0x70>;
6516 + reset-gpios = <&gpio 25 0>;
6517 + led-gpios = <&gpio 18 1>;
6518 + debug = <0>;
6519 + };
6520 +
6521 + hy28a_ts: hy28a-ts@1 {
6522 + compatible = "ti,ads7846";
6523 + reg = <1>;
6524 +
6525 + spi-max-frequency = <2000000>;
6526 + interrupts = <17 2>; /* high-to-low edge triggered */
6527 + interrupt-parent = <&gpio>;
6528 + pendown-gpio = <&gpio 17 0>;
6529 + ti,x-plate-ohms = /bits/ 16 <100>;
6530 + ti,pressure-max = /bits/ 16 <255>;
6531 + };
6532 + };
6533 + };
6534 + __overrides__ {
6535 + speed = <&hy28a>,"spi-max-frequency:0";
6536 + rotate = <&hy28a>,"rotate:0";
6537 + fps = <&hy28a>,"fps:0";
6538 + debug = <&hy28a>,"debug:0";
6539 + xohms = <&hy28a_ts>,"ti,x-plate-ohms;0";
6540 + resetgpio = <&hy28a>,"reset-gpios:4",
6541 + <&hy28a_pins>, "brcm,pins:4";
6542 + ledgpio = <&hy28a>,"led-gpios:4",
6543 + <&hy28a_pins>, "brcm,pins:8";
6544 + };
6545 +};
6546 --- /dev/null
6547 +++ b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
6548 @@ -0,0 +1,148 @@
6549 +/*
6550 + * Device Tree overlay for HY28b display shield by Texy
6551 + *
6552 + */
6553 +
6554 +/dts-v1/;
6555 +/plugin/;
6556 +
6557 +/ {
6558 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
6559 +
6560 + fragment@0 {
6561 + target = <&spi0>;
6562 + __overlay__ {
6563 + status = "okay";
6564 + };
6565 + };
6566 +
6567 + fragment@1 {
6568 + target = <&spidev0>;
6569 + __overlay__ {
6570 + status = "disabled";
6571 + };
6572 + };
6573 +
6574 + fragment@2 {
6575 + target = <&spidev1>;
6576 + __overlay__ {
6577 + status = "disabled";
6578 + };
6579 + };
6580 +
6581 + fragment@3 {
6582 + target = <&gpio>;
6583 + __overlay__ {
6584 + hy28b_pins: hy28b_pins {
6585 + brcm,pins = <17 25 18>;
6586 + brcm,function = <0 1 1>; /* in out out */
6587 + };
6588 + };
6589 + };
6590 +
6591 + fragment@4 {
6592 + target = <&spi0>;
6593 + __overlay__ {
6594 + /* needed to avoid dtc warning */
6595 + #address-cells = <1>;
6596 + #size-cells = <0>;
6597 +
6598 + hy28b: hy28b@0{
6599 + compatible = "ilitek,ili9325";
6600 + reg = <0>;
6601 + pinctrl-names = "default";
6602 + pinctrl-0 = <&hy28b_pins>;
6603 +
6604 + spi-max-frequency = <48000000>;
6605 + spi-cpol;
6606 + spi-cpha;
6607 + rotate = <270>;
6608 + bgr;
6609 + fps = <50>;
6610 + buswidth = <8>;
6611 + startbyte = <0x70>;
6612 + reset-gpios = <&gpio 25 0>;
6613 + led-gpios = <&gpio 18 1>;
6614 +
6615 + gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
6616 +
6617 + init = <0x10000e7 0x0010
6618 + 0x1000000 0x0001
6619 + 0x1000001 0x0100
6620 + 0x1000002 0x0700
6621 + 0x1000003 0x1030
6622 + 0x1000004 0x0000
6623 + 0x1000008 0x0207
6624 + 0x1000009 0x0000
6625 + 0x100000a 0x0000
6626 + 0x100000c 0x0001
6627 + 0x100000d 0x0000
6628 + 0x100000f 0x0000
6629 + 0x1000010 0x0000
6630 + 0x1000011 0x0007
6631 + 0x1000012 0x0000
6632 + 0x1000013 0x0000
6633 + 0x2000032
6634 + 0x1000010 0x1590
6635 + 0x1000011 0x0227
6636 + 0x2000032
6637 + 0x1000012 0x009c
6638 + 0x2000032
6639 + 0x1000013 0x1900
6640 + 0x1000029 0x0023
6641 + 0x100002b 0x000e
6642 + 0x2000032
6643 + 0x1000020 0x0000
6644 + 0x1000021 0x0000
6645 + 0x2000032
6646 + 0x1000050 0x0000
6647 + 0x1000051 0x00ef
6648 + 0x1000052 0x0000
6649 + 0x1000053 0x013f
6650 + 0x1000060 0xa700
6651 + 0x1000061 0x0001
6652 + 0x100006a 0x0000
6653 + 0x1000080 0x0000
6654 + 0x1000081 0x0000
6655 + 0x1000082 0x0000
6656 + 0x1000083 0x0000
6657 + 0x1000084 0x0000
6658 + 0x1000085 0x0000
6659 + 0x1000090 0x0010
6660 + 0x1000092 0x0000
6661 + 0x1000093 0x0003
6662 + 0x1000095 0x0110
6663 + 0x1000097 0x0000
6664 + 0x1000098 0x0000
6665 + 0x1000007 0x0133
6666 + 0x1000020 0x0000
6667 + 0x1000021 0x0000
6668 + 0x2000064>;
6669 + debug = <0>;
6670 + };
6671 +
6672 + hy28b_ts: hy28b-ts@1 {
6673 + compatible = "ti,ads7846";
6674 + reg = <1>;
6675 +
6676 + spi-max-frequency = <2000000>;
6677 + interrupts = <17 2>; /* high-to-low edge triggered */
6678 + interrupt-parent = <&gpio>;
6679 + pendown-gpio = <&gpio 17 0>;
6680 + ti,x-plate-ohms = /bits/ 16 <100>;
6681 + ti,pressure-max = /bits/ 16 <255>;
6682 + };
6683 + };
6684 + };
6685 + __overrides__ {
6686 + speed = <&hy28b>,"spi-max-frequency:0";
6687 + rotate = <&hy28b>,"rotate:0";
6688 + fps = <&hy28b>,"fps:0";
6689 + debug = <&hy28b>,"debug:0";
6690 + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
6691 + resetgpio = <&hy28b>,"reset-gpios:4",
6692 + <&hy28b_pins>, "brcm,pins:4";
6693 + ledgpio = <&hy28b>,"led-gpios:4",
6694 + <&hy28b_pins>, "brcm,pins:8";
6695 + };
6696 +};
6697 --- /dev/null
6698 +++ b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
6699 @@ -0,0 +1,13 @@
6700 +/dts-v1/;
6701 +/plugin/;
6702 +
6703 +/{
6704 + compatible = "brcm,bcm2708";
6705 +
6706 + fragment@0 {
6707 + target = <&i2c_arm>;
6708 + __overlay__ {
6709 + compatible = "brcm,bcm2708-i2c";
6710 + };
6711 + };
6712 +};
6713 --- /dev/null
6714 +++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
6715 @@ -0,0 +1,43 @@
6716 +// Overlay for i2c_gpio bitbanging host bus.
6717 +/dts-v1/;
6718 +/plugin/;
6719 +
6720 +/ {
6721 + compatible = "brcm,bcm2708";
6722 +
6723 + fragment@0 {
6724 + target-path = "/";
6725 + __overlay__ {
6726 + i2c_gpio: i2c@0 {
6727 + compatible = "i2c-gpio";
6728 + gpios = <&gpio 23 0 /* sda */
6729 + &gpio 24 0 /* scl */
6730 + >;
6731 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
6732 + #address-cells = <1>;
6733 + #size-cells = <0>;
6734 + };
6735 + };
6736 + };
6737 +
6738 + fragment@1 {
6739 + target-path = "/aliases";
6740 + __overlay__ {
6741 + i2c_gpio = "/i2c@0";
6742 + };
6743 + };
6744 +
6745 + fragment@2 {
6746 + target-path = "/__symbols__";
6747 + __overlay__ {
6748 + i2c_gpio = "/i2c@0";
6749 + };
6750 + };
6751 +
6752 + __overrides__ {
6753 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
6754 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
6755 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
6756 + bus = <&i2c_gpio>, "reg:0";
6757 + };
6758 +};
6759 --- /dev/null
6760 +++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
6761 @@ -0,0 +1,139 @@
6762 +// Umbrella I2C Mux overlay
6763 +
6764 +/dts-v1/;
6765 +/plugin/;
6766 +
6767 +/{
6768 + compatible = "brcm,bcm2708";
6769 +
6770 + fragment@0 {
6771 + target = <&i2c_arm>;
6772 + __dormant__ {
6773 + #address-cells = <1>;
6774 + #size-cells = <0>;
6775 + status = "okay";
6776 +
6777 + pca9542: mux@70 {
6778 + compatible = "nxp,pca9542";
6779 + reg = <0x70>;
6780 + #address-cells = <1>;
6781 + #size-cells = <0>;
6782 +
6783 + i2c@0 {
6784 + #address-cells = <1>;
6785 + #size-cells = <0>;
6786 + reg = <0>;
6787 + };
6788 + i2c@1 {
6789 + #address-cells = <1>;
6790 + #size-cells = <0>;
6791 + reg = <1>;
6792 + };
6793 + };
6794 + };
6795 + };
6796 +
6797 + fragment@1 {
6798 + target = <&i2c_arm>;
6799 + __dormant__ {
6800 + #address-cells = <1>;
6801 + #size-cells = <0>;
6802 + status = "okay";
6803 +
6804 + pca9545: mux@70 {
6805 + compatible = "nxp,pca9545";
6806 + reg = <0x70>;
6807 + #address-cells = <1>;
6808 + #size-cells = <0>;
6809 +
6810 + i2c@0 {
6811 + #address-cells = <1>;
6812 + #size-cells = <0>;
6813 + reg = <0>;
6814 + };
6815 + i2c@1 {
6816 + #address-cells = <1>;
6817 + #size-cells = <0>;
6818 + reg = <1>;
6819 + };
6820 + i2c@2 {
6821 + #address-cells = <1>;
6822 + #size-cells = <0>;
6823 + reg = <2>;
6824 + };
6825 + i2c@3 {
6826 + #address-cells = <1>;
6827 + #size-cells = <0>;
6828 + reg = <3>;
6829 + };
6830 + };
6831 + };
6832 + };
6833 +
6834 + fragment@2 {
6835 + target = <&i2c_arm>;
6836 + __dormant__ {
6837 + #address-cells = <1>;
6838 + #size-cells = <0>;
6839 + status = "okay";
6840 +
6841 + pca9548: mux@70 {
6842 + compatible = "nxp,pca9548";
6843 + reg = <0x70>;
6844 + #address-cells = <1>;
6845 + #size-cells = <0>;
6846 +
6847 + i2c@0 {
6848 + #address-cells = <1>;
6849 + #size-cells = <0>;
6850 + reg = <0>;
6851 + };
6852 + i2c@1 {
6853 + #address-cells = <1>;
6854 + #size-cells = <0>;
6855 + reg = <1>;
6856 + };
6857 + i2c@2 {
6858 + #address-cells = <1>;
6859 + #size-cells = <0>;
6860 + reg = <2>;
6861 + };
6862 + i2c@3 {
6863 + #address-cells = <1>;
6864 + #size-cells = <0>;
6865 + reg = <3>;
6866 + };
6867 + i2c@4 {
6868 + #address-cells = <1>;
6869 + #size-cells = <0>;
6870 + reg = <4>;
6871 + };
6872 + i2c@5 {
6873 + #address-cells = <1>;
6874 + #size-cells = <0>;
6875 + reg = <5>;
6876 + };
6877 + i2c@6 {
6878 + #address-cells = <1>;
6879 + #size-cells = <0>;
6880 + reg = <6>;
6881 + };
6882 + i2c@7 {
6883 + #address-cells = <1>;
6884 + #size-cells = <0>;
6885 + reg = <7>;
6886 + };
6887 + };
6888 + };
6889 + };
6890 +
6891 + __overrides__ {
6892 + pca9542 = <0>, "+0";
6893 + pca9545 = <0>, "+1";
6894 + pca9548 = <0>, "+2";
6895 +
6896 + addr = <&pca9542>,"reg:0",
6897 + <&pca9545>,"reg:0",
6898 + <&pca9548>,"reg:0";
6899 + };
6900 +};
6901 --- /dev/null
6902 +++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
6903 @@ -0,0 +1,26 @@
6904 +// Definitions for NXP PCA9685A I2C PWM controller on ARM I2C bus.
6905 +/dts-v1/;
6906 +/plugin/;
6907 +
6908 +/{
6909 + compatible = "brcm,bcm2708";
6910 +
6911 + fragment@0 {
6912 + target = <&i2c_arm>;
6913 + __overlay__ {
6914 + #address-cells = <1>;
6915 + #size-cells = <0>;
6916 + status = "okay";
6917 +
6918 + pca: pca@40 {
6919 + compatible = "nxp,pca9685";
6920 + #pwm-cells = <2>;
6921 + reg = <0x40>;
6922 + status = "okay";
6923 + };
6924 + };
6925 + };
6926 + __overrides__ {
6927 + addr = <&pca>,"reg:0";
6928 + };
6929 +};
6930 --- /dev/null
6931 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
6932 @@ -0,0 +1,183 @@
6933 +// Definitions for several I2C based Real Time Clocks
6934 +// Available through i2c-gpio
6935 +/dts-v1/;
6936 +/plugin/;
6937 +
6938 +/ {
6939 + compatible = "brcm,bcm2708";
6940 +
6941 + fragment@0 {
6942 + target-path = "/";
6943 + __overlay__ {
6944 + i2c_gpio: i2c-gpio-rtc@0 {
6945 + compatible = "i2c-gpio";
6946 + gpios = <&gpio 23 0 /* sda */
6947 + &gpio 24 0 /* scl */
6948 + >;
6949 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
6950 + #address-cells = <1>;
6951 + #size-cells = <0>;
6952 + };
6953 + };
6954 + };
6955 +
6956 + fragment@1 {
6957 + target = <&i2c_gpio>;
6958 + __dormant__ {
6959 + #address-cells = <1>;
6960 + #size-cells = <0>;
6961 + status = "okay";
6962 +
6963 + abx80x: abx80x@69 {
6964 + compatible = "abracon,abx80x";
6965 + reg = <0x69>;
6966 + abracon,tc-diode = "standard";
6967 + abracon,tc-resistor = <0>;
6968 + status = "okay";
6969 + };
6970 + };
6971 + };
6972 +
6973 + fragment@2 {
6974 + target = <&i2c_gpio>;
6975 + __dormant__ {
6976 + #address-cells = <1>;
6977 + #size-cells = <0>;
6978 + status = "okay";
6979 +
6980 + ds1307: ds1307@68 {
6981 + compatible = "maxim,ds1307";
6982 + reg = <0x68>;
6983 + status = "okay";
6984 + };
6985 + };
6986 + };
6987 +
6988 + fragment@3 {
6989 + target = <&i2c_gpio>;
6990 + __dormant__ {
6991 + #address-cells = <1>;
6992 + #size-cells = <0>;
6993 + status = "okay";
6994 +
6995 + ds1339: ds1339@68 {
6996 + compatible = "dallas,ds1339";
6997 + trickle-resistor-ohms = <0>;
6998 + reg = <0x68>;
6999 + status = "okay";
7000 + };
7001 + };
7002 + };
7003 +
7004 + fragment@4 {
7005 + target = <&i2c_gpio>;
7006 + __dormant__ {
7007 + #address-cells = <1>;
7008 + #size-cells = <0>;
7009 + status = "okay";
7010 +
7011 + ds3231: ds3231@68 {
7012 + compatible = "maxim,ds3231";
7013 + reg = <0x68>;
7014 + status = "okay";
7015 + };
7016 + };
7017 + };
7018 +
7019 + fragment@5 {
7020 + target = <&i2c_gpio>;
7021 + __dormant__ {
7022 + #address-cells = <1>;
7023 + #size-cells = <0>;
7024 + status = "okay";
7025 +
7026 + mcp7940x: mcp7940x@6f {
7027 + compatible = "microchip,mcp7940x";
7028 + reg = <0x6f>;
7029 + status = "okay";
7030 + };
7031 + };
7032 + };
7033 +
7034 + fragment@6 {
7035 + target = <&i2c_gpio>;
7036 + __dormant__ {
7037 + #address-cells = <1>;
7038 + #size-cells = <0>;
7039 + status = "okay";
7040 +
7041 + mcp7941x: mcp7941x@6f {
7042 + compatible = "microchip,mcp7941x";
7043 + reg = <0x6f>;
7044 + status = "okay";
7045 + };
7046 + };
7047 + };
7048 +
7049 + fragment@7 {
7050 + target = <&i2c_gpio>;
7051 + __dormant__ {
7052 + #address-cells = <1>;
7053 + #size-cells = <0>;
7054 + status = "okay";
7055 +
7056 + pcf2127: pcf2127@51 {
7057 + compatible = "nxp,pcf2127";
7058 + reg = <0x51>;
7059 + status = "okay";
7060 + };
7061 + };
7062 + };
7063 +
7064 + fragment@8 {
7065 + target = <&i2c_gpio>;
7066 + __dormant__ {
7067 + #address-cells = <1>;
7068 + #size-cells = <0>;
7069 + status = "okay";
7070 +
7071 + pcf8523: pcf8523@68 {
7072 + compatible = "nxp,pcf8523";
7073 + reg = <0x68>;
7074 + status = "okay";
7075 + };
7076 + };
7077 + };
7078 +
7079 + fragment@9 {
7080 + target = <&i2c_gpio>;
7081 + __dormant__ {
7082 + #address-cells = <1>;
7083 + #size-cells = <0>;
7084 + status = "okay";
7085 +
7086 + pcf8563: pcf8563@51 {
7087 + compatible = "nxp,pcf8563";
7088 + reg = <0x51>;
7089 + status = "okay";
7090 + };
7091 + };
7092 + };
7093 +
7094 + __overrides__ {
7095 + abx80x = <0>,"+1";
7096 + ds1307 = <0>,"+2";
7097 + ds1339 = <0>,"+3";
7098 + ds3231 = <0>,"+4";
7099 + mcp7940x = <0>,"+5";
7100 + mcp7941x = <0>,"+6";
7101 + pcf2127 = <0>,"+7";
7102 + pcf8523 = <0>,"+8";
7103 + pcf8563 = <0>,"+9";
7104 + trickle-diode-type = <&abx80x>,"abracon,tc-diode";
7105 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
7106 + <&abx80x>,"abracon,tc-resistor";
7107 + wakeup-source = <&ds1339>,"wakeup-source?",
7108 + <&ds3231>,"wakeup-source?",
7109 + <&mcp7940x>,"wakeup-source?",
7110 + <&mcp7941x>,"wakeup-source?";
7111 + i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
7112 + i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
7113 + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
7114 + };
7115 +};
7116 --- /dev/null
7117 +++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
7118 @@ -0,0 +1,181 @@
7119 +// Definitions for several I2C based Real Time Clocks
7120 +/dts-v1/;
7121 +/plugin/;
7122 +
7123 +/ {
7124 + compatible = "brcm,bcm2708";
7125 +
7126 + fragment@0 {
7127 + target = <&i2c_arm>;
7128 + __dormant__ {
7129 + #address-cells = <1>;
7130 + #size-cells = <0>;
7131 + status = "okay";
7132 +
7133 + abx80x: abx80x@69 {
7134 + compatible = "abracon,abx80x";
7135 + reg = <0x69>;
7136 + abracon,tc-diode = "standard";
7137 + abracon,tc-resistor = <0>;
7138 + status = "okay";
7139 + };
7140 + };
7141 + };
7142 +
7143 + fragment@1 {
7144 + target = <&i2c_arm>;
7145 + __dormant__ {
7146 + #address-cells = <1>;
7147 + #size-cells = <0>;
7148 + status = "okay";
7149 +
7150 + ds1307: ds1307@68 {
7151 + compatible = "maxim,ds1307";
7152 + reg = <0x68>;
7153 + status = "okay";
7154 + };
7155 + };
7156 + };
7157 +
7158 + fragment@2 {
7159 + target = <&i2c_arm>;
7160 + __dormant__ {
7161 + #address-cells = <1>;
7162 + #size-cells = <0>;
7163 + status = "okay";
7164 +
7165 + ds1339: ds1339@68 {
7166 + compatible = "dallas,ds1339";
7167 + trickle-resistor-ohms = <0>;
7168 + reg = <0x68>;
7169 + status = "okay";
7170 + };
7171 + };
7172 + };
7173 +
7174 + fragment@3 {
7175 + target = <&i2c_arm>;
7176 + __dormant__ {
7177 + #address-cells = <1>;
7178 + #size-cells = <0>;
7179 + status = "okay";
7180 +
7181 + ds3231: ds3231@68 {
7182 + compatible = "maxim,ds3231";
7183 + reg = <0x68>;
7184 + status = "okay";
7185 + };
7186 + };
7187 + };
7188 +
7189 + fragment@4 {
7190 + target = <&i2c_arm>;
7191 + __dormant__ {
7192 + #address-cells = <1>;
7193 + #size-cells = <0>;
7194 + status = "okay";
7195 +
7196 + mcp7940x: mcp7940x@6f {
7197 + compatible = "microchip,mcp7940x";
7198 + reg = <0x6f>;
7199 + status = "okay";
7200 + };
7201 + };
7202 + };
7203 +
7204 + fragment@5 {
7205 + target = <&i2c_arm>;
7206 + __dormant__ {
7207 + #address-cells = <1>;
7208 + #size-cells = <0>;
7209 + status = "okay";
7210 +
7211 + mcp7941x: mcp7941x@6f {
7212 + compatible = "microchip,mcp7941x";
7213 + reg = <0x6f>;
7214 + status = "okay";
7215 + };
7216 + };
7217 + };
7218 +
7219 + fragment@6 {
7220 + target = <&i2c_arm>;
7221 + __dormant__ {
7222 + #address-cells = <1>;
7223 + #size-cells = <0>;
7224 + status = "okay";
7225 +
7226 + pcf2127: pcf2127@51 {
7227 + compatible = "nxp,pcf2127";
7228 + reg = <0x51>;
7229 + status = "okay";
7230 + };
7231 + };
7232 + };
7233 +
7234 + fragment@7 {
7235 + target = <&i2c_arm>;
7236 + __dormant__ {
7237 + #address-cells = <1>;
7238 + #size-cells = <0>;
7239 + status = "okay";
7240 +
7241 + pcf8523: pcf8523@68 {
7242 + compatible = "nxp,pcf8523";
7243 + reg = <0x68>;
7244 + status = "okay";
7245 + };
7246 + };
7247 + };
7248 +
7249 + fragment@8 {
7250 + target = <&i2c_arm>;
7251 + __dormant__ {
7252 + #address-cells = <1>;
7253 + #size-cells = <0>;
7254 + status = "okay";
7255 +
7256 + pcf8563: pcf8563@51 {
7257 + compatible = "nxp,pcf8563";
7258 + reg = <0x51>;
7259 + status = "okay";
7260 + };
7261 + };
7262 + };
7263 +
7264 + fragment@9 {
7265 + target = <&i2c_arm>;
7266 + __dormant__ {
7267 + #address-cells = <1>;
7268 + #size-cells = <0>;
7269 + status = "okay";
7270 +
7271 + m41t62: m41t62@68 {
7272 + compatible = "st,m41t62";
7273 + reg = <0x68>;
7274 + status = "okay";
7275 + };
7276 + };
7277 + };
7278 +
7279 + __overrides__ {
7280 + abx80x = <0>,"+0";
7281 + ds1307 = <0>,"+1";
7282 + ds1339 = <0>,"+2";
7283 + ds3231 = <0>,"+3";
7284 + mcp7940x = <0>,"+4";
7285 + mcp7941x = <0>,"+5";
7286 + pcf2127 = <0>,"+6";
7287 + pcf8523 = <0>,"+7";
7288 + pcf8563 = <0>,"+8";
7289 + m41t62 = <0>,"+9";
7290 + trickle-diode-type = <&abx80x>,"abracon,tc-diode";
7291 + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
7292 + <&abx80x>,"abracon,tc-resistor";
7293 + wakeup-source = <&ds1339>,"wakeup-source?",
7294 + <&ds3231>,"wakeup-source?",
7295 + <&mcp7940x>,"wakeup-source?",
7296 + <&mcp7941x>,"wakeup-source?",
7297 + <&m41t62>,"wakeup-source?";
7298 + };
7299 +};
7300 --- /dev/null
7301 +++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
7302 @@ -0,0 +1,223 @@
7303 +// Definitions for I2C based sensors using the Industrial IO or HWMON interface.
7304 +/dts-v1/;
7305 +/plugin/;
7306 +
7307 +/ {
7308 + compatible = "brcm,bcm2708";
7309 +
7310 + fragment@0 {
7311 + target = <&i2c_arm>;
7312 + __dormant__ {
7313 + #address-cells = <1>;
7314 + #size-cells = <0>;
7315 + status = "okay";
7316 +
7317 + bme280: bme280@76 {
7318 + compatible = "bosch,bme280";
7319 + reg = <0x76>;
7320 + status = "okay";
7321 + };
7322 + };
7323 + };
7324 +
7325 + fragment@1 {
7326 + target = <&i2c_arm>;
7327 + __dormant__ {
7328 + #address-cells = <1>;
7329 + #size-cells = <0>;
7330 + status = "okay";
7331 +
7332 + bmp085: bmp085@77 {
7333 + compatible = "bosch,bmp085";
7334 + reg = <0x77>;
7335 + default-oversampling = <3>;
7336 + status = "okay";
7337 + };
7338 + };
7339 + };
7340 +
7341 + fragment@2 {
7342 + target = <&i2c_arm>;
7343 + __dormant__ {
7344 + #address-cells = <1>;
7345 + #size-cells = <0>;
7346 + status = "okay";
7347 +
7348 + bmp180: bmp180@77 {
7349 + compatible = "bosch,bmp180";
7350 + reg = <0x77>;
7351 + status = "okay";
7352 + };
7353 + };
7354 + };
7355 +
7356 + fragment@3 {
7357 + target = <&i2c_arm>;
7358 + __dormant__ {
7359 + #address-cells = <1>;
7360 + #size-cells = <0>;
7361 + status = "okay";
7362 +
7363 + bmp280: bmp280@76 {
7364 + compatible = "bosch,bmp280";
7365 + reg = <0x76>;
7366 + status = "okay";
7367 + };
7368 + };
7369 + };
7370 +
7371 + fragment@4 {
7372 + target = <&i2c_arm>;
7373 + __dormant__ {
7374 + #address-cells = <1>;
7375 + #size-cells = <0>;
7376 + status = "okay";
7377 +
7378 + htu21: htu21@40 {
7379 + compatible = "htu21";
7380 + reg = <0x40>;
7381 + status = "okay";
7382 + };
7383 + };
7384 + };
7385 +
7386 + fragment@5 {
7387 + target = <&i2c_arm>;
7388 + __dormant__ {
7389 + #address-cells = <1>;
7390 + #size-cells = <0>;
7391 + status = "okay";
7392 +
7393 + lm75: lm75@4f {
7394 + compatible = "lm75";
7395 + reg = <0x4f>;
7396 + status = "okay";
7397 + };
7398 + };
7399 + };
7400 +
7401 + fragment@6 {
7402 + target = <&i2c_arm>;
7403 + __dormant__ {
7404 + #address-cells = <1>;
7405 + #size-cells = <0>;
7406 + status = "okay";
7407 +
7408 + si7020: si7020@40 {
7409 + compatible = "si7020";
7410 + reg = <0x40>;
7411 + status = "okay";
7412 + };
7413 + };
7414 + };
7415 +
7416 + fragment@7 {
7417 + target = <&i2c_arm>;
7418 + __dormant__ {
7419 + #address-cells = <1>;
7420 + #size-cells = <0>;
7421 + status = "okay";
7422 +
7423 + tmp102: tmp102@48 {
7424 + compatible = "ti,tmp102";
7425 + reg = <0x48>;
7426 + status = "okay";
7427 + };
7428 + };
7429 + };
7430 +
7431 + fragment@8 {
7432 + target = <&i2c_arm>;
7433 + __dormant__ {
7434 + #address-cells = <1>;
7435 + #size-cells = <0>;
7436 + status = "okay";
7437 +
7438 + hdc100x: hdc100x@40 {
7439 + compatible = "hdc100x";
7440 + reg = <0x40>;
7441 + status = "okay";
7442 + };
7443 + };
7444 + };
7445 +
7446 + fragment@9 {
7447 + target = <&i2c_arm>;
7448 + __dormant__ {
7449 + #address-cells = <1>;
7450 + #size-cells = <0>;
7451 + status = "okay";
7452 +
7453 + tsl4531: tsl4531@29 {
7454 + compatible = "tsl4531";
7455 + reg = <0x29>;
7456 + status = "okay";
7457 + };
7458 + };
7459 + };
7460 +
7461 + fragment@10 {
7462 + target = <&i2c_arm>;
7463 + __dormant__ {
7464 + #address-cells = <1>;
7465 + #size-cells = <0>;
7466 + status = "okay";
7467 +
7468 + veml6070: veml6070@38 {
7469 + compatible = "veml6070";
7470 + reg = <0x38>;
7471 + status = "okay";
7472 + };
7473 + };
7474 + };
7475 +
7476 + fragment@11 {
7477 + target = <&i2c_arm>;
7478 + __dormant__ {
7479 + #address-cells = <1>;
7480 + #size-cells = <0>;
7481 + status = "okay";
7482 +
7483 + sht3x: sht3x@44 {
7484 + compatible = "sht3x";
7485 + reg = <0x44>;
7486 + status = "okay";
7487 + };
7488 + };
7489 + };
7490 +
7491 + fragment@12 {
7492 + target = <&i2c_arm>;
7493 + __dormant__ {
7494 + #address-cells = <1>;
7495 + #size-cells = <0>;
7496 + status = "okay";
7497 +
7498 + ds1621: ds1621@48 {
7499 + compatible = "ds1621";
7500 + reg = <0x48>;
7501 + status = "okay";
7502 + };
7503 + };
7504 + };
7505 +
7506 + __overrides__ {
7507 + addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0",
7508 + <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0",
7509 + <&ds1621>,"reg:0";
7510 + bme280 = <0>,"+0";
7511 + bmp085 = <0>,"+1";
7512 + bmp180 = <0>,"+2";
7513 + bmp280 = <0>,"+3";
7514 + htu21 = <0>,"+4";
7515 + lm75 = <0>,"+5";
7516 + lm75addr = <&lm75>,"reg:0";
7517 + si7020 = <0>,"+6";
7518 + tmp102 = <0>,"+7";
7519 + hdc100x = <0>,"+8";
7520 + tsl4531 = <0>,"+9";
7521 + veml6070 = <0>,"+10";
7522 + sht3x = <0>,"+11";
7523 + ds1621 = <0>,"+12";
7524 + };
7525 +};
7526 --- /dev/null
7527 +++ b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
7528 @@ -0,0 +1,69 @@
7529 +/*
7530 + * Device tree overlay for i2c_bcm2708, i2c0 bus
7531 + *
7532 + * Compile:
7533 + * dtc -@ -I dts -O dtb -o i2c0-bcm2708-overlay.dtb i2c0-bcm2708-overlay.dts
7534 + */
7535 +
7536 +/dts-v1/;
7537 +/plugin/;
7538 +
7539 +/{
7540 + compatible = "brcm,bcm2708";
7541 +
7542 + fragment@0 {
7543 + target = <&i2c0>;
7544 + __overlay__ {
7545 + status = "okay";
7546 + };
7547 + };
7548 +
7549 + fragment@1 {
7550 + target = <&i2c0_pins>;
7551 + frag1: __overlay__ {
7552 + brcm,pins = <0 1>;
7553 + brcm,function = <4>; /* alt0 */
7554 + };
7555 + };
7556 +
7557 + fragment@2 {
7558 + target = <&i2c0_pins>;
7559 + __dormant__ {
7560 + brcm,pins = <28 29>;
7561 + brcm,function = <4>; /* alt0 */
7562 + };
7563 + };
7564 +
7565 + fragment@3 {
7566 + target = <&i2c0_pins>;
7567 + __dormant__ {
7568 + brcm,pins = <44 45>;
7569 + brcm,function = <5>; /* alt1 */
7570 + };
7571 + };
7572 +
7573 + fragment@4 {
7574 + target = <&i2c0_pins>;
7575 + __dormant__ {
7576 + brcm,pins = <46 47>;
7577 + brcm,function = <4>; /* alt0 */
7578 + };
7579 + };
7580 +
7581 + fragment@5 {
7582 + target = <&i2c0>;
7583 + __dormant__ {
7584 + compatible = "brcm,bcm2708-i2c";
7585 + };
7586 + };
7587 +
7588 + __overrides__ {
7589 + sda0_pin = <&frag1>,"brcm,pins:0";
7590 + scl0_pin = <&frag1>,"brcm,pins:4";
7591 + pins_0_1 = <0>,"+1-2-3-4";
7592 + pins_28_29 = <0>,"-1+2-3-4";
7593 + pins_44_45 = <0>,"-1-2+3-4";
7594 + pins_46_47 = <0>,"-1-2-3+4";
7595 + combine = <0>, "!5";
7596 + };
7597 +};
7598 --- /dev/null
7599 +++ b/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts
7600 @@ -0,0 +1,43 @@
7601 +/*
7602 + * Device tree overlay for i2c_bcm2708, i2c1 bus
7603 + *
7604 + * Compile:
7605 + * dtc -@ -I dts -O dtb -o i2c1-bcm2708-overlay.dtb i2c1-bcm2708-overlay.dts
7606 + */
7607 +
7608 +/dts-v1/;
7609 +/plugin/;
7610 +
7611 +/{
7612 + compatible = "brcm,bcm2708";
7613 +
7614 + fragment@0 {
7615 + target = <&i2c1>;
7616 + __overlay__ {
7617 + pinctrl-0 = <&i2c1_pins>;
7618 + status = "okay";
7619 + };
7620 + };
7621 +
7622 + fragment@1 {
7623 + target = <&i2c1_pins>;
7624 + pins: __overlay__ {
7625 + brcm,pins = <2 3>;
7626 + brcm,function = <4>; /* alt 0 */
7627 + };
7628 + };
7629 +
7630 + fragment@2 {
7631 + target = <&i2c1>;
7632 + __dormant__ {
7633 + compatible = "brcm,bcm2708-i2c";
7634 + };
7635 + };
7636 +
7637 + __overrides__ {
7638 + sda1_pin = <&pins>,"brcm,pins:0";
7639 + scl1_pin = <&pins>,"brcm,pins:4";
7640 + pin_func = <&pins>,"brcm,function:0";
7641 + combine = <0>, "!2";
7642 + };
7643 +};
7644 --- /dev/null
7645 +++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
7646 @@ -0,0 +1,18 @@
7647 +/*
7648 + * Device tree overlay to move i2s to gpio 28 to 31 on CM
7649 + */
7650 +
7651 +/dts-v1/;
7652 +/plugin/;
7653 +
7654 +/ {
7655 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
7656 +
7657 + fragment@0 {
7658 + target = <&i2s_pins>;
7659 + __overlay__ {
7660 + brcm,pins = <28 29 30 31>;
7661 + brcm,function = <6>; /* alt2 */
7662 + };
7663 + };
7664 +};
7665 --- /dev/null
7666 +++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
7667 @@ -0,0 +1,46 @@
7668 +// Definitions for IQaudIO DAC
7669 +/dts-v1/;
7670 +/plugin/;
7671 +
7672 +/ {
7673 + compatible = "brcm,bcm2708";
7674 +
7675 + fragment@0 {
7676 + target = <&i2s>;
7677 + __overlay__ {
7678 + status = "okay";
7679 + };
7680 + };
7681 +
7682 + fragment@1 {
7683 + target = <&i2c1>;
7684 + __overlay__ {
7685 + #address-cells = <1>;
7686 + #size-cells = <0>;
7687 + status = "okay";
7688 +
7689 + pcm5122@4c {
7690 + #sound-dai-cells = <0>;
7691 + compatible = "ti,pcm5122";
7692 + reg = <0x4c>;
7693 + AVDD-supply = <&vdd_3v3_reg>;
7694 + DVDD-supply = <&vdd_3v3_reg>;
7695 + CPVDD-supply = <&vdd_3v3_reg>;
7696 + status = "okay";
7697 + };
7698 + };
7699 + };
7700 +
7701 + fragment@2 {
7702 + target = <&sound>;
7703 + frag2: __overlay__ {
7704 + compatible = "iqaudio,iqaudio-dac";
7705 + i2s-controller = <&i2s>;
7706 + status = "okay";
7707 + };
7708 + };
7709 +
7710 + __overrides__ {
7711 + 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
7712 + };
7713 +};
7714 --- /dev/null
7715 +++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
7716 @@ -0,0 +1,49 @@
7717 +// Definitions for IQaudIO DAC+
7718 +/dts-v1/;
7719 +/plugin/;
7720 +
7721 +/ {
7722 + compatible = "brcm,bcm2708";
7723 +
7724 + fragment@0 {
7725 + target = <&i2s>;
7726 + __overlay__ {
7727 + status = "okay";
7728 + };
7729 + };
7730 +
7731 + fragment@1 {
7732 + target = <&i2c1>;
7733 + __overlay__ {
7734 + #address-cells = <1>;
7735 + #size-cells = <0>;
7736 + status = "okay";
7737 +
7738 + pcm5122@4c {
7739 + #sound-dai-cells = <0>;
7740 + compatible = "ti,pcm5122";
7741 + reg = <0x4c>;
7742 + AVDD-supply = <&vdd_3v3_reg>;
7743 + DVDD-supply = <&vdd_3v3_reg>;
7744 + CPVDD-supply = <&vdd_3v3_reg>;
7745 + status = "okay";
7746 + };
7747 + };
7748 + };
7749 +
7750 + fragment@2 {
7751 + target = <&sound>;
7752 + iqaudio_dac: __overlay__ {
7753 + compatible = "iqaudio,iqaudio-dac";
7754 + i2s-controller = <&i2s>;
7755 + mute-gpios = <&gpio 22 0>;
7756 + status = "okay";
7757 + };
7758 + };
7759 +
7760 + __overrides__ {
7761 + 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
7762 + auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
7763 + unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
7764 + };
7765 +};
7766 --- /dev/null
7767 +++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
7768 @@ -0,0 +1,47 @@
7769 +// Definitions for IQAudIO Digi WM8804 audio board
7770 +/dts-v1/;
7771 +/plugin/;
7772 +
7773 +/ {
7774 + compatible = "brcm,bcm2708";
7775 +
7776 + fragment@0 {
7777 + target = <&i2s>;
7778 + __overlay__ {
7779 + status = "okay";
7780 + };
7781 + };
7782 +
7783 + fragment@1 {
7784 + target = <&i2c1>;
7785 + __overlay__ {
7786 + #address-cells = <1>;
7787 + #size-cells = <0>;
7788 + status = "okay";
7789 +
7790 + wm8804@3b {
7791 + #sound-dai-cells = <0>;
7792 + compatible = "wlf,wm8804";
7793 + reg = <0x3b>;
7794 + status = "okay";
7795 + DVDD-supply = <&vdd_3v3_reg>;
7796 + PVDD-supply = <&vdd_3v3_reg>;
7797 + };
7798 + };
7799 + };
7800 +
7801 + fragment@2 {
7802 + target = <&sound>;
7803 + wm8804_digi: __overlay__ {
7804 + compatible = "iqaudio,wm8804-digi";
7805 + i2s-controller = <&i2s>;
7806 + status = "okay";
7807 + };
7808 + };
7809 +
7810 + __overrides__ {
7811 + card_name = <&wm8804_digi>,"wm8804-digi,card-name";
7812 + dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
7813 + dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
7814 + };
7815 +};
7816 --- /dev/null
7817 +++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
7818 @@ -0,0 +1,309 @@
7819 +// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80)
7820 +
7821 +// dtparams:
7822 +// flash-spi<n>-<m> - Enables flash device on SPI<n>, CS#<m>.
7823 +// flash-fastr-spi<n>-<m> - Enables flash device with fast read capability on SPI<n>, CS#<m>.
7824 +//
7825 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
7826 +//
7827 +// Example: A single flash device with fast read capability on SPI0, CS#0:
7828 +// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0
7829 +
7830 +/dts-v1/;
7831 +/plugin/;
7832 +
7833 +/ {
7834 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
7835 +
7836 + // disable spi-dev on spi0.0
7837 + fragment@0 {
7838 + target = <&spidev0>;
7839 + __dormant__ {
7840 + status = "disabled";
7841 + };
7842 + };
7843 +
7844 + // disable spi-dev on spi0.1
7845 + fragment@1 {
7846 + target = <&spidev1>;
7847 + __dormant__ {
7848 + status = "disabled";
7849 + };
7850 + };
7851 +
7852 + // disable spi-dev on spi1.0
7853 + fragment@2 {
7854 + target-path = "spi1/spidev@0";
7855 + __dormant__ {
7856 + status = "disabled";
7857 + };
7858 + };
7859 +
7860 + // disable spi-dev on spi1.1
7861 + fragment@3 {
7862 + target-path = "spi1/spidev@1";
7863 + __dormant__ {
7864 + status = "disabled";
7865 + };
7866 + };
7867 +
7868 + // disable spi-dev on spi1.2
7869 + fragment@4 {
7870 + target-path = "spi1/spidev@2";
7871 + __dormant__ {
7872 + status = "disabled";
7873 + };
7874 + };
7875 +
7876 + // disable spi-dev on spi2.0
7877 + fragment@5 {
7878 + target-path = "spi2/spidev@0";
7879 + __dormant__ {
7880 + status = "disabled";
7881 + };
7882 + };
7883 +
7884 + // disable spi-dev on spi2.1
7885 + fragment@6 {
7886 + target-path = "spi2/spidev@1";
7887 + __dormant__ {
7888 + status = "disabled";
7889 + };
7890 + };
7891 +
7892 + // disable spi-dev on spi2.2
7893 + fragment@7 {
7894 + target-path = "spi2/spidev@2";
7895 + __dormant__ {
7896 + status = "disabled";
7897 + };
7898 + };
7899 +
7900 + // enable flash on spi0.0
7901 + fragment@8 {
7902 + target = <&spi0>;
7903 + __dormant__ {
7904 + status = "okay";
7905 + #address-cells = <1>;
7906 + #size-cells = <0>;
7907 + spi_nor_00: spi_nor@0 {
7908 + #address-cells = <1>;
7909 + #size-cells = <1>;
7910 + compatible = "jedec,spi-nor";
7911 + reg = <0>;
7912 + spi-max-frequency = <500000>;
7913 + };
7914 + };
7915 + };
7916 +
7917 + // enable flash on spi0.1
7918 + fragment@9 {
7919 + target = <&spi0>;
7920 + __dormant__ {
7921 + status = "okay";
7922 + #address-cells = <1>;
7923 + #size-cells = <0>;
7924 + spi_nor_01: spi_nor@1 {
7925 + #address-cells = <1>;
7926 + #size-cells = <1>;
7927 + compatible = "jedec,spi-nor";
7928 + reg = <1>;
7929 + spi-max-frequency = <500000>;
7930 + };
7931 + };
7932 + };
7933 +
7934 + // enable flash on spi1.0
7935 + fragment@10 {
7936 + target = <&spi1>;
7937 + __dormant__ {
7938 + status = "okay";
7939 + #address-cells = <1>;
7940 + #size-cells = <0>;
7941 + spi_nor_10: spi_nor@0 {
7942 + #address-cells = <1>;
7943 + #size-cells = <1>;
7944 + compatible = "jedec,spi-nor";
7945 + reg = <0>;
7946 + spi-max-frequency = <500000>;
7947 + };
7948 + };
7949 + };
7950 +
7951 + // enable flash on spi1.1
7952 + fragment@11 {
7953 + target = <&spi1>;
7954 + __dormant__ {
7955 + status = "okay";
7956 + #address-cells = <1>;
7957 + #size-cells = <0>;
7958 + spi_nor_11: spi_nor@1 {
7959 + #address-cells = <1>;
7960 + #size-cells = <1>;
7961 + compatible = "jedec,spi-nor";
7962 + reg = <1>;
7963 + spi-max-frequency = <500000>;
7964 + };
7965 + };
7966 + };
7967 +
7968 + // enable flash on spi1.2
7969 + fragment@12 {
7970 + target = <&spi1>;
7971 + __dormant__ {
7972 + status = "okay";
7973 + #address-cells = <1>;
7974 + #size-cells = <0>;
7975 + spi_nor_12: spi_nor@2 {
7976 + #address-cells = <1>;
7977 + #size-cells = <1>;
7978 + compatible = "jedec,spi-nor";
7979 + reg = <2>;
7980 + spi-max-frequency = <500000>;
7981 + };
7982 + };
7983 + };
7984 +
7985 + // enable flash on spi2.0
7986 + fragment@13 {
7987 + target = <&spi2>;
7988 + __dormant__ {
7989 + status = "okay";
7990 + #address-cells = <1>;
7991 + #size-cells = <0>;
7992 + spi_nor_20: spi_nor@0 {
7993 + #address-cells = <1>;
7994 + #size-cells = <1>;
7995 + compatible = "jedec,spi-nor";
7996 + reg = <0>;
7997 + spi-max-frequency = <500000>;
7998 + };
7999 + };
8000 + };
8001 +
8002 + // enable flash on spi2.1
8003 + fragment@14 {
8004 + target = <&spi2>;
8005 + __dormant__ {
8006 + status = "okay";
8007 + #address-cells = <1>;
8008 + #size-cells = <0>;
8009 + spi_nor_21: spi_nor@1 {
8010 + #address-cells = <1>;
8011 + #size-cells = <1>;
8012 + compatible = "jedec,spi-nor";
8013 + reg = <1>;
8014 + spi-max-frequency = <500000>;
8015 + };
8016 + };
8017 + };
8018 +
8019 + // enable flash on spi2.2
8020 + fragment@15 {
8021 + target = <&spi2>;
8022 + __dormant__ {
8023 + status = "okay";
8024 + #address-cells = <1>;
8025 + #size-cells = <0>;
8026 + spi_nor_22: spi_nor@2 {
8027 + #address-cells = <1>;
8028 + #size-cells = <1>;
8029 + compatible = "jedec,spi-nor";
8030 + reg = <2>;
8031 + spi-max-frequency = <500000>;
8032 + };
8033 + };
8034 + };
8035 +
8036 + // Enable fast read for device on spi0.0.
8037 + // Use default active low interrupt signalling.
8038 + fragment@16 {
8039 + target = <&spi_nor_00>;
8040 + __dormant__ {
8041 + m25p,fast-read;
8042 + };
8043 + };
8044 +
8045 + // Enable fast read for device on spi0.1.
8046 + // Use default active low interrupt signalling.
8047 + fragment@17 {
8048 + target = <&spi_nor_01>;
8049 + __dormant__ {
8050 + m25p,fast-read;
8051 + };
8052 + };
8053 +
8054 + // Enable fast read for device on spi1.0.
8055 + // Use default active low interrupt signalling.
8056 + fragment@18 {
8057 + target = <&spi_nor_10>;
8058 + __dormant__ {
8059 + m25p,fast-read;
8060 + };
8061 + };
8062 +
8063 + // Enable fast read for device on spi1.1.
8064 + // Use default active low interrupt signalling.
8065 + fragment@19 {
8066 + target = <&spi_nor_11>;
8067 + __dormant__ {
8068 + m25p,fast-read;
8069 + };
8070 + };
8071 +
8072 + // Enable fast read for device on spi1.2.
8073 + // Use default active low interrupt signalling.
8074 + fragment@20 {
8075 + target = <&spi_nor_12>;
8076 + __dormant__ {
8077 + m25p,fast-read;
8078 + };
8079 + };
8080 +
8081 + // Enable fast read for device on spi2.0.
8082 + // Use default active low interrupt signalling.
8083 + fragment@21 {
8084 + target = <&spi_nor_20>;
8085 + __dormant__ {
8086 + m25p,fast-read;
8087 + };
8088 + };
8089 +
8090 + // Enable fast read for device on spi2.1.
8091 + // Use default active low interrupt signalling.
8092 + fragment@22 {
8093 + target = <&spi_nor_21>;
8094 + __dormant__ {
8095 + m25p,fast-read;
8096 + };
8097 + };
8098 +
8099 + // Enable fast read for device on spi2.2.
8100 + // Use default active low interrupt signalling.
8101 + fragment@23 {
8102 + target = <&spi_nor_22>;
8103 + __dormant__ {
8104 + m25p,fast-read;
8105 + };
8106 + };
8107 +
8108 + __overrides__ {
8109 + flash-spi0-0 = <0>,"+0+8";
8110 + flash-spi0-1 = <0>,"+1+9";
8111 + flash-spi1-0 = <0>,"+2+10";
8112 + flash-spi1-1 = <0>,"+3+11";
8113 + flash-spi1-2 = <0>,"+4+12";
8114 + flash-spi2-0 = <0>,"+5+13";
8115 + flash-spi2-1 = <0>,"+6+14";
8116 + flash-spi2-2 = <0>,"+7+15";
8117 + flash-fastr-spi0-0 = <0>,"+0+8+16";
8118 + flash-fastr-spi0-1 = <0>,"+1+9+17";
8119 + flash-fastr-spi1-0 = <0>,"+2+10+18";
8120 + flash-fastr-spi1-1 = <0>,"+3+11+19";
8121 + flash-fastr-spi1-2 = <0>,"+4+12+20";
8122 + flash-fastr-spi2-0 = <0>,"+5+13+21";
8123 + flash-fastr-spi2-1 = <0>,"+6+14+22";
8124 + flash-fastr-spi2-2 = <0>,"+7+15+23";
8125 + };
8126 +};
8127 +
8128 --- /dev/null
8129 +++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
8130 @@ -0,0 +1,46 @@
8131 +// Definitions for JustBoom DAC
8132 +/dts-v1/;
8133 +/plugin/;
8134 +
8135 +/ {
8136 + compatible = "brcm,bcm2708";
8137 +
8138 + fragment@0 {
8139 + target = <&i2s>;
8140 + __overlay__ {
8141 + status = "okay";
8142 + };
8143 + };
8144 +
8145 + fragment@1 {
8146 + target = <&i2c1>;
8147 + __overlay__ {
8148 + #address-cells = <1>;
8149 + #size-cells = <0>;
8150 + status = "okay";
8151 +
8152 + pcm5122@4d {
8153 + #sound-dai-cells = <0>;
8154 + compatible = "ti,pcm5122";
8155 + reg = <0x4d>;
8156 + AVDD-supply = <&vdd_3v3_reg>;
8157 + DVDD-supply = <&vdd_3v3_reg>;
8158 + CPVDD-supply = <&vdd_3v3_reg>;
8159 + status = "okay";
8160 + };
8161 + };
8162 + };
8163 +
8164 + fragment@2 {
8165 + target = <&sound>;
8166 + frag2: __overlay__ {
8167 + compatible = "justboom,justboom-dac";
8168 + i2s-controller = <&i2s>;
8169 + status = "okay";
8170 + };
8171 + };
8172 +
8173 + __overrides__ {
8174 + 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
8175 + };
8176 +};
8177 --- /dev/null
8178 +++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
8179 @@ -0,0 +1,41 @@
8180 +// Definitions for JustBoom Digi
8181 +/dts-v1/;
8182 +/plugin/;
8183 +
8184 +/ {
8185 + compatible = "brcm,bcm2708";
8186 +
8187 + fragment@0 {
8188 + target = <&i2s>;
8189 + __overlay__ {
8190 + status = "okay";
8191 + };
8192 + };
8193 +
8194 + fragment@1 {
8195 + target = <&i2c1>;
8196 + __overlay__ {
8197 + #address-cells = <1>;
8198 + #size-cells = <0>;
8199 + status = "okay";
8200 +
8201 + wm8804@3b {
8202 + #sound-dai-cells = <0>;
8203 + compatible = "wlf,wm8804";
8204 + reg = <0x3b>;
8205 + PVDD-supply = <&vdd_3v3_reg>;
8206 + DVDD-supply = <&vdd_3v3_reg>;
8207 + status = "okay";
8208 + };
8209 + };
8210 + };
8211 +
8212 + fragment@2 {
8213 + target = <&sound>;
8214 + __overlay__ {
8215 + compatible = "justboom,justboom-digi";
8216 + i2s-controller = <&i2s>;
8217 + status = "okay";
8218 + };
8219 + };
8220 +};
8221 --- /dev/null
8222 +++ b/arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts
8223 @@ -0,0 +1,57 @@
8224 +// Definitions for lirc-rpi module
8225 +/dts-v1/;
8226 +/plugin/;
8227 +
8228 +/ {
8229 + compatible = "brcm,bcm2708";
8230 +
8231 + fragment@0 {
8232 + target-path = "/";
8233 + __overlay__ {
8234 + lirc_rpi: lirc_rpi {
8235 + compatible = "rpi,lirc-rpi";
8236 + pinctrl-names = "default";
8237 + pinctrl-0 = <&lirc_pins>;
8238 + status = "okay";
8239 +
8240 + // Override autodetection of IR receiver circuit
8241 + // (0 = active high, 1 = active low, -1 = no override )
8242 + rpi,sense = <0xffffffff>;
8243 +
8244 + // Software carrier
8245 + // (0 = off, 1 = on)
8246 + rpi,softcarrier = <1>;
8247 +
8248 + // Invert output
8249 + // (0 = off, 1 = on)
8250 + rpi,invert = <0>;
8251 +
8252 + // Enable debugging messages
8253 + // (0 = off, 1 = on)
8254 + rpi,debug = <0>;
8255 + };
8256 + };
8257 + };
8258 +
8259 + fragment@1 {
8260 + target = <&gpio>;
8261 + __overlay__ {
8262 + lirc_pins: lirc_pins {
8263 + brcm,pins = <17 18>;
8264 + brcm,function = <1 0>; // out in
8265 + brcm,pull = <0 1>; // off down
8266 + };
8267 + };
8268 + };
8269 +
8270 + __overrides__ {
8271 + gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
8272 + gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
8273 + gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
8274 +
8275 + sense = <&lirc_rpi>,"rpi,sense:0";
8276 + softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
8277 + invert = <&lirc_rpi>,"rpi,invert:0";
8278 + debug = <&lirc_rpi>,"rpi,debug:0";
8279 + };
8280 +};
8281 --- /dev/null
8282 +++ b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
8283 @@ -0,0 +1,86 @@
8284 +/dts-v1/;
8285 +/plugin/;
8286 +
8287 +
8288 +/ {
8289 + compatible = "brcm,bcm2835";
8290 +
8291 + fragment@0 {
8292 + target = <&i2c_arm>;
8293 + __dormant__ {
8294 + #address-cells = <1>;
8295 + #size-cells = <0>;
8296 + status = "okay";
8297 +
8298 + ltc2941: ltc2941@64 {
8299 + compatible = "lltc,ltc2941";
8300 + reg = <0x64>;
8301 + lltc,resistor-sense = <50>;
8302 + lltc,prescaler-exponent = <7>;
8303 + };
8304 + };
8305 + };
8306 +
8307 + fragment@1 {
8308 + target = <&i2c_arm>;
8309 + __dormant__ {
8310 + #address-cells = <1>;
8311 + #size-cells = <0>;
8312 + status = "okay";
8313 +
8314 + ltc2942: ltc2942@64 {
8315 + compatible = "lltc,ltc2942";
8316 + reg = <0x64>;
8317 + lltc,resistor-sense = <50>;
8318 + lltc,prescaler-exponent = <7>;
8319 + };
8320 + };
8321 + };
8322 +
8323 + fragment@2 {
8324 + target = <&i2c_arm>;
8325 + __dormant__ {
8326 + #address-cells = <1>;
8327 + #size-cells = <0>;
8328 + status = "okay";
8329 +
8330 + ltc2943: ltc2943@64 {
8331 + compatible = "lltc,ltc2943";
8332 + reg = <0x64>;
8333 + lltc,resistor-sense = <50>;
8334 + lltc,prescaler-exponent = <7>;
8335 + };
8336 + };
8337 + };
8338 +
8339 + fragment@3 {
8340 + target = <&i2c_arm>;
8341 + __dormant__ {
8342 + #address-cells = <1>;
8343 + #size-cells = <0>;
8344 + status = "okay";
8345 +
8346 + ltc2944: ltc2944@64 {
8347 + compatible = "lltc,ltc2944";
8348 + reg = <0x64>;
8349 + lltc,resistor-sense = <50>;
8350 + lltc,prescaler-exponent = <7>;
8351 + };
8352 + };
8353 + };
8354 +
8355 + __overrides__ {
8356 + ltc2941 = <0>,"+0";
8357 + ltc2942 = <0>,"+1";
8358 + ltc2943 = <0>,"+2";
8359 + ltc2944 = <0>,"+3";
8360 + resistor-sense = <&ltc2941>, "lltc,resistor-sense:0",
8361 + <&ltc2942>, "lltc,resistor-sense:0",
8362 + <&ltc2943>, "lltc,resistor-sense:0",
8363 + <&ltc2944>, "lltc,resistor-sense:0";
8364 + prescaler-exponent = <&ltc2941>, "lltc,prescaler-exponent:0",
8365 + <&ltc2942>, "lltc,prescaler-exponent:0",
8366 + <&ltc2943>, "lltc,prescaler-exponent:0",
8367 + <&ltc2944>, "lltc,prescaler-exponent:0";
8368 + };
8369 +};
8370 --- /dev/null
8371 +++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
8372 @@ -0,0 +1,64 @@
8373 +// Definitions for mbed DAC
8374 +/dts-v1/;
8375 +/plugin/;
8376 +
8377 +/ {
8378 + compatible = "brcm,bcm2708";
8379 +
8380 + fragment@0 {
8381 + target = <&i2s>;
8382 + __overlay__ {
8383 + status = "okay";
8384 + };
8385 + };
8386 +
8387 + fragment@1 {
8388 + target = <&i2c1>;
8389 + __overlay__ {
8390 + #address-cells = <1>;
8391 + #size-cells = <0>;
8392 + status = "okay";
8393 +
8394 + tlv320aic23: codec@1a {
8395 + #sound-dai-cells = <0>;
8396 + reg = <0x1a>;
8397 + compatible = "ti,tlv320aic23";
8398 + status = "okay";
8399 + };
8400 + };
8401 + };
8402 +
8403 + fragment@2 {
8404 + target = <&sound>;
8405 + __overlay__ {
8406 + compatible = "simple-audio-card";
8407 + i2s-controller = <&i2s>;
8408 + status = "okay";
8409 +
8410 + simple-audio-card,name = "mbed-DAC";
8411 +
8412 + simple-audio-card,widgets =
8413 + "Microphone", "Mic Jack",
8414 + "Line", "Line In",
8415 + "Headphone", "Headphone Jack";
8416 +
8417 + simple-audio-card,routing =
8418 + "Headphone Jack", "LHPOUT",
8419 + "Headphone Jack", "RHPOUT",
8420 + "LLINEIN", "Line In",
8421 + "RLINEIN", "Line In",
8422 + "MICIN", "Mic Jack";
8423 +
8424 + simple-audio-card,format = "i2s";
8425 +
8426 + simple-audio-card,cpu {
8427 + sound-dai = <&i2s>;
8428 + };
8429 +
8430 + sound_master: simple-audio-card,codec {
8431 + sound-dai = <&tlv320aic23>;
8432 + system-clock-frequency = <12288000>;
8433 + };
8434 + };
8435 + };
8436 +};
8437 --- /dev/null
8438 +++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
8439 @@ -0,0 +1,54 @@
8440 +// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
8441 +
8442 +/dts-v1/;
8443 +/plugin/;
8444 +
8445 +/ {
8446 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
8447 +
8448 + fragment@0 {
8449 + target = <&i2c1>;
8450 + __overlay__ {
8451 + status = "okay";
8452 + };
8453 + };
8454 +
8455 + fragment@1 {
8456 + target = <&gpio>;
8457 + __overlay__ {
8458 + mcp23017_pins: mcp23017_pins {
8459 + brcm,pins = <4>;
8460 + brcm,function = <0>;
8461 + };
8462 + };
8463 + };
8464 +
8465 + fragment@2 {
8466 + target = <&i2c1>;
8467 + __overlay__ {
8468 + #address-cells = <1>;
8469 + #size-cells = <0>;
8470 +
8471 + mcp23017: mcp@20 {
8472 + compatible = "microchip,mcp23017";
8473 + reg = <0x20>;
8474 + gpio-controller;
8475 + #gpio-cells = <2>;
8476 + #interrupt-cells=<2>;
8477 + interrupt-parent = <&gpio>;
8478 + interrupts = <4 2>;
8479 + interrupt-controller;
8480 + microchip,irq-mirror;
8481 +
8482 + status = "okay";
8483 + };
8484 + };
8485 + };
8486 +
8487 + __overrides__ {
8488 + gpiopin = <&mcp23017_pins>,"brcm,pins:0",
8489 + <&mcp23017>,"interrupts:0";
8490 + addr = <&mcp23017>,"reg:0";
8491 + };
8492 +};
8493 +
8494 --- /dev/null
8495 +++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
8496 @@ -0,0 +1,732 @@
8497 +// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
8498 +
8499 +// dtparams:
8500 +// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
8501 +// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
8502 +// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
8503 +// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
8504 +//
8505 +// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
8506 +// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
8507 +//
8508 +// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
8509 +// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
8510 +//
8511 +// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
8512 +// dtoverlay=spi1-2cs
8513 +// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
8514 +
8515 +/dts-v1/;
8516 +/plugin/;
8517 +
8518 +/ {
8519 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
8520 +
8521 + // disable spi-dev on spi0.0
8522 + fragment@0 {
8523 + target = <&spidev0>;
8524 + __dormant__ {
8525 + status = "disabled";
8526 + };
8527 + };
8528 +
8529 + // disable spi-dev on spi0.1
8530 + fragment@1 {
8531 + target = <&spidev1>;
8532 + __dormant__ {
8533 + status = "disabled";
8534 + };
8535 + };
8536 +
8537 + // disable spi-dev on spi1.0
8538 + fragment@2 {
8539 + target-path = "spi1/spidev@0";
8540 + __dormant__ {
8541 + status = "disabled";
8542 + };
8543 + };
8544 +
8545 + // disable spi-dev on spi1.1
8546 + fragment@3 {
8547 + target-path = "spi1/spidev@1";
8548 + __dormant__ {
8549 + status = "disabled";
8550 + };
8551 + };
8552 +
8553 + // disable spi-dev on spi1.2
8554 + fragment@4 {
8555 + target-path = "spi1/spidev@2";
8556 + __dormant__ {
8557 + status = "disabled";
8558 + };
8559 + };
8560 +
8561 + // disable spi-dev on spi2.0
8562 + fragment@5 {
8563 + target-path = "spi2/spidev@0";
8564 + __dormant__ {
8565 + status = "disabled";
8566 + };
8567 + };
8568 +
8569 + // disable spi-dev on spi2.1
8570 + fragment@6 {
8571 + target-path = "spi2/spidev@1";
8572 + __dormant__ {
8573 + status = "disabled";
8574 + };
8575 + };
8576 +
8577 + // disable spi-dev on spi2.2
8578 + fragment@7 {
8579 + target-path = "spi2/spidev@2";
8580 + __dormant__ {
8581 + status = "disabled";
8582 + };
8583 + };
8584 +
8585 + // enable one or more mcp23s08s on spi0.0
8586 + fragment@8 {
8587 + target = <&spi0>;
8588 + __dormant__ {
8589 + status = "okay";
8590 + #address-cells = <1>;
8591 + #size-cells = <0>;
8592 + mcp23s08_00: mcp23s08@0 {
8593 + compatible = "microchip,mcp23s08";
8594 + gpio-controller;
8595 + #gpio-cells = <2>;
8596 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
8597 + reg = <0>;
8598 + spi-max-frequency = <500000>;
8599 + status = "okay";
8600 + #interrupt-cells=<2>;
8601 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
8602 + };
8603 + };
8604 + };
8605 +
8606 + // enable one or more mcp23s08s on spi0.1
8607 + fragment@9 {
8608 + target = <&spi0>;
8609 + __dormant__ {
8610 + status = "okay";
8611 + #address-cells = <1>;
8612 + #size-cells = <0>;
8613 + mcp23s08_01: mcp23s08@1 {
8614 + compatible = "microchip,mcp23s08";
8615 + gpio-controller;
8616 + #gpio-cells = <2>;
8617 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
8618 + reg = <1>;
8619 + spi-max-frequency = <500000>;
8620 + status = "okay";
8621 + #interrupt-cells=<2>;
8622 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
8623 + };
8624 + };
8625 + };
8626 +
8627 + // enable one or more mcp23s08s on spi1.0
8628 + fragment@10 {
8629 + target = <&spi1>;
8630 + __dormant__ {
8631 + status = "okay";
8632 + #address-cells = <1>;
8633 + #size-cells = <0>;
8634 + mcp23s08_10: mcp23s08@0 {
8635 + compatible = "microchip,mcp23s08";
8636 + gpio-controller;
8637 + #gpio-cells = <2>;
8638 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
8639 + reg = <0>;
8640 + spi-max-frequency = <500000>;
8641 + status = "okay";
8642 + #interrupt-cells=<2>;
8643 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
8644 + };
8645 + };
8646 + };
8647 +
8648 + // enable one or more mcp23s08s on spi1.1
8649 + fragment@11 {
8650 + target = <&spi1>;
8651 + __dormant__ {
8652 + status = "okay";
8653 + #address-cells = <1>;
8654 + #size-cells = <0>;
8655 + mcp23s08_11: mcp23s08@1 {
8656 + compatible = "microchip,mcp23s08";
8657 + gpio-controller;
8658 + #gpio-cells = <2>;
8659 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
8660 + reg = <1>;
8661 + spi-max-frequency = <500000>;
8662 + status = "okay";
8663 + #interrupt-cells=<2>;
8664 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
8665 + };
8666 + };
8667 + };
8668 +
8669 + // enable one or more mcp23s08s on spi1.2
8670 + fragment@12 {
8671 + target = <&spi1>;
8672 + __dormant__ {
8673 + status = "okay";
8674 + #address-cells = <1>;
8675 + #size-cells = <0>;
8676 + mcp23s08_12: mcp23s08@2 {
8677 + compatible = "microchip,mcp23s08";
8678 + gpio-controller;
8679 + #gpio-cells = <2>;
8680 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
8681 + reg = <2>;
8682 + spi-max-frequency = <500000>;
8683 + status = "okay";
8684 + #interrupt-cells=<2>;
8685 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
8686 + };
8687 + };
8688 + };
8689 +
8690 + // enable one or more mcp23s08s on spi2.0
8691 + fragment@13 {
8692 + target = <&spi2>;
8693 + __dormant__ {
8694 + status = "okay";
8695 + #address-cells = <1>;
8696 + #size-cells = <0>;
8697 + mcp23s08_20: mcp23s08@0 {
8698 + compatible = "microchip,mcp23s08";
8699 + gpio-controller;
8700 + #gpio-cells = <2>;
8701 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
8702 + reg = <0>;
8703 + spi-max-frequency = <500000>;
8704 + status = "okay";
8705 + #interrupt-cells=<2>;
8706 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
8707 + };
8708 + };
8709 + };
8710 +
8711 + // enable one or more mcp23s08s on spi2.1
8712 + fragment@14 {
8713 + target = <&spi2>;
8714 + __dormant__ {
8715 + status = "okay";
8716 + #address-cells = <1>;
8717 + #size-cells = <0>;
8718 + mcp23s08_21: mcp23s08@1 {
8719 + compatible = "microchip,mcp23s08";
8720 + gpio-controller;
8721 + #gpio-cells = <2>;
8722 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
8723 + reg = <1>;
8724 + spi-max-frequency = <500000>;
8725 + status = "okay";
8726 + #interrupt-cells=<2>;
8727 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
8728 + };
8729 + };
8730 + };
8731 +
8732 + // enable one or more mcp23s08s on spi2.2
8733 + fragment@15 {
8734 + target = <&spi2>;
8735 + __dormant__ {
8736 + status = "okay";
8737 + #address-cells = <1>;
8738 + #size-cells = <0>;
8739 + mcp23s08_22: mcp23s08@2 {
8740 + compatible = "microchip,mcp23s08";
8741 + gpio-controller;
8742 + #gpio-cells = <2>;
8743 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
8744 + reg = <2>;
8745 + spi-max-frequency = <500000>;
8746 + status = "okay";
8747 + #interrupt-cells=<2>;
8748 + interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
8749 + };
8750 + };
8751 + };
8752 +
8753 + // enable one or more mcp23s17s on spi0.0
8754 + fragment@16 {
8755 + target = <&spi0>;
8756 + __dormant__ {
8757 + status = "okay";
8758 + #address-cells = <1>;
8759 + #size-cells = <0>;
8760 + mcp23s17_00: mcp23s17@0 {
8761 + compatible = "microchip,mcp23s17";
8762 + gpio-controller;
8763 + #gpio-cells = <2>;
8764 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
8765 + reg = <0>;
8766 + spi-max-frequency = <500000>;
8767 + status = "okay";
8768 + #interrupt-cells=<2>;
8769 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
8770 + };
8771 + };
8772 + };
8773 +
8774 + // enable one or more mcp23s17s on spi0.1
8775 + fragment@17 {
8776 + target = <&spi0>;
8777 + __dormant__ {
8778 + status = "okay";
8779 + #address-cells = <1>;
8780 + #size-cells = <0>;
8781 + mcp23s17_01: mcp23s17@1 {
8782 + compatible = "microchip,mcp23s17";
8783 + gpio-controller;
8784 + #gpio-cells = <2>;
8785 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
8786 + reg = <1>;
8787 + spi-max-frequency = <500000>;
8788 + status = "okay";
8789 + #interrupt-cells=<2>;
8790 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
8791 + };
8792 + };
8793 + };
8794 +
8795 + // enable one or more mcp23s17s on spi1.0
8796 + fragment@18 {
8797 + target = <&spi1>;
8798 + __dormant__ {
8799 + status = "okay";
8800 + #address-cells = <1>;
8801 + #size-cells = <0>;
8802 + mcp23s17_10: mcp23s17@0 {
8803 + compatible = "microchip,mcp23s17";
8804 + gpio-controller;
8805 + #gpio-cells = <2>;
8806 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
8807 + reg = <0>;
8808 + spi-max-frequency = <500000>;
8809 + status = "okay";
8810 + #interrupt-cells=<2>;
8811 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
8812 + };
8813 + };
8814 + };
8815 +
8816 + // enable one or more mcp23s17s on spi1.1
8817 + fragment@19 {
8818 + target = <&spi1>;
8819 + __dormant__ {
8820 + status = "okay";
8821 + #address-cells = <1>;
8822 + #size-cells = <0>;
8823 + mcp23s17_11: mcp23s17@1 {
8824 + compatible = "microchip,mcp23s17";
8825 + gpio-controller;
8826 + #gpio-cells = <2>;
8827 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
8828 + reg = <1>;
8829 + spi-max-frequency = <500000>;
8830 + status = "okay";
8831 + #interrupt-cells=<2>;
8832 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
8833 + };
8834 + };
8835 + };
8836 +
8837 + // enable one or more mcp23s17s on spi1.2
8838 + fragment@20 {
8839 + target = <&spi1>;
8840 + __dormant__ {
8841 + status = "okay";
8842 + #address-cells = <1>;
8843 + #size-cells = <0>;
8844 + mcp23s17_12: mcp23s17@2 {
8845 + compatible = "microchip,mcp23s17";
8846 + gpio-controller;
8847 + #gpio-cells = <2>;
8848 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
8849 + reg = <2>;
8850 + spi-max-frequency = <500000>;
8851 + status = "okay";
8852 + #interrupt-cells=<2>;
8853 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
8854 + };
8855 + };
8856 + };
8857 +
8858 + // enable one or more mcp23s17s on spi2.0
8859 + fragment@21 {
8860 + target = <&spi2>;
8861 + __dormant__ {
8862 + status = "okay";
8863 + #address-cells = <1>;
8864 + #size-cells = <0>;
8865 + mcp23s17_20: mcp23s17@0 {
8866 + compatible = "microchip,mcp23s17";
8867 + gpio-controller;
8868 + #gpio-cells = <2>;
8869 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
8870 + reg = <0>;
8871 + spi-max-frequency = <500000>;
8872 + status = "okay";
8873 + #interrupt-cells=<2>;
8874 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
8875 + };
8876 + };
8877 + };
8878 +
8879 + // enable one or more mcp23s17s on spi2.1
8880 + fragment@22 {
8881 + target = <&spi2>;
8882 + __dormant__ {
8883 + status = "okay";
8884 + #address-cells = <1>;
8885 + #size-cells = <0>;
8886 + mcp23s17_21: mcp23s17@1 {
8887 + compatible = "microchip,mcp23s17";
8888 + gpio-controller;
8889 + #gpio-cells = <2>;
8890 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
8891 + reg = <1>;
8892 + spi-max-frequency = <500000>;
8893 + status = "okay";
8894 + #interrupt-cells=<2>;
8895 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
8896 + };
8897 + };
8898 + };
8899 +
8900 + // enable one or more mcp23s17s on spi2.2
8901 + fragment@23 {
8902 + target = <&spi2>;
8903 + __dormant__ {
8904 + status = "okay";
8905 + #address-cells = <1>;
8906 + #size-cells = <0>;
8907 + mcp23s17_22: mcp23s17@2 {
8908 + compatible = "microchip,mcp23s17";
8909 + gpio-controller;
8910 + #gpio-cells = <2>;
8911 + microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
8912 + reg = <2>;
8913 + spi-max-frequency = <500000>;
8914 + status = "okay";
8915 + #interrupt-cells=<2>;
8916 + interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
8917 + };
8918 + };
8919 + };
8920 +
8921 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
8922 + fragment@24 {
8923 + target = <&gpio>;
8924 + __dormant__ {
8925 + spi0_0_int_pins: spi0_0_int_pins {
8926 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
8927 + brcm,function = <0>;
8928 + brcm,pull = <0>;
8929 + };
8930 + };
8931 + };
8932 +
8933 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
8934 + fragment@25 {
8935 + target = <&gpio>;
8936 + __dormant__ {
8937 + spi0_1_int_pins: spi0_1_int_pins {
8938 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
8939 + brcm,function = <0>;
8940 + brcm,pull = <0>;
8941 + };
8942 + };
8943 + };
8944 +
8945 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
8946 + fragment@26 {
8947 + target = <&gpio>;
8948 + __dormant__ {
8949 + spi1_0_int_pins: spi1_0_int_pins {
8950 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
8951 + brcm,function = <0>;
8952 + brcm,pull = <0>;
8953 + };
8954 + };
8955 + };
8956 +
8957 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
8958 + fragment@27 {
8959 + target = <&gpio>;
8960 + __dormant__ {
8961 + spi1_1_int_pins: spi1_1_int_pins {
8962 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
8963 + brcm,function = <0>;
8964 + brcm,pull = <0>;
8965 + };
8966 + };
8967 + };
8968 +
8969 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
8970 + fragment@28 {
8971 + target = <&gpio>;
8972 + __dormant__ {
8973 + spi1_2_int_pins: spi1_2_int_pins {
8974 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
8975 + brcm,function = <0>;
8976 + brcm,pull = <0>;
8977 + };
8978 + };
8979 + };
8980 +
8981 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
8982 + fragment@29 {
8983 + target = <&gpio>;
8984 + __dormant__ {
8985 + spi2_0_int_pins: spi2_0_int_pins {
8986 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
8987 + brcm,function = <0>;
8988 + brcm,pull = <0>;
8989 + };
8990 + };
8991 + };
8992 +
8993 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
8994 + fragment@30 {
8995 + target = <&gpio>;
8996 + __dormant__ {
8997 + spi2_1_int_pins: spi2_1_int_pins {
8998 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
8999 + brcm,function = <0>;
9000 + brcm,pull = <0>;
9001 + };
9002 + };
9003 + };
9004 +
9005 + // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
9006 + fragment@31 {
9007 + target = <&gpio>;
9008 + __dormant__ {
9009 + spi2_2_int_pins: spi2_2_int_pins {
9010 + brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
9011 + brcm,function = <0>;
9012 + brcm,pull = <0>;
9013 + };
9014 + };
9015 + };
9016 +
9017 + // Enable interrupts for a mcp23s08 on spi0.0.
9018 + // Use default active low interrupt signalling.
9019 + fragment@32 {
9020 + target = <&mcp23s08_00>;
9021 + __dormant__ {
9022 + interrupt-parent = <&gpio>;
9023 + interrupt-controller;
9024 + };
9025 + };
9026 +
9027 + // Enable interrupts for a mcp23s08 on spi0.1.
9028 + // Use default active low interrupt signalling.
9029 + fragment@33 {
9030 + target = <&mcp23s08_01>;
9031 + __dormant__ {
9032 + interrupt-parent = <&gpio>;
9033 + interrupt-controller;
9034 + };
9035 + };
9036 +
9037 + // Enable interrupts for a mcp23s08 on spi1.0.
9038 + // Use default active low interrupt signalling.
9039 + fragment@34 {
9040 + target = <&mcp23s08_10>;
9041 + __dormant__ {
9042 + interrupt-parent = <&gpio>;
9043 + interrupt-controller;
9044 + };
9045 + };
9046 +
9047 + // Enable interrupts for a mcp23s08 on spi1.1.
9048 + // Use default active low interrupt signalling.
9049 + fragment@35 {
9050 + target = <&mcp23s08_11>;
9051 + __dormant__ {
9052 + interrupt-parent = <&gpio>;
9053 + interrupt-controller;
9054 + };
9055 + };
9056 +
9057 + // Enable interrupts for a mcp23s08 on spi1.2.
9058 + // Use default active low interrupt signalling.
9059 + fragment@36 {
9060 + target = <&mcp23s08_12>;
9061 + __dormant__ {
9062 + interrupt-parent = <&gpio>;
9063 + interrupt-controller;
9064 + };
9065 + };
9066 +
9067 + // Enable interrupts for a mcp23s08 on spi2.0.
9068 + // Use default active low interrupt signalling.
9069 + fragment@37 {
9070 + target = <&mcp23s08_20>;
9071 + __dormant__ {
9072 + interrupt-parent = <&gpio>;
9073 + interrupt-controller;
9074 + };
9075 + };
9076 +
9077 + // Enable interrupts for a mcp23s08 on spi2.1.
9078 + // Use default active low interrupt signalling.
9079 + fragment@38 {
9080 + target = <&mcp23s08_21>;
9081 + __dormant__ {
9082 + interrupt-parent = <&gpio>;
9083 + interrupt-controller;
9084 + };
9085 + };
9086 +
9087 + // Enable interrupts for a mcp23s08 on spi2.2.
9088 + // Use default active low interrupt signalling.
9089 + fragment@39 {
9090 + target = <&mcp23s08_22>;
9091 + __dormant__ {
9092 + interrupt-parent = <&gpio>;
9093 + interrupt-controller;
9094 + };
9095 + };
9096 +
9097 + // Enable interrupts for a mcp23s17 on spi0.0.
9098 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9099 + // Use default active low interrupt signalling.
9100 + fragment@40 {
9101 + target = <&mcp23s17_00>;
9102 + __dormant__ {
9103 + interrupt-parent = <&gpio>;
9104 + interrupt-controller;
9105 + microchip,irq-mirror;
9106 + };
9107 + };
9108 +
9109 + // Enable interrupts for a mcp23s17 on spi0.1.
9110 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9111 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9112 + fragment@41 {
9113 + target = <&mcp23s17_01>;
9114 + __dormant__ {
9115 + interrupt-parent = <&gpio>;
9116 + interrupt-controller;
9117 + microchip,irq-mirror;
9118 + };
9119 + };
9120 +
9121 + // Enable interrupts for a mcp23s17 on spi1.0.
9122 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9123 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9124 + fragment@42 {
9125 + target = <&mcp23s17_10>;
9126 + __dormant__ {
9127 + interrupt-parent = <&gpio>;
9128 + interrupt-controller;
9129 + microchip,irq-mirror;
9130 + };
9131 + };
9132 +
9133 + // Enable interrupts for a mcp23s17 on spi1.1.
9134 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9135 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9136 + fragment@43 {
9137 + target = <&mcp23s17_11>;
9138 + __dormant__ {
9139 + interrupt-parent = <&gpio>;
9140 + interrupt-controller;
9141 + microchip,irq-mirror;
9142 + };
9143 + };
9144 +
9145 + // Enable interrupts for a mcp23s17 on spi1.2.
9146 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9147 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9148 + fragment@44 {
9149 + target = <&mcp23s17_12>;
9150 + __dormant__ {
9151 + interrupt-parent = <&gpio>;
9152 + interrupt-controller;
9153 + microchip,irq-mirror;
9154 + };
9155 + };
9156 +
9157 + // Enable interrupts for a mcp23s17 on spi2.0.
9158 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9159 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9160 + fragment@45 {
9161 + target = <&mcp23s17_20>;
9162 + __dormant__ {
9163 + interrupt-parent = <&gpio>;
9164 + interrupt-controller;
9165 + microchip,irq-mirror;
9166 + };
9167 + };
9168 +
9169 + // Enable interrupts for a mcp23s17 on spi2.1.
9170 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9171 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9172 + fragment@46 {
9173 + target = <&mcp23s17_21>;
9174 + __dormant__ {
9175 + interrupt-parent = <&gpio>;
9176 + interrupt-controller;
9177 + microchip,irq-mirror;
9178 + };
9179 + };
9180 +
9181 + // Enable interrupts for a mcp23s17 on spi2.2.
9182 + // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
9183 + // Configure INTA/B outputs of mcp23s08/17 as active low.
9184 + fragment@47 {
9185 + target = <&mcp23s17_22>;
9186 + __dormant__ {
9187 + interrupt-parent = <&gpio>;
9188 + interrupt-controller;
9189 + microchip,irq-mirror;
9190 + };
9191 + };
9192 +
9193 + __overrides__ {
9194 + s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
9195 + s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
9196 + s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
9197 + s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
9198 + s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
9199 + s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
9200 + s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
9201 + s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
9202 + s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
9203 + s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
9204 + s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
9205 + s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
9206 + s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
9207 + s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
9208 + s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
9209 + s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
9210 + s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
9211 + s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
9212 + s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
9213 + s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
9214 + s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
9215 + s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
9216 + s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
9217 + s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
9218 + s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
9219 + s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
9220 + s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
9221 + s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
9222 + s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
9223 + s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
9224 + s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
9225 + s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
9226 + };
9227 +};
9228 +
9229 --- /dev/null
9230 +++ b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
9231 @@ -0,0 +1,73 @@
9232 +/*
9233 + * Device tree overlay for mcp251x/can0 on spi0.0
9234 + */
9235 +
9236 +/dts-v1/;
9237 +/plugin/;
9238 +
9239 +/ {
9240 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
9241 + /* disable spi-dev for spi0.0 */
9242 + fragment@0 {
9243 + target = <&spi0>;
9244 + __overlay__ {
9245 + status = "okay";
9246 + };
9247 + };
9248 +
9249 + fragment@1 {
9250 + target = <&spidev0>;
9251 + __overlay__ {
9252 + status = "disabled";
9253 + };
9254 + };
9255 +
9256 + /* the interrupt pin of the can-controller */
9257 + fragment@2 {
9258 + target = <&gpio>;
9259 + __overlay__ {
9260 + can0_pins: can0_pins {
9261 + brcm,pins = <25>;
9262 + brcm,function = <0>; /* input */
9263 + };
9264 + };
9265 + };
9266 +
9267 + /* the clock/oscillator of the can-controller */
9268 + fragment@3 {
9269 + target-path = "/clocks";
9270 + __overlay__ {
9271 + /* external oscillator of mcp2515 on SPI0.0 */
9272 + can0_osc: can0_osc {
9273 + compatible = "fixed-clock";
9274 + #clock-cells = <0>;
9275 + clock-frequency = <16000000>;
9276 + };
9277 + };
9278 + };
9279 +
9280 + /* the spi config of the can-controller itself binding everything together */
9281 + fragment@4 {
9282 + target = <&spi0>;
9283 + __overlay__ {
9284 + /* needed to avoid dtc warning */
9285 + #address-cells = <1>;
9286 + #size-cells = <0>;
9287 + can0: mcp2515@0 {
9288 + reg = <0>;
9289 + compatible = "microchip,mcp2515";
9290 + pinctrl-names = "default";
9291 + pinctrl-0 = <&can0_pins>;
9292 + spi-max-frequency = <10000000>;
9293 + interrupt-parent = <&gpio>;
9294 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
9295 + clocks = <&can0_osc>;
9296 + };
9297 + };
9298 + };
9299 + __overrides__ {
9300 + oscillator = <&can0_osc>,"clock-frequency:0";
9301 + spimaxfrequency = <&can0>,"spi-max-frequency:0";
9302 + interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
9303 + };
9304 +};
9305 --- /dev/null
9306 +++ b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
9307 @@ -0,0 +1,73 @@
9308 +/*
9309 + * Device tree overlay for mcp251x/can1 on spi0.1 edited by petit_miner
9310 + */
9311 +
9312 +/dts-v1/;
9313 +/plugin/;
9314 +
9315 +/ {
9316 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
9317 + /* disable spi-dev for spi0.1 */
9318 + fragment@0 {
9319 + target = <&spi0>;
9320 + __overlay__ {
9321 + status = "okay";
9322 + };
9323 + };
9324 +
9325 + fragment@1 {
9326 + target = <&spidev1>;
9327 + __overlay__ {
9328 + status = "disabled";
9329 + };
9330 + };
9331 +
9332 + /* the interrupt pin of the can-controller */
9333 + fragment@2 {
9334 + target = <&gpio>;
9335 + __overlay__ {
9336 + can1_pins: can1_pins {
9337 + brcm,pins = <25>;
9338 + brcm,function = <0>; /* input */
9339 + };
9340 + };
9341 + };
9342 +
9343 + /* the clock/oscillator of the can-controller */
9344 + fragment@3 {
9345 + target-path = "/clocks";
9346 + __overlay__ {
9347 + /* external oscillator of mcp2515 on spi0.1 */
9348 + can1_osc: can1_osc {
9349 + compatible = "fixed-clock";
9350 + #clock-cells = <0>;
9351 + clock-frequency = <16000000>;
9352 + };
9353 + };
9354 + };
9355 +
9356 + /* the spi config of the can-controller itself binding everything together */
9357 + fragment@4 {
9358 + target = <&spi0>;
9359 + __overlay__ {
9360 + /* needed to avoid dtc warning */
9361 + #address-cells = <1>;
9362 + #size-cells = <0>;
9363 + can1: mcp2515@1 {
9364 + reg = <1>;
9365 + compatible = "microchip,mcp2515";
9366 + pinctrl-names = "default";
9367 + pinctrl-0 = <&can1_pins>;
9368 + spi-max-frequency = <10000000>;
9369 + interrupt-parent = <&gpio>;
9370 + interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
9371 + clocks = <&can1_osc>;
9372 + };
9373 + };
9374 + };
9375 + __overrides__ {
9376 + oscillator = <&can1_osc>,"clock-frequency:0";
9377 + spimaxfrequency = <&can1>,"spi-max-frequency:0";
9378 + interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0";
9379 + };
9380 +};
9381 --- /dev/null
9382 +++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
9383 @@ -0,0 +1,205 @@
9384 +/*
9385 + * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters
9386 + */
9387 +
9388 +/dts-v1/;
9389 +/plugin/;
9390 +
9391 +/ {
9392 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
9393 +
9394 + fragment@0 {
9395 + target = <&spidev0>;
9396 + __dormant__ {
9397 + status = "disabled";
9398 + };
9399 + };
9400 +
9401 + fragment@1 {
9402 + target = <&spidev1>;
9403 + __dormant__ {
9404 + status = "disabled";
9405 + };
9406 + };
9407 +
9408 + fragment@2 {
9409 + target-path = "spi1/spidev@0";
9410 + __dormant__ {
9411 + status = "disabled";
9412 + };
9413 + };
9414 +
9415 + fragment@3 {
9416 + target-path = "spi1/spidev@1";
9417 + __dormant__ {
9418 + status = "disabled";
9419 + };
9420 + };
9421 +
9422 + fragment@4 {
9423 + target-path = "spi1/spidev@2";
9424 + __dormant__ {
9425 + status = "disabled";
9426 + };
9427 + };
9428 +
9429 + fragment@5 {
9430 + target-path = "spi2/spidev@0";
9431 + __dormant__ {
9432 + status = "disabled";
9433 + };
9434 + };
9435 +
9436 + fragment@6 {
9437 + target-path = "spi2/spidev@1";
9438 + __dormant__ {
9439 + status = "disabled";
9440 + };
9441 + };
9442 +
9443 + fragment@7 {
9444 + target-path = "spi2/spidev@2";
9445 + __dormant__ {
9446 + status = "disabled";
9447 + };
9448 + };
9449 +
9450 + fragment@8 {
9451 + target = <&spi0>;
9452 + __dormant__ {
9453 + status = "okay";
9454 + #address-cells = <1>;
9455 + #size-cells = <0>;
9456 +
9457 + mcp3008_00: mcp3008@0 {
9458 + compatible = "mcp3008";
9459 + reg = <0>;
9460 + spi-max-frequency = <1600000>;
9461 + };
9462 + };
9463 + };
9464 +
9465 + fragment@9 {
9466 + target = <&spi0>;
9467 + __dormant__ {
9468 + status = "okay";
9469 + #address-cells = <1>;
9470 + #size-cells = <0>;
9471 +
9472 + mcp3008_01: mcp3008@1 {
9473 + compatible = "mcp3008";
9474 + reg = <1>;
9475 + spi-max-frequency = <1600000>;
9476 + };
9477 + };
9478 + };
9479 +
9480 + fragment@10 {
9481 + target = <&spi1>;
9482 + __dormant__ {
9483 + status = "okay";
9484 + #address-cells = <1>;
9485 + #size-cells = <0>;
9486 +
9487 + mcp3008_10: mcp3008@0 {
9488 + compatible = "mcp3008";
9489 + reg = <0>;
9490 + spi-max-frequency = <1600000>;
9491 + };
9492 + };
9493 + };
9494 +
9495 + fragment@11 {
9496 + target = <&spi1>;
9497 + __dormant__ {
9498 + status = "okay";
9499 + #address-cells = <1>;
9500 + #size-cells = <0>;
9501 +
9502 + mcp3008_11: mcp3008@1 {
9503 + compatible = "mcp3008";
9504 + reg = <1>;
9505 + spi-max-frequency = <1600000>;
9506 + };
9507 + };
9508 + };
9509 +
9510 + fragment@12 {
9511 + target = <&spi1>;
9512 + __dormant__ {
9513 + status = "okay";
9514 + #address-cells = <1>;
9515 + #size-cells = <0>;
9516 +
9517 + mcp3008_12: mcp3008@2 {
9518 + compatible = "mcp3008";
9519 + reg = <2>;
9520 + spi-max-frequency = <1600000>;
9521 + };
9522 + };
9523 + };
9524 +
9525 + fragment@13 {
9526 + target = <&spi2>;
9527 + __dormant__ {
9528 + status = "okay";
9529 + #address-cells = <1>;
9530 + #size-cells = <0>;
9531 +
9532 + mcp3008_20: mcp3008@0 {
9533 + compatible = "mcp3008";
9534 + reg = <0>;
9535 + spi-max-frequency = <1600000>;
9536 + };
9537 + };
9538 + };
9539 +
9540 + fragment@14 {
9541 + target = <&spi2>;
9542 + __dormant__ {
9543 + status = "okay";
9544 + #address-cells = <1>;
9545 + #size-cells = <0>;
9546 +
9547 + mcp3008_21: mcp3008@1 {
9548 + compatible = "mcp3008";
9549 + reg = <1>;
9550 + spi-max-frequency = <1600000>;
9551 + };
9552 + };
9553 + };
9554 +
9555 + fragment@15 {
9556 + target = <&spi2>;
9557 + __dormant__ {
9558 + status = "okay";
9559 + #address-cells = <1>;
9560 + #size-cells = <0>;
9561 +
9562 + mcp3008_22: mcp3008@2 {
9563 + compatible = "mcp3008";
9564 + reg = <2>;
9565 + spi-max-frequency = <1600000>;
9566 + };
9567 + };
9568 + };
9569 +
9570 + __overrides__ {
9571 + spi0-0-present = <0>, "+0+8";
9572 + spi0-1-present = <0>, "+1+9";
9573 + spi1-0-present = <0>, "+2+10";
9574 + spi1-1-present = <0>, "+3+11";
9575 + spi1-2-present = <0>, "+4+12";
9576 + spi2-0-present = <0>, "+5+13";
9577 + spi2-1-present = <0>, "+6+14";
9578 + spi2-2-present = <0>, "+7+15";
9579 + spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0";
9580 + spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0";
9581 + spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0";
9582 + spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0";
9583 + spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0";
9584 + spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0";
9585 + spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0";
9586 + spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0";
9587 + };
9588 +};
9589 --- /dev/null
9590 +++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
9591 @@ -0,0 +1,205 @@
9592 +/*
9593 + * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
9594 + */
9595 +
9596 +/dts-v1/;
9597 +/plugin/;
9598 +
9599 +/ {
9600 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
9601 +
9602 + fragment@0 {
9603 + target = <&spidev0>;
9604 + __dormant__ {
9605 + status = "disabled";
9606 + };
9607 + };
9608 +
9609 + fragment@1 {
9610 + target = <&spidev1>;
9611 + __dormant__ {
9612 + status = "disabled";
9613 + };
9614 + };
9615 +
9616 + fragment@2 {
9617 + target-path = "spi1/spidev@0";
9618 + __dormant__ {
9619 + status = "disabled";
9620 + };
9621 + };
9622 +
9623 + fragment@3 {
9624 + target-path = "spi1/spidev@1";
9625 + __dormant__ {
9626 + status = "disabled";
9627 + };
9628 + };
9629 +
9630 + fragment@4 {
9631 + target-path = "spi1/spidev@2";
9632 + __dormant__ {
9633 + status = "disabled";
9634 + };
9635 + };
9636 +
9637 + fragment@5 {
9638 + target-path = "spi2/spidev@0";
9639 + __dormant__ {
9640 + status = "disabled";
9641 + };
9642 + };
9643 +
9644 + fragment@6 {
9645 + target-path = "spi2/spidev@1";
9646 + __dormant__ {
9647 + status = "disabled";
9648 + };
9649 + };
9650 +
9651 + fragment@7 {
9652 + target-path = "spi2/spidev@2";
9653 + __dormant__ {
9654 + status = "disabled";
9655 + };
9656 + };
9657 +
9658 + fragment@8 {
9659 + target = <&spi0>;
9660 + __dormant__ {
9661 + status = "okay";
9662 + #address-cells = <1>;
9663 + #size-cells = <0>;
9664 +
9665 + mcp3202_00: mcp3202@0 {
9666 + compatible = "mcp3202";
9667 + reg = <0>;
9668 + spi-max-frequency = <1600000>;
9669 + };
9670 + };
9671 + };
9672 +
9673 + fragment@9 {
9674 + target = <&spi0>;
9675 + __dormant__ {
9676 + status = "okay";
9677 + #address-cells = <1>;
9678 + #size-cells = <0>;
9679 +
9680 + mcp3202_01: mcp3202@1 {
9681 + compatible = "mcp3202";
9682 + reg = <1>;
9683 + spi-max-frequency = <1600000>;
9684 + };
9685 + };
9686 + };
9687 +
9688 + fragment@10 {
9689 + target = <&spi1>;
9690 + __dormant__ {
9691 + status = "okay";
9692 + #address-cells = <1>;
9693 + #size-cells = <0>;
9694 +
9695 + mcp3202_10: mcp3202@0 {
9696 + compatible = "mcp3202";
9697 + reg = <0>;
9698 + spi-max-frequency = <1600000>;
9699 + };
9700 + };
9701 + };
9702 +
9703 + fragment@11 {
9704 + target = <&spi1>;
9705 + __dormant__ {
9706 + status = "okay";
9707 + #address-cells = <1>;
9708 + #size-cells = <0>;
9709 +
9710 + mcp3202_11: mcp3202@1 {
9711 + compatible = "mcp3202";
9712 + reg = <1>;
9713 + spi-max-frequency = <1600000>;
9714 + };
9715 + };
9716 + };
9717 +
9718 + fragment@12 {
9719 + target = <&spi1>;
9720 + __dormant__ {
9721 + status = "okay";
9722 + #address-cells = <1>;
9723 + #size-cells = <0>;
9724 +
9725 + mcp3202_12: mcp3202@2 {
9726 + compatible = "mcp3202";
9727 + reg = <2>;
9728 + spi-max-frequency = <1600000>;
9729 + };
9730 + };
9731 + };
9732 +
9733 + fragment@13 {
9734 + target = <&spi2>;
9735 + __dormant__ {
9736 + status = "okay";
9737 + #address-cells = <1>;
9738 + #size-cells = <0>;
9739 +
9740 + mcp3202_20: mcp3202@0 {
9741 + compatible = "mcp3202";
9742 + reg = <0>;
9743 + spi-max-frequency = <1600000>;
9744 + };
9745 + };
9746 + };
9747 +
9748 + fragment@14 {
9749 + target = <&spi2>;
9750 + __dormant__ {
9751 + status = "okay";
9752 + #address-cells = <1>;
9753 + #size-cells = <0>;
9754 +
9755 + mcp3202_21: mcp3202@1 {
9756 + compatible = "mcp3202";
9757 + reg = <1>;
9758 + spi-max-frequency = <1600000>;
9759 + };
9760 + };
9761 + };
9762 +
9763 + fragment@15 {
9764 + target = <&spi2>;
9765 + __dormant__ {
9766 + status = "okay";
9767 + #address-cells = <1>;
9768 + #size-cells = <0>;
9769 +
9770 + mcp3202_22: mcp3202@2 {
9771 + compatible = "mcp3202";
9772 + reg = <2>;
9773 + spi-max-frequency = <1600000>;
9774 + };
9775 + };
9776 + };
9777 +
9778 + __overrides__ {
9779 + spi0-0-present = <0>, "+0+8";
9780 + spi0-1-present = <0>, "+1+9";
9781 + spi1-0-present = <0>, "+2+10";
9782 + spi1-1-present = <0>, "+3+11";
9783 + spi1-2-present = <0>, "+4+12";
9784 + spi2-0-present = <0>, "+5+13";
9785 + spi2-1-present = <0>, "+6+14";
9786 + spi2-2-present = <0>, "+7+15";
9787 + spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
9788 + spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
9789 + spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
9790 + spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
9791 + spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
9792 + spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
9793 + spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
9794 + spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
9795 + };
9796 +};
9797 --- /dev/null
9798 +++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts
9799 @@ -0,0 +1,134 @@
9800 +/*
9801 + * Device Tree overlay for Media Center HAT by Pi Supply
9802 + *
9803 + */
9804 +
9805 +/dts-v1/;
9806 +/plugin/;
9807 +
9808 +/ {
9809 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
9810 +
9811 + fragment@0 {
9812 + target = <&spi0>;
9813 + __overlay__ {
9814 + status = "okay";
9815 +
9816 + spidev@0{
9817 + status = "disabled";
9818 + };
9819 +
9820 + spidev@1{
9821 + status = "disabled";
9822 + };
9823 + };
9824 + };
9825 +
9826 + fragment@1 {
9827 + target = <&gpio>;
9828 + __overlay__ {
9829 + rpi_display_pins: rpi_display_pins {
9830 + brcm,pins = <12 23 24 25>;
9831 + brcm,function = <1 1 1 0>; /* out out out in */
9832 + brcm,pull = <0 0 0 2>; /* - - - up */
9833 + };
9834 + };
9835 + };
9836 +
9837 + fragment@2 {
9838 + target = <&spi0>;
9839 + __overlay__ {
9840 + /* needed to avoid dtc warning */
9841 + #address-cells = <1>;
9842 + #size-cells = <0>;
9843 +
9844 + rpidisplay: rpi-display@0{
9845 + compatible = "ilitek,ili9341";
9846 + reg = <0>;
9847 + pinctrl-names = "default";
9848 + pinctrl-0 = <&rpi_display_pins>;
9849 +
9850 + spi-max-frequency = <32000000>;
9851 + rotate = <90>;
9852 + bgr;
9853 + fps = <30>;
9854 + buswidth = <8>;
9855 + reset-gpios = <&gpio 23 0>;
9856 + dc-gpios = <&gpio 24 0>;
9857 + led-gpios = <&gpio 12 1>;
9858 + debug = <0>;
9859 + };
9860 +
9861 + rpidisplay_ts: rpi-display-ts@1 {
9862 + compatible = "ti,ads7846";
9863 + reg = <1>;
9864 +
9865 + spi-max-frequency = <2000000>;
9866 + interrupts = <25 2>; /* high-to-low edge triggered */
9867 + interrupt-parent = <&gpio>;
9868 + pendown-gpio = <&gpio 25 0>;
9869 + ti,x-plate-ohms = /bits/ 16 <60>;
9870 + ti,pressure-max = /bits/ 16 <255>;
9871 + };
9872 + };
9873 + };
9874 +
9875 + fragment@3 {
9876 + target-path = "/";
9877 + __overlay__ {
9878 + lirc_rpi: lirc_rpi {
9879 + compatible = "rpi,lirc-rpi";
9880 + pinctrl-names = "default";
9881 + pinctrl-0 = <&lirc_pins>;
9882 + status = "okay";
9883 +
9884 + // Override autodetection of IR receiver circuit
9885 + // (0 = active high, 1 = active low, -1 = no override )
9886 + rpi,sense = <0xffffffff>;
9887 +
9888 + // Software carrier
9889 + // (0 = off, 1 = on)
9890 + rpi,softcarrier = <1>;
9891 +
9892 + // Invert output
9893 + // (0 = off, 1 = on)
9894 + rpi,invert = <0>;
9895 +
9896 + // Enable debugging messages
9897 + // (0 = off, 1 = on)
9898 + rpi,debug = <0>;
9899 + };
9900 + };
9901 + };
9902 +
9903 + fragment@4 {
9904 + target = <&gpio>;
9905 + __overlay__ {
9906 + lirc_pins: lirc_pins {
9907 + brcm,pins = <6 5>;
9908 + brcm,function = <1 0>; // out in
9909 + brcm,pull = <0 1>; // off down
9910 + };
9911 + };
9912 + };
9913 +
9914 + __overrides__ {
9915 + speed = <&rpidisplay>,"spi-max-frequency:0";
9916 + rotate = <&rpidisplay>,"rotate:0";
9917 + fps = <&rpidisplay>,"fps:0";
9918 + debug = <&rpidisplay>,"debug:0",
9919 + <&lirc_rpi>,"rpi,debug:0";
9920 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
9921 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
9922 + backlight = <&rpidisplay>,"led-gpios:4",
9923 + <&rpi_display_pins>,"brcm,pins:0";
9924 +
9925 + gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
9926 + gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
9927 + gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
9928 +
9929 + sense = <&lirc_rpi>,"rpi,sense:0";
9930 + softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
9931 + invert = <&lirc_rpi>,"rpi,invert:0";
9932 + };
9933 +};
9934 --- /dev/null
9935 +++ b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
9936 @@ -0,0 +1,36 @@
9937 +/dts-v1/;
9938 +/plugin/;
9939 +
9940 +#include <dt-bindings/clock/bcm2835.h>
9941 +
9942 +/*
9943 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
9944 + * baudrate. The real clock is 48MHz, which we scale so that requesting
9945 + * 38.4kHz results in an actual 31.25kHz.
9946 + *
9947 + * 48000000*38400/31250 = 58982400
9948 + */
9949 +
9950 +/{
9951 + compatible = "brcm,bcm2835";
9952 +
9953 + fragment@0 {
9954 + target-path = "/clocks";
9955 + __overlay__ {
9956 + midi_clk: midi_clk {
9957 + compatible = "fixed-clock";
9958 + #clock-cells = <0>;
9959 + clock-output-names = "uart0_pclk";
9960 + clock-frequency = <58982400>;
9961 + };
9962 + };
9963 + };
9964 +
9965 + fragment@1 {
9966 + target = <&uart0>;
9967 + __overlay__ {
9968 + clocks = <&midi_clk>,
9969 + <&clocks BCM2835_CLOCK_VPU>;
9970 + };
9971 + };
9972 +};
9973 --- /dev/null
9974 +++ b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
9975 @@ -0,0 +1,43 @@
9976 +/dts-v1/;
9977 +/plugin/;
9978 +
9979 +#include <dt-bindings/clock/bcm2835-aux.h>
9980 +
9981 +/*
9982 + * Fake a higher clock rate to get a larger divisor, and thereby a lower
9983 + * baudrate. The real clock is 48MHz, which we scale so that requesting
9984 + * 38.4kHz results in an actual 31.25kHz.
9985 + *
9986 + * 48000000*38400/31250 = 58982400
9987 + */
9988 +
9989 +/{
9990 + compatible = "brcm,bcm2835";
9991 +
9992 + fragment@0 {
9993 + target-path = "/clocks";
9994 + __overlay__ {
9995 + midi_clk: clock@5 {
9996 + compatible = "fixed-factor-clock";
9997 + #clock-cells = <0>;
9998 + clocks = <&aux BCM2835_AUX_CLOCK_UART>;
9999 + clock-mult = <38400>;
10000 + clock-div = <31250>;
10001 + };
10002 + };
10003 + };
10004 +
10005 + fragment@1 {
10006 + target = <&uart1>;
10007 + __overlay__ {
10008 + clocks = <&midi_clk>;
10009 + };
10010 + };
10011 +
10012 + fragment@2 {
10013 + target = <&aux>;
10014 + __overlay__ {
10015 + clock-output-names = "aux_uart", "aux_spi1", "aux_spi2";
10016 + };
10017 + };
10018 +};
10019 --- /dev/null
10020 +++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts
10021 @@ -0,0 +1,39 @@
10022 +/dts-v1/;
10023 +/plugin/;
10024 +
10025 +/{
10026 + compatible = "brcm,bcm2708";
10027 +
10028 + fragment@0 {
10029 + target = <&mmc>;
10030 + frag0: __overlay__ {
10031 + pinctrl-names = "default";
10032 + pinctrl-0 = <&mmc_pins>;
10033 + bus-width = <4>;
10034 + brcm,overclock-50 = <0>;
10035 + status = "okay";
10036 + };
10037 + };
10038 +
10039 + fragment@1 {
10040 + target = <&gpio>;
10041 + __overlay__ {
10042 + mmc_pins: mmc_pins {
10043 + brcm,pins = <48 49 50 51 52 53>;
10044 + brcm,function = <7>; /* alt3 */
10045 + brcm,pull = <0 2 2 2 2 2>;
10046 + };
10047 + };
10048 + };
10049 +
10050 + fragment@2 {
10051 + target = <&sdhost>;
10052 + __overlay__ {
10053 + status = "disabled";
10054 + };
10055 + };
10056 +
10057 + __overrides__ {
10058 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
10059 + };
10060 +};
10061 --- /dev/null
10062 +++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
10063 @@ -0,0 +1,28 @@
10064 +// Definitions for MPU6050
10065 +/dts-v1/;
10066 +/plugin/;
10067 +
10068 +/ {
10069 + compatible = "brcm,bcm2708";
10070 +
10071 + fragment@0 {
10072 + target = <&i2c1>;
10073 + __overlay__ {
10074 + #address-cells = <1>;
10075 + #size-cells = <0>;
10076 + status = "okay";
10077 + clock-frequency = <400000>;
10078 +
10079 + mpu6050: mpu6050@68 {
10080 + compatible = "invensense,mpu6050";
10081 + reg = <0x68>;
10082 + interrupt-parent = <&gpio>;
10083 + interrupts = <4 1>;
10084 + };
10085 + };
10086 + };
10087 +
10088 + __overrides__ {
10089 + interrupt = <&mpu6050>,"interrupts:0";
10090 + };
10091 +};
10092 --- /dev/null
10093 +++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
10094 @@ -0,0 +1,117 @@
10095 +/*
10096 + * Device Tree overlay for MZ61581-PI-EXT 2014.12.28 by Tontec
10097 + *
10098 + */
10099 +
10100 +/dts-v1/;
10101 +/plugin/;
10102 +
10103 +/ {
10104 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10105 +
10106 + fragment@0 {
10107 + target = <&spi0>;
10108 + __overlay__ {
10109 + status = "okay";
10110 + };
10111 + };
10112 +
10113 + fragment@1 {
10114 + target = <&spidev0>;
10115 + __overlay__ {
10116 + status = "disabled";
10117 + };
10118 + };
10119 +
10120 + fragment@2 {
10121 + target = <&spidev1>;
10122 + __overlay__ {
10123 + status = "disabled";
10124 + };
10125 + };
10126 +
10127 + fragment@3 {
10128 + target = <&gpio>;
10129 + __overlay__ {
10130 + mz61581_pins: mz61581_pins {
10131 + brcm,pins = <4 15 18 25>;
10132 + brcm,function = <0 1 1 1>; /* in out out out */
10133 + };
10134 + };
10135 + };
10136 +
10137 + fragment@4 {
10138 + target = <&spi0>;
10139 + __overlay__ {
10140 + /* needed to avoid dtc warning */
10141 + #address-cells = <1>;
10142 + #size-cells = <0>;
10143 +
10144 + mz61581: mz61581@0{
10145 + compatible = "samsung,s6d02a1";
10146 + reg = <0>;
10147 + pinctrl-names = "default";
10148 + pinctrl-0 = <&mz61581_pins>;
10149 +
10150 + spi-max-frequency = <128000000>;
10151 + spi-cpol;
10152 + spi-cpha;
10153 +
10154 + width = <320>;
10155 + height = <480>;
10156 + rotate = <270>;
10157 + bgr;
10158 + fps = <30>;
10159 + buswidth = <8>;
10160 + txbuflen = <32768>;
10161 +
10162 + reset-gpios = <&gpio 15 0>;
10163 + dc-gpios = <&gpio 25 0>;
10164 + led-gpios = <&gpio 18 0>;
10165 +
10166 + init = <0x10000b0 00
10167 + 0x1000011
10168 + 0x20000ff
10169 + 0x10000b3 0x02 0x00 0x00 0x00
10170 + 0x10000c0 0x13 0x3b 0x00 0x02 0x00 0x01 0x00 0x43
10171 + 0x10000c1 0x08 0x16 0x08 0x08
10172 + 0x10000c4 0x11 0x07 0x03 0x03
10173 + 0x10000c6 0x00
10174 + 0x10000c8 0x03 0x03 0x13 0x5c 0x03 0x07 0x14 0x08 0x00 0x21 0x08 0x14 0x07 0x53 0x0c 0x13 0x03 0x03 0x21 0x00
10175 + 0x1000035 0x00
10176 + 0x1000036 0xa0
10177 + 0x100003a 0x55
10178 + 0x1000044 0x00 0x01
10179 + 0x10000d0 0x07 0x07 0x1d 0x03
10180 + 0x10000d1 0x03 0x30 0x10
10181 + 0x10000d2 0x03 0x14 0x04
10182 + 0x1000029
10183 + 0x100002c>;
10184 +
10185 + /* This is a workaround to make sure the init sequence slows down and doesn't fail */
10186 + debug = <3>;
10187 + };
10188 +
10189 + mz61581_ts: mz61581_ts@1 {
10190 + compatible = "ti,ads7846";
10191 + reg = <1>;
10192 +
10193 + spi-max-frequency = <2000000>;
10194 + interrupts = <4 2>; /* high-to-low edge triggered */
10195 + interrupt-parent = <&gpio>;
10196 + pendown-gpio = <&gpio 4 0>;
10197 +
10198 + ti,x-plate-ohms = /bits/ 16 <60>;
10199 + ti,pressure-max = /bits/ 16 <255>;
10200 + };
10201 + };
10202 + };
10203 + __overrides__ {
10204 + speed = <&mz61581>, "spi-max-frequency:0";
10205 + rotate = <&mz61581>, "rotate:0";
10206 + fps = <&mz61581>, "fps:0";
10207 + txbuflen = <&mz61581>, "txbuflen:0";
10208 + debug = <&mz61581>, "debug:0";
10209 + xohms = <&mz61581_ts>,"ti,x-plate-ohms;0";
10210 + };
10211 +};
10212 --- /dev/null
10213 +++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts
10214 @@ -0,0 +1,89 @@
10215 +/* PaPiRus ePaper Screen by Pi Supply */
10216 +
10217 +/dts-v1/;
10218 +/plugin/;
10219 +
10220 +/ {
10221 + compatible = "brcm,bcm2708";
10222 +
10223 + fragment@0 {
10224 + target = <&i2c_arm>;
10225 + __overlay__ {
10226 + #address-cells = <1>;
10227 + #size-cells = <0>;
10228 + status = "okay";
10229 +
10230 + display_temp: lm75@48 {
10231 + compatible = "lm75b";
10232 + reg = <0x48>;
10233 + status = "okay";
10234 + #thermal-sensor-cells = <0>;
10235 + };
10236 + };
10237 + };
10238 +
10239 + fragment@1 {
10240 + target-path = "/";
10241 + __overlay__ {
10242 + thermal-zones {
10243 + display {
10244 + polling-delay-passive = <0>;
10245 + polling-delay = <0>;
10246 + thermal-sensors = <&display_temp>;
10247 + };
10248 + };
10249 + };
10250 + };
10251 +
10252 + fragment@2 {
10253 + target = <&spi0>;
10254 + __overlay__ {
10255 + status = "okay";
10256 +
10257 + spidev@0{
10258 + status = "disabled";
10259 + };
10260 + };
10261 + };
10262 +
10263 + fragment@3 {
10264 + target = <&gpio>;
10265 + __overlay__ {
10266 + repaper_pins: repaper_pins {
10267 + brcm,pins = <14 15 23 24 25>;
10268 + brcm,function = <1 1 1 1 0>; /* out out out out in */
10269 + };
10270 + };
10271 + };
10272 +
10273 + fragment@4 {
10274 + target = <&spi0>;
10275 + __overlay__ {
10276 + /* needed to avoid dtc warning */
10277 + #address-cells = <1>;
10278 + #size-cells = <0>;
10279 +
10280 + repaper: repaper@0{
10281 + compatible = "not_set";
10282 + reg = <0>;
10283 + pinctrl-names = "default";
10284 + pinctrl-0 = <&repaper_pins>;
10285 +
10286 + spi-max-frequency = <8000000>;
10287 +
10288 + panel-on-gpios = <&gpio 23 0>;
10289 + border-gpios = <&gpio 14 0>;
10290 + discharge-gpios = <&gpio 15 0>;
10291 + reset-gpios = <&gpio 24 0>;
10292 + busy-gpios = <&gpio 25 0>;
10293 +
10294 + repaper-thermal-zone = "display";
10295 + };
10296 + };
10297 + };
10298 +
10299 + __overrides__ {
10300 + panel = <&repaper>, "compatible";
10301 + speed = <&repaper>, "spi-max-frequency:0";
10302 + };
10303 +};
10304 --- /dev/null
10305 +++ b/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts
10306 @@ -0,0 +1,27 @@
10307 +/dts-v1/;
10308 +/plugin/;
10309 +
10310 +/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
10311 + from the VPU. There is a special driver for this with a separate DT node,
10312 + which has the unfortunate consequence of breaking the act_led_gpio and
10313 + act_led_activelow dtparams.
10314 +
10315 + This overlay changes the GPIO controller back to the standard one and
10316 + restores the dtparams.
10317 +*/
10318 +
10319 +/{
10320 + compatible = "brcm,bcm2708";
10321 +
10322 + fragment@0 {
10323 + target = <&act_led>;
10324 + frag0: __overlay__ {
10325 + gpios = <&gpio 0 0>;
10326 + };
10327 + };
10328 +
10329 + __overrides__ {
10330 + gpio = <&frag0>,"gpios:4";
10331 + activelow = <&frag0>,"gpios:8";
10332 + };
10333 +};
10334 --- /dev/null
10335 +++ b/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts
10336 @@ -0,0 +1,46 @@
10337 +/dts-v1/;
10338 +/plugin/;
10339 +
10340 +/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15.
10341 + To disable the systemd service that initialises the modem so it doesn't use
10342 + the UART:
10343 +
10344 + sudo systemctl disable hciuart
10345 +*/
10346 +
10347 +/{
10348 + compatible = "brcm,bcm2708";
10349 +
10350 + fragment@0 {
10351 + target = <&uart1>;
10352 + __overlay__ {
10353 + status = "disabled";
10354 + };
10355 + };
10356 +
10357 + fragment@1 {
10358 + target = <&uart0>;
10359 + __overlay__ {
10360 + pinctrl-names = "default";
10361 + pinctrl-0 = <&uart0_pins>;
10362 + status = "okay";
10363 + };
10364 + };
10365 +
10366 + fragment@2 {
10367 + target = <&uart0_pins>;
10368 + __overlay__ {
10369 + brcm,pins;
10370 + brcm,function;
10371 + brcm,pull;
10372 + };
10373 + };
10374 +
10375 + fragment@3 {
10376 + target-path = "/aliases";
10377 + __overlay__ {
10378 + serial0 = "/soc/serial@7e201000";
10379 + serial1 = "/soc/serial@7e215040";
10380 + };
10381 + };
10382 +};
10383 --- /dev/null
10384 +++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts
10385 @@ -0,0 +1,13 @@
10386 +/dts-v1/;
10387 +/plugin/;
10388 +
10389 +/{
10390 + compatible = "brcm,bcm2708";
10391 +
10392 + fragment@0 {
10393 + target = <&mmc>;
10394 + __overlay__ {
10395 + status = "disabled";
10396 + };
10397 + };
10398 +};
10399 --- /dev/null
10400 +++ b/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts
10401 @@ -0,0 +1,74 @@
10402 +/dts-v1/;
10403 +/plugin/;
10404 +
10405 +/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
10406 + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
10407 + usable baudrate.
10408 +
10409 + It is also necessary to edit /lib/systemd/system/hciuart.service and
10410 + replace ttyAMA0 with ttyS0, unless you have a system with udev rules
10411 + that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1
10412 + instead because it will always be correct.
10413 +
10414 + If cmdline.txt uses the alias serial0 to refer to the user-accessable port
10415 + then the firmware will replace with the appropriate port whether or not
10416 + this overlay is used.
10417 +*/
10418 +
10419 +/{
10420 + compatible = "brcm,bcm2708";
10421 +
10422 + fragment@0 {
10423 + target = <&uart0>;
10424 + __overlay__ {
10425 + pinctrl-names = "default";
10426 + pinctrl-0 = <&uart0_pins>;
10427 + status = "okay";
10428 + };
10429 + };
10430 +
10431 + fragment@1 {
10432 + target = <&uart1>;
10433 + __overlay__ {
10434 + pinctrl-names = "default";
10435 + pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>;
10436 + status = "okay";
10437 + };
10438 + };
10439 +
10440 + fragment@2 {
10441 + target = <&uart0_pins>;
10442 + __overlay__ {
10443 + brcm,pins;
10444 + brcm,function;
10445 + brcm,pull;
10446 + };
10447 + };
10448 +
10449 + fragment@3 {
10450 + target = <&uart1_pins>;
10451 + __overlay__ {
10452 + brcm,pins = <32 33>;
10453 + brcm,function = <2>; /* alt5=UART1 */
10454 + brcm,pull = <0 2>;
10455 + };
10456 + };
10457 +
10458 + fragment@4 {
10459 + target = <&gpio>;
10460 + __overlay__ {
10461 + fake_bt_cts: fake_bt_cts {
10462 + brcm,pins = <31>;
10463 + brcm,function = <1>; /* output */
10464 + };
10465 + };
10466 + };
10467 +
10468 + fragment@5 {
10469 + target-path = "/aliases";
10470 + __overlay__ {
10471 + serial0 = "/soc/serial@7e201000";
10472 + serial1 = "/soc/serial@7e215040";
10473 + };
10474 + };
10475 +};
10476 --- /dev/null
10477 +++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
10478 @@ -0,0 +1,81 @@
10479 +/dts-v1/;
10480 +/plugin/;
10481 +
10482 +/ {
10483 + compatible = "brcm,bcm2708";
10484 +
10485 + fragment@0 {
10486 + target-path = "/";
10487 + __overlay__ {
10488 + codec_out: spdif-transmitter {
10489 + #address-cells = <0>;
10490 + #size-cells = <0>;
10491 + #sound-dai-cells = <0>;
10492 + compatible = "linux,spdif-dit";
10493 + status = "okay";
10494 + };
10495 +
10496 + codec_in: card-codec {
10497 + #sound-dai-cells = <0>;
10498 + compatible = "invensense,ics43432";
10499 + status = "okay";
10500 + };
10501 + };
10502 + };
10503 +
10504 + fragment@1 {
10505 + target = <&i2s>;
10506 + __overlay__ {
10507 + #sound-dai-cells = <0>;
10508 + status = "okay";
10509 + };
10510 + };
10511 +
10512 + fragment@2 {
10513 + target = <&sound>;
10514 + snd: __overlay__ {
10515 + compatible = "simple-audio-card";
10516 + simple-audio-card,name = "PiBell";
10517 +
10518 + status="okay";
10519 +
10520 + capture_link: simple-audio-card,dai-link@0 {
10521 + format = "i2s";
10522 +
10523 + r_cpu_dai: cpu {
10524 + sound-dai = <&i2s>;
10525 +
10526 +/* example TDM slot configuration
10527 + dai-tdm-slot-num = <2>;
10528 + dai-tdm-slot-width = <32>;
10529 +*/
10530 + };
10531 +
10532 + r_codec_dai: codec {
10533 + sound-dai = <&codec_in>;
10534 + };
10535 + };
10536 +
10537 + playback_link: simple-audio-card,dai-link@1 {
10538 + format = "i2s";
10539 +
10540 + p_cpu_dai: cpu {
10541 + sound-dai = <&i2s>;
10542 +
10543 +/* example TDM slot configuration
10544 + dai-tdm-slot-num = <2>;
10545 + dai-tdm-slot-width = <32>;
10546 +*/
10547 + };
10548 +
10549 + p_codec_dai: codec {
10550 + sound-dai = <&codec_out>;
10551 + };
10552 + };
10553 + };
10554 + };
10555 +
10556 + __overrides__ {
10557 + alsaname = <&snd>, "simple-audio-card,name";
10558 + };
10559 +};
10560 --- /dev/null
10561 +++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
10562 @@ -0,0 +1,102 @@
10563 +/*
10564 + * Device Tree overlay for PiScreen 3.5" display shield by Ozzmaker
10565 + *
10566 + */
10567 +
10568 +/dts-v1/;
10569 +/plugin/;
10570 +
10571 +/ {
10572 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10573 +
10574 + fragment@0 {
10575 + target = <&spi0>;
10576 + __overlay__ {
10577 + status = "okay";
10578 + };
10579 + };
10580 +
10581 + fragment@1 {
10582 + target = <&spidev0>;
10583 + __overlay__ {
10584 + status = "disabled";
10585 + };
10586 + };
10587 +
10588 + fragment@2 {
10589 + target = <&spidev1>;
10590 + __overlay__ {
10591 + status = "disabled";
10592 + };
10593 + };
10594 +
10595 + fragment@3 {
10596 + target = <&gpio>;
10597 + __overlay__ {
10598 + piscreen_pins: piscreen_pins {
10599 + brcm,pins = <17 25 24 22>;
10600 + brcm,function = <0 1 1 1>; /* in out out out */
10601 + };
10602 + };
10603 + };
10604 +
10605 + fragment@4 {
10606 + target = <&spi0>;
10607 + __overlay__ {
10608 + /* needed to avoid dtc warning */
10609 + #address-cells = <1>;
10610 + #size-cells = <0>;
10611 +
10612 + piscreen: piscreen@0{
10613 + compatible = "ilitek,ili9486";
10614 + reg = <0>;
10615 + pinctrl-names = "default";
10616 + pinctrl-0 = <&piscreen_pins>;
10617 +
10618 + spi-max-frequency = <24000000>;
10619 + rotate = <270>;
10620 + bgr;
10621 + fps = <30>;
10622 + buswidth = <8>;
10623 + regwidth = <16>;
10624 + reset-gpios = <&gpio 25 0>;
10625 + dc-gpios = <&gpio 24 0>;
10626 + led-gpios = <&gpio 22 1>;
10627 + debug = <0>;
10628 +
10629 + init = <0x10000b0 0x00
10630 + 0x1000011
10631 + 0x20000ff
10632 + 0x100003a 0x55
10633 + 0x1000036 0x28
10634 + 0x10000c2 0x44
10635 + 0x10000c5 0x00 0x00 0x00 0x00
10636 + 0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
10637 + 0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
10638 + 0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
10639 + 0x1000011
10640 + 0x1000029>;
10641 + };
10642 +
10643 + piscreen_ts: piscreen-ts@1 {
10644 + compatible = "ti,ads7846";
10645 + reg = <1>;
10646 +
10647 + spi-max-frequency = <2000000>;
10648 + interrupts = <17 2>; /* high-to-low edge triggered */
10649 + interrupt-parent = <&gpio>;
10650 + pendown-gpio = <&gpio 17 0>;
10651 + ti,swap-xy;
10652 + ti,x-plate-ohms = /bits/ 16 <100>;
10653 + ti,pressure-max = /bits/ 16 <255>;
10654 + };
10655 + };
10656 + };
10657 + __overrides__ {
10658 + speed = <&piscreen>,"spi-max-frequency:0";
10659 + rotate = <&piscreen>,"rotate:0";
10660 + fps = <&piscreen>,"fps:0";
10661 + debug = <&piscreen>,"debug:0";
10662 + xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
10663 + };
10664 +};
10665 --- /dev/null
10666 +++ b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
10667 @@ -0,0 +1,106 @@
10668 + /*
10669 + * Device Tree overlay for PiScreen2 3.5" TFT with resistive touch by Ozzmaker.com
10670 + *
10671 + */
10672 +
10673 +/dts-v1/;
10674 +/plugin/;
10675 +
10676 +/ {
10677 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10678 +
10679 + fragment@0 {
10680 + target = <&spi0>;
10681 + __overlay__ {
10682 + status = "okay";
10683 + };
10684 + };
10685 +
10686 + fragment@1 {
10687 + target = <&spidev0>;
10688 + __overlay__ {
10689 + status = "disabled";
10690 + };
10691 + };
10692 +
10693 + fragment@2 {
10694 + target = <&spidev1>;
10695 + __overlay__ {
10696 + status = "disabled";
10697 + };
10698 + };
10699 +
10700 + fragment@3 {
10701 + target = <&gpio>;
10702 + __overlay__ {
10703 + piscreen2_pins: piscreen2_pins {
10704 + brcm,pins = <17 25 24 22>;
10705 + brcm,function = <0 1 1 1>; /* in out out out */
10706 + };
10707 + };
10708 + };
10709 +
10710 + fragment@4 {
10711 + target = <&spi0>;
10712 + __overlay__ {
10713 + /* needed to avoid dtc warning */
10714 + #address-cells = <1>;
10715 + #size-cells = <0>;
10716 +
10717 + piscreen2: piscreen2@0{
10718 + compatible = "ilitek,ili9486";
10719 + reg = <0>;
10720 + pinctrl-names = "default";
10721 + pinctrl-0 = <&piscreen2_pins>;
10722 + bgr;
10723 + spi-max-frequency = <64000000>;
10724 + rotate = <90>;
10725 + fps = <30>;
10726 + buswidth = <8>;
10727 + regwidth = <16>;
10728 + txbuflen = <32768>;
10729 + reset-gpios = <&gpio 25 0>;
10730 + dc-gpios = <&gpio 24 0>;
10731 + led-gpios = <&gpio 22 1>;
10732 + debug = <0>;
10733 +
10734 + init = <0x10000b0 0x00
10735 + 0x1000011
10736 + 0x20000ff
10737 + 0x100003a 0x55
10738 + 0x1000036 0x28
10739 + 0x10000c0 0x11 0x09
10740 + 0x10000c1 0x41
10741 + 0x10000c5 0x00 0x00 0x00 0x00
10742 + 0x10000b6 0x00 0x02
10743 + 0x10000f7 0xa9 0x51 0x2c 0x2
10744 + 0x10000be 0x00 0x04
10745 + 0x10000e9 0x00
10746 + 0x1000011
10747 + 0x1000029>;
10748 +
10749 + };
10750 +
10751 + piscreen2_ts: piscreen2-ts@1 {
10752 + compatible = "ti,ads7846";
10753 + reg = <1>;
10754 +
10755 + spi-max-frequency = <2000000>;
10756 + interrupts = <17 2>; /* high-to-low edge triggered */
10757 + interrupt-parent = <&gpio>;
10758 + pendown-gpio = <&gpio 17 0>;
10759 + ti,swap-xy;
10760 + ti,x-plate-ohms = /bits/ 16 <100>;
10761 + ti,pressure-max = /bits/ 16 <255>;
10762 + };
10763 + };
10764 + };
10765 + __overrides__ {
10766 + speed = <&piscreen2>,"spi-max-frequency:0";
10767 + rotate = <&piscreen2>,"rotate:0";
10768 + fps = <&piscreen2>,"fps:0";
10769 + debug = <&piscreen2>,"debug:0";
10770 + xohms = <&piscreen2_ts>,"ti,x-plate-ohms;0";
10771 + };
10772 +};
10773 +
10774 --- /dev/null
10775 +++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
10776 @@ -0,0 +1,120 @@
10777 +/*
10778 + * Pisound Linux kernel module.
10779 + * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound
10780 + *
10781 + * This program is free software; you can redistribute it and/or
10782 + * modify it under the terms of the GNU General Public License
10783 + * as published by the Free Software Foundation; version 2 of the
10784 + * License.
10785 + *
10786 + * This program is distributed in the hope that it will be useful,
10787 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
10788 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10789 + * GNU General Public License for more details.
10790 + *
10791 + * You should have received a copy of the GNU General Public License
10792 + * along with this program; if not, write to the Free Software
10793 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
10794 + */
10795 +
10796 +/dts-v1/;
10797 +/plugin/;
10798 +
10799 +#include <dt-bindings/gpio/gpio.h>
10800 +
10801 +/ {
10802 + compatible = "brcm,bcm2708";
10803 +
10804 + fragment@0 {
10805 + target = <&spi0>;
10806 + __overlay__ {
10807 + status = "okay";
10808 + };
10809 + };
10810 +
10811 + fragment@1 {
10812 + target = <&spidev0>;
10813 + __overlay__ {
10814 + status = "disabled";
10815 + };
10816 + };
10817 +
10818 + fragment@2 {
10819 + target = <&spidev1>;
10820 + __overlay__ {
10821 + status = "okay";
10822 + };
10823 + };
10824 +
10825 + fragment@3 {
10826 + target = <&spi0>;
10827 + __overlay__ {
10828 + #address-cells = <1>;
10829 + #size-cells = <0>;
10830 +
10831 + pisound_spi: pisound_spi@0{
10832 + compatible = "blokaslabs,pisound-spi";
10833 + reg = <0>;
10834 + pinctrl-names = "default";
10835 + pinctrl-0 = <&spi0_pins>;
10836 + spi-max-frequency = <1000000>;
10837 + };
10838 + };
10839 + };
10840 +
10841 + fragment@4 {
10842 + target-path = "/";
10843 + __overlay__ {
10844 + pcm5102a-codec {
10845 + #sound-dai-cells = <0>;
10846 + compatible = "ti,pcm5102a";
10847 + status = "okay";
10848 + };
10849 + };
10850 + };
10851 +
10852 + fragment@5 {
10853 + target = <&sound>;
10854 + __overlay__ {
10855 + compatible = "blokaslabs,pisound";
10856 + i2s-controller = <&i2s>;
10857 + status = "okay";
10858 +
10859 + pinctrl-0 = <&pisound_button_pins>;
10860 +
10861 + osr-gpios =
10862 + <&gpio 13 GPIO_ACTIVE_HIGH>,
10863 + <&gpio 26 GPIO_ACTIVE_HIGH>,
10864 + <&gpio 16 GPIO_ACTIVE_HIGH>;
10865 +
10866 + reset-gpios =
10867 + <&gpio 12 GPIO_ACTIVE_HIGH>,
10868 + <&gpio 24 GPIO_ACTIVE_HIGH>;
10869 +
10870 + data_available-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
10871 +
10872 + button-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
10873 + };
10874 + };
10875 +
10876 + fragment@6 {
10877 + target = <&gpio>;
10878 + __overlay__ {
10879 + pinctrl-names = "default";
10880 + pinctrl-0 = <&pisound_button_pins>;
10881 +
10882 + pisound_button_pins: pisound_button_pins {
10883 + brcm,pins = <17>;
10884 + brcm,function = <0>; // Input
10885 + brcm,pull = <2>; // Pull-Up
10886 + };
10887 + };
10888 + };
10889 +
10890 + fragment@7 {
10891 + target = <&i2s>;
10892 + __overlay__ {
10893 + status = "okay";
10894 + };
10895 + };
10896 +};
10897 --- /dev/null
10898 +++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
10899 @@ -0,0 +1,69 @@
10900 +/*
10901 + * Device Tree overlay for pitft by Adafruit
10902 + *
10903 + */
10904 +
10905 +/dts-v1/;
10906 +/plugin/;
10907 +
10908 +/ {
10909 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10910 +
10911 + fragment@0 {
10912 + target = <&spi0>;
10913 + __overlay__ {
10914 + status = "okay";
10915 +
10916 + spidev@0{
10917 + status = "disabled";
10918 + };
10919 +
10920 + spidev@1{
10921 + status = "disabled";
10922 + };
10923 + };
10924 + };
10925 +
10926 + fragment@1 {
10927 + target = <&gpio>;
10928 + __overlay__ {
10929 + pitft_pins: pitft_pins {
10930 + brcm,pins = <25>;
10931 + brcm,function = <1>; /* out */
10932 + brcm,pull = <0>; /* none */
10933 + };
10934 + };
10935 + };
10936 +
10937 + fragment@2 {
10938 + target = <&spi0>;
10939 + __overlay__ {
10940 + /* needed to avoid dtc warning */
10941 + #address-cells = <1>;
10942 + #size-cells = <0>;
10943 +
10944 + pitft: pitft@0{
10945 + compatible = "ilitek,ili9340";
10946 + reg = <0>;
10947 + pinctrl-names = "default";
10948 + pinctrl-0 = <&pitft_pins>;
10949 +
10950 + spi-max-frequency = <32000000>;
10951 + rotate = <90>;
10952 + fps = <25>;
10953 + bgr;
10954 + buswidth = <8>;
10955 + dc-gpios = <&gpio 25 0>;
10956 + debug = <0>;
10957 + };
10958 +
10959 + };
10960 + };
10961 +
10962 + __overrides__ {
10963 + speed = <&pitft>,"spi-max-frequency:0";
10964 + rotate = <&pitft>,"rotate:0";
10965 + fps = <&pitft>,"fps:0";
10966 + debug = <&pitft>,"debug:0";
10967 + };
10968 +};
10969 --- /dev/null
10970 +++ b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
10971 @@ -0,0 +1,91 @@
10972 +/*
10973 + * Device Tree overlay for Adafruit PiTFT 2.8" capacitive touch screen
10974 + *
10975 + */
10976 +
10977 +/dts-v1/;
10978 +/plugin/;
10979 +
10980 +/ {
10981 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
10982 +
10983 + fragment@0 {
10984 + target = <&spi0>;
10985 + __overlay__ {
10986 + status = "okay";
10987 + };
10988 + };
10989 +
10990 + fragment@1 {
10991 + target = <&spidev0>;
10992 + __overlay__ {
10993 + status = "disabled";
10994 + };
10995 + };
10996 +
10997 + fragment@2 {
10998 + target = <&gpio>;
10999 + __overlay__ {
11000 + pitft_pins: pitft_pins {
11001 + brcm,pins = <24 25>;
11002 + brcm,function = <0 1>; /* in out */
11003 + brcm,pull = <2 0>; /* pullup none */
11004 + };
11005 + };
11006 + };
11007 +
11008 + fragment@3 {
11009 + target = <&spi0>;
11010 + __overlay__ {
11011 + /* needed to avoid dtc warning */
11012 + #address-cells = <1>;
11013 + #size-cells = <0>;
11014 +
11015 + pitft: pitft@0{
11016 + compatible = "ilitek,ili9340";
11017 + reg = <0>;
11018 + pinctrl-names = "default";
11019 + pinctrl-0 = <&pitft_pins>;
11020 +
11021 + spi-max-frequency = <32000000>;
11022 + rotate = <90>;
11023 + fps = <25>;
11024 + bgr;
11025 + buswidth = <8>;
11026 + dc-gpios = <&gpio 25 0>;
11027 + debug = <0>;
11028 + };
11029 + };
11030 + };
11031 +
11032 + fragment@4 {
11033 + target = <&i2c1>;
11034 + __overlay__ {
11035 + /* needed to avoid dtc warning */
11036 + #address-cells = <1>;
11037 + #size-cells = <0>;
11038 +
11039 + ft6236: ft6236@38 {
11040 + compatible = "focaltech,ft6236";
11041 + reg = <0x38>;
11042 +
11043 + interrupt-parent = <&gpio>;
11044 + interrupts = <24 2>;
11045 + touchscreen-size-x = <240>;
11046 + touchscreen-size-y = <320>;
11047 + };
11048 + };
11049 + };
11050 +
11051 + __overrides__ {
11052 + speed = <&pitft>,"spi-max-frequency:0";
11053 + rotate = <&pitft>,"rotate:0";
11054 + fps = <&pitft>,"fps:0";
11055 + debug = <&pitft>,"debug:0";
11056 + touch-sizex = <&ft6236>,"touchscreen-size-x?";
11057 + touch-sizey = <&ft6236>,"touchscreen-size-y?";
11058 + touch-invx = <&ft6236>,"touchscreen-inverted-x?";
11059 + touch-invy = <&ft6236>,"touchscreen-inverted-y?";
11060 + touch-swapxy = <&ft6236>,"touchscreen-swapped-x-y?";
11061 + };
11062 +};
11063 --- /dev/null
11064 +++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
11065 @@ -0,0 +1,121 @@
11066 +/*
11067 + * Device Tree overlay for Adafruit PiTFT 2.8" resistive touch screen
11068 + *
11069 + */
11070 +
11071 +/dts-v1/;
11072 +/plugin/;
11073 +
11074 +/ {
11075 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11076 +
11077 + fragment@0 {
11078 + target = <&spi0>;
11079 + __overlay__ {
11080 + status = "okay";
11081 + };
11082 + };
11083 +
11084 + fragment@1 {
11085 + target = <&spidev0>;
11086 + __overlay__ {
11087 + status = "disabled";
11088 + };
11089 + };
11090 +
11091 + fragment@2 {
11092 + target = <&spidev1>;
11093 + __overlay__ {
11094 + status = "disabled";
11095 + };
11096 + };
11097 +
11098 + fragment@3 {
11099 + target = <&gpio>;
11100 + __overlay__ {
11101 + pitft_pins: pitft_pins {
11102 + brcm,pins = <24 25>;
11103 + brcm,function = <0 1>; /* in out */
11104 + brcm,pull = <2 0>; /* pullup none */
11105 + };
11106 + };
11107 + };
11108 +
11109 + fragment@4 {
11110 + target = <&spi0>;
11111 + __overlay__ {
11112 + /* needed to avoid dtc warning */
11113 + #address-cells = <1>;
11114 + #size-cells = <0>;
11115 +
11116 + pitft: pitft@0{
11117 + compatible = "ilitek,ili9340";
11118 + reg = <0>;
11119 + pinctrl-names = "default";
11120 + pinctrl-0 = <&pitft_pins>;
11121 +
11122 + spi-max-frequency = <32000000>;
11123 + rotate = <90>;
11124 + fps = <25>;
11125 + bgr;
11126 + buswidth = <8>;
11127 + dc-gpios = <&gpio 25 0>;
11128 + debug = <0>;
11129 + };
11130 +
11131 + pitft_ts@1 {
11132 + #address-cells = <1>;
11133 + #size-cells = <0>;
11134 + compatible = "st,stmpe610";
11135 + reg = <1>;
11136 +
11137 + spi-max-frequency = <500000>;
11138 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
11139 + interrupts = <24 2>; /* high-to-low edge triggered */
11140 + interrupt-parent = <&gpio>;
11141 + interrupt-controller;
11142 +
11143 + stmpe_touchscreen {
11144 + compatible = "st,stmpe-ts";
11145 + st,sample-time = <4>;
11146 + st,mod-12b = <1>;
11147 + st,ref-sel = <0>;
11148 + st,adc-freq = <2>;
11149 + st,ave-ctrl = <3>;
11150 + st,touch-det-delay = <4>;
11151 + st,settling = <2>;
11152 + st,fraction-z = <7>;
11153 + st,i-drive = <0>;
11154 + };
11155 +
11156 + stmpe_gpio: stmpe_gpio {
11157 + #gpio-cells = <2>;
11158 + compatible = "st,stmpe-gpio";
11159 + /*
11160 + * only GPIO2 is wired/available
11161 + * and it is wired to the backlight
11162 + */
11163 + st,norequest-mask = <0x7b>;
11164 + };
11165 + };
11166 + };
11167 + };
11168 +
11169 + fragment@5 {
11170 + target-path = "/soc";
11171 + __overlay__ {
11172 + backlight {
11173 + compatible = "gpio-backlight";
11174 + gpios = <&stmpe_gpio 2 0>;
11175 + default-on;
11176 + };
11177 + };
11178 + };
11179 +
11180 + __overrides__ {
11181 + speed = <&pitft>,"spi-max-frequency:0";
11182 + rotate = <&pitft>,"rotate:0";
11183 + fps = <&pitft>,"fps:0";
11184 + debug = <&pitft>,"debug:0";
11185 + };
11186 +};
11187 --- /dev/null
11188 +++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
11189 @@ -0,0 +1,121 @@
11190 +/*
11191 + * Device Tree overlay for Adafruit PiTFT 3.5" resistive touch screen
11192 + *
11193 + */
11194 +
11195 +/dts-v1/;
11196 +/plugin/;
11197 +
11198 +/ {
11199 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11200 +
11201 + fragment@0 {
11202 + target = <&spi0>;
11203 + __overlay__ {
11204 + status = "okay";
11205 + };
11206 + };
11207 +
11208 + fragment@1 {
11209 + target = <&spidev0>;
11210 + __overlay__ {
11211 + status = "disabled";
11212 + };
11213 + };
11214 +
11215 + fragment@2 {
11216 + target = <&spidev1>;
11217 + __overlay__ {
11218 + status = "disabled";
11219 + };
11220 + };
11221 +
11222 + fragment@3 {
11223 + target = <&gpio>;
11224 + __overlay__ {
11225 + pitft_pins: pitft_pins {
11226 + brcm,pins = <24 25>;
11227 + brcm,function = <0 1>; /* in out */
11228 + brcm,pull = <2 0>; /* pullup none */
11229 + };
11230 + };
11231 + };
11232 +
11233 + fragment@4 {
11234 + target = <&spi0>;
11235 + __overlay__ {
11236 + /* needed to avoid dtc warning */
11237 + #address-cells = <1>;
11238 + #size-cells = <0>;
11239 +
11240 + pitft: pitft@0{
11241 + compatible = "himax,hx8357d";
11242 + reg = <0>;
11243 + pinctrl-names = "default";
11244 + pinctrl-0 = <&pitft_pins>;
11245 +
11246 + spi-max-frequency = <32000000>;
11247 + rotate = <90>;
11248 + fps = <25>;
11249 + bgr;
11250 + buswidth = <8>;
11251 + dc-gpios = <&gpio 25 0>;
11252 + debug = <0>;
11253 + };
11254 +
11255 + pitft_ts@1 {
11256 + #address-cells = <1>;
11257 + #size-cells = <0>;
11258 + compatible = "st,stmpe610";
11259 + reg = <1>;
11260 +
11261 + spi-max-frequency = <500000>;
11262 + irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
11263 + interrupts = <24 2>; /* high-to-low edge triggered */
11264 + interrupt-parent = <&gpio>;
11265 + interrupt-controller;
11266 +
11267 + stmpe_touchscreen {
11268 + compatible = "st,stmpe-ts";
11269 + st,sample-time = <4>;
11270 + st,mod-12b = <1>;
11271 + st,ref-sel = <0>;
11272 + st,adc-freq = <2>;
11273 + st,ave-ctrl = <3>;
11274 + st,touch-det-delay = <4>;
11275 + st,settling = <2>;
11276 + st,fraction-z = <7>;
11277 + st,i-drive = <0>;
11278 + };
11279 +
11280 + stmpe_gpio: stmpe_gpio {
11281 + #gpio-cells = <2>;
11282 + compatible = "st,stmpe-gpio";
11283 + /*
11284 + * only GPIO2 is wired/available
11285 + * and it is wired to the backlight
11286 + */
11287 + st,norequest-mask = <0x7b>;
11288 + };
11289 + };
11290 + };
11291 + };
11292 +
11293 + fragment@5 {
11294 + target-path = "/soc";
11295 + __overlay__ {
11296 + backlight {
11297 + compatible = "gpio-backlight";
11298 + gpios = <&stmpe_gpio 2 0>;
11299 + default-on;
11300 + };
11301 + };
11302 + };
11303 +
11304 + __overrides__ {
11305 + speed = <&pitft>,"spi-max-frequency:0";
11306 + rotate = <&pitft>,"rotate:0";
11307 + fps = <&pitft>,"fps:0";
11308 + debug = <&pitft>,"debug:0";
11309 + };
11310 +};
11311 --- /dev/null
11312 +++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
11313 @@ -0,0 +1,38 @@
11314 +/dts-v1/;
11315 +/plugin/;
11316 +
11317 +/ {
11318 + compatible = "brcm,bcm2708";
11319 + fragment@0 {
11320 + target-path = "/";
11321 + __overlay__ {
11322 + pps: pps@12 {
11323 + compatible = "pps-gpio";
11324 + pinctrl-names = "default";
11325 + pinctrl-0 = <&pps_pins>;
11326 + gpios = <&gpio 18 0>;
11327 + status = "okay";
11328 + };
11329 + };
11330 + };
11331 +
11332 + fragment@1 {
11333 + target = <&gpio>;
11334 + __overlay__ {
11335 + pps_pins: pps_pins@12 {
11336 + brcm,pins = <18>;
11337 + brcm,function = <0>; // in
11338 + brcm,pull = <0>; // off
11339 + };
11340 + };
11341 + };
11342 +
11343 + __overrides__ {
11344 + gpiopin = <&pps>,"gpios:4",
11345 + <&pps>,"reg:0",
11346 + <&pps_pins>,"brcm,pins:0",
11347 + <&pps_pins>,"reg:0";
11348 + assert_falling_edge = <&pps>,"assert-falling-edge?";
11349 + capture_clear = <&pps>,"capture-clear?";
11350 + };
11351 +};
11352 --- /dev/null
11353 +++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
11354 @@ -0,0 +1,47 @@
11355 +/dts-v1/;
11356 +/plugin/;
11357 +
11358 +/*
11359 +This is the 2-channel overlay - only use it if you need both channels.
11360 +
11361 +Legal pin,function combinations for each channel:
11362 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
11363 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
11364 +
11365 +N.B.:
11366 + 1) Pin 18 is the only one available on all platforms, and
11367 + it is the one used by the I2S audio interface.
11368 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
11369 + 2) The onboard analogue audio output uses both PWM channels.
11370 + 3) So be careful mixing audio and PWM.
11371 +*/
11372 +
11373 +/ {
11374 + fragment@0 {
11375 + target = <&gpio>;
11376 + __overlay__ {
11377 + pwm_pins: pwm_pins {
11378 + brcm,pins = <18 19>;
11379 + brcm,function = <2 2>; /* Alt5 */
11380 + };
11381 + };
11382 + };
11383 +
11384 + fragment@1 {
11385 + target = <&pwm>;
11386 + frag1: __overlay__ {
11387 + pinctrl-names = "default";
11388 + pinctrl-0 = <&pwm_pins>;
11389 + assigned-clock-rates = <100000000>;
11390 + status = "okay";
11391 + };
11392 + };
11393 +
11394 + __overrides__ {
11395 + pin = <&pwm_pins>,"brcm,pins:0";
11396 + pin2 = <&pwm_pins>,"brcm,pins:4";
11397 + func = <&pwm_pins>,"brcm,function:0";
11398 + func2 = <&pwm_pins>,"brcm,function:4";
11399 + clock = <&frag1>,"assigned-clock-rates:0";
11400 + };
11401 +};
11402 --- /dev/null
11403 +++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
11404 @@ -0,0 +1,40 @@
11405 +/dts-v1/;
11406 +/plugin/;
11407 +
11408 +/ {
11409 + compatible = "brcm,bcm2708";
11410 +
11411 + fragment@0 {
11412 + target = <&gpio>;
11413 + __overlay__ {
11414 + pwm0_pins: pwm0_pins {
11415 + brcm,pins = <18>;
11416 + brcm,function = <2>; /* Alt5 */
11417 + };
11418 + };
11419 + };
11420 +
11421 + fragment@1 {
11422 + target = <&pwm>;
11423 + __overlay__ {
11424 + pinctrl-names = "default";
11425 + pinctrl-0 = <&pwm0_pins>;
11426 + status = "okay";
11427 + };
11428 + };
11429 +
11430 + fragment@2 {
11431 + target-path = "/";
11432 + __overlay__ {
11433 + pwm-ir-transmitter {
11434 + compatible = "pwm-ir-tx";
11435 + pwms = <&pwm 0 100>;
11436 + };
11437 + };
11438 + };
11439 +
11440 + __overrides__ {
11441 + gpio_pin = <&pwm0_pins>, "brcm,pins:0";
11442 + func = <&pwm0_pins>,"brcm,function:0";
11443 + };
11444 +};
11445 --- /dev/null
11446 +++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts
11447 @@ -0,0 +1,43 @@
11448 +/dts-v1/;
11449 +/plugin/;
11450 +
11451 +/*
11452 +Legal pin,function combinations for each channel:
11453 + PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
11454 + PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
11455 +
11456 +N.B.:
11457 + 1) Pin 18 is the only one available on all platforms, and
11458 + it is the one used by the I2S audio interface.
11459 + Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
11460 + 2) The onboard analogue audio output uses both PWM channels.
11461 + 3) So be careful mixing audio and PWM.
11462 +*/
11463 +
11464 +/ {
11465 + fragment@0 {
11466 + target = <&gpio>;
11467 + __overlay__ {
11468 + pwm_pins: pwm_pins {
11469 + brcm,pins = <18>;
11470 + brcm,function = <2>; /* Alt5 */
11471 + };
11472 + };
11473 + };
11474 +
11475 + fragment@1 {
11476 + target = <&pwm>;
11477 + frag1: __overlay__ {
11478 + pinctrl-names = "default";
11479 + pinctrl-0 = <&pwm_pins>;
11480 + assigned-clock-rates = <100000000>;
11481 + status = "okay";
11482 + };
11483 + };
11484 +
11485 + __overrides__ {
11486 + pin = <&pwm_pins>,"brcm,pins:0";
11487 + func = <&pwm_pins>,"brcm,function:0";
11488 + clock = <&frag1>,"assigned-clock-rates:0";
11489 + };
11490 +};
11491 --- /dev/null
11492 +++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
11493 @@ -0,0 +1,52 @@
11494 +// Overlay for the Qualcomm Atheros QCA7000 on I2SE's PLC Stamp micro EVK
11495 +// Visit: https://www.i2se.com/product/plc-stamp-micro-evk for details
11496 +
11497 +/dts-v1/;
11498 +/plugin/;
11499 +
11500 +/ {
11501 + compatible = "brcm,bcm2708";
11502 +
11503 + fragment@0 {
11504 + target = <&spi0>;
11505 + __overlay__ {
11506 + /* needed to avoid dtc warning */
11507 + #address-cells = <1>;
11508 + #size-cells = <0>;
11509 +
11510 + status = "okay";
11511 +
11512 + spidev@0 {
11513 + status = "disabled";
11514 + };
11515 +
11516 + eth1: qca7000@0 {
11517 + compatible = "qca,qca7000";
11518 + reg = <0>; /* CE0 */
11519 + pinctrl-names = "default";
11520 + pinctrl-0 = <&eth1_pins>;
11521 + interrupt-parent = <&gpio>;
11522 + interrupts = <23 0x1>; /* rising edge */
11523 + spi-max-frequency = <12000000>;
11524 + status = "okay";
11525 + };
11526 + };
11527 + };
11528 +
11529 + fragment@1 {
11530 + target = <&gpio>;
11531 + __overlay__ {
11532 + eth1_pins: eth1_pins {
11533 + brcm,pins = <23>;
11534 + brcm,function = <0>; /* in */
11535 + brcm,pull = <0>; /* none */
11536 + };
11537 + };
11538 + };
11539 +
11540 + __overrides__ {
11541 + int_pin = <&eth1>, "interrupts:0",
11542 + <&eth1_pins>, "brcm,pins:0";
11543 + speed = <&eth1>, "spi-max-frequency:0";
11544 + };
11545 +};
11546 --- /dev/null
11547 +++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
11548 @@ -0,0 +1,59 @@
11549 +// Device tree overlay for GPIO connected rotary encoder.
11550 +/dts-v1/;
11551 +/plugin/;
11552 +
11553 +/ {
11554 + compatible = "brcm,bcm2708";
11555 +
11556 + fragment@0 {
11557 + target = <&gpio>;
11558 + __overlay__ {
11559 + rotary_pins: rotary_pins@4 {
11560 + brcm,pins = <4 17>; /* gpio 4 17 */
11561 + brcm,function = <0 0>; /* input */
11562 + brcm,pull = <2 2>; /* pull-up */
11563 + };
11564 +
11565 + };
11566 + };
11567 +
11568 + fragment@1 {
11569 + target-path = "/";
11570 + __overlay__ {
11571 + rotary: rotary@4 {
11572 + compatible = "rotary-encoder";
11573 + status = "okay";
11574 + pinctrl-names = "default";
11575 + pinctrl-0 = <&rotary_pins>;
11576 + gpios = <&gpio 4 0>, <&gpio 17 0>;
11577 + linux,axis = <0>; /* REL_X */
11578 + rotary-encoder,encoding = "gray";
11579 + rotary-encoder,steps = <24>; /* 24 default */
11580 + rotary-encoder,steps-per-period = <1>; /* corresponds to full period mode. See README */
11581 + };
11582 + };
11583 +
11584 + };
11585 +
11586 + __overrides__ {
11587 + pin_a = <&rotary>,"gpios:4",
11588 + <&rotary_pins>,"brcm,pins:0",
11589 + /* modify reg values to allow multiple instantiation */
11590 + <&rotary>,"reg:0",
11591 + <&rotary_pins>,"reg:0";
11592 + pin_b = <&rotary>,"gpios:16",
11593 + <&rotary_pins>,"brcm,pins:4";
11594 + relative_axis = <&rotary>,"rotary-encoder,relative-axis?";
11595 + linux_axis = <&rotary>,"linux,axis:0";
11596 + rollover = <&rotary>,"rotary-encoder,rollover?";
11597 + steps-per-period = <&rotary>,"rotary-encoder,steps-per-period:0";
11598 + steps = <&rotary>,"rotary-encoder,steps:0";
11599 + wakeup = <&rotary>,"wakeup-source?";
11600 + encoding = <&rotary>,"rotary-encoder,encoding";
11601 + /* legacy parameters*/
11602 + rotary0_pin_a = <&rotary>,"gpios:4",
11603 + <&rotary_pins>,"brcm,pins:0";
11604 + rotary0_pin_b = <&rotary>,"gpios:16",
11605 + <&rotary_pins>,"brcm,pins:4";
11606 + };
11607 +};
11608 --- /dev/null
11609 +++ b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
11610 @@ -0,0 +1,21 @@
11611 +/*
11612 + * Devicetree overlay for mailbox-driven Raspberry Pi DSI Display
11613 + * backlight controller
11614 + */
11615 +/dts-v1/;
11616 +/plugin/;
11617 +
11618 +/ {
11619 + compatible = "brcm,bcm2708";
11620 +
11621 + fragment@0 {
11622 + target-path = "/";
11623 + __overlay__ {
11624 + rpi_backlight: rpi_backlight {
11625 + compatible = "raspberrypi,rpi-backlight";
11626 + firmware = <&firmware>;
11627 + status = "okay";
11628 + };
11629 + };
11630 + };
11631 +};
11632 --- /dev/null
11633 +++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
11634 @@ -0,0 +1,146 @@
11635 +// Definitions for the Cirrus Logic Audio Card
11636 +/dts-v1/;
11637 +/plugin/;
11638 +#include <dt-bindings/pinctrl/bcm2835.h>
11639 +#include <dt-bindings/gpio/gpio.h>
11640 +#include <dt-bindings/mfd/arizona.h>
11641 +
11642 +/ {
11643 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11644 +
11645 + fragment@0 {
11646 + target = <&i2s>;
11647 + __overlay__ {
11648 + status = "okay";
11649 + };
11650 + };
11651 +
11652 + fragment@1 {
11653 + target = <&gpio>;
11654 + __overlay__ {
11655 + wlf_pins: wlf_pins {
11656 + brcm,pins = <17 22 27 8>;
11657 + brcm,function = <
11658 + BCM2835_FSEL_GPIO_OUT
11659 + BCM2835_FSEL_GPIO_OUT
11660 + BCM2835_FSEL_GPIO_IN
11661 + BCM2835_FSEL_GPIO_OUT
11662 + >;
11663 + };
11664 + };
11665 + };
11666 +
11667 + fragment@2 {
11668 + target-path = "/";
11669 + __overlay__ {
11670 + rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 {
11671 + compatible = "regulator-fixed";
11672 + regulator-name = "RPi-Cirrus 1v8";
11673 + regulator-min-microvolt = <1800000>;
11674 + regulator-max-microvolt = <1800000>;
11675 + regulator-always-on;
11676 + };
11677 + };
11678 + };
11679 +
11680 + fragment@3 {
11681 + target = <&spi0>;
11682 + __overlay__ {
11683 + #address-cells = <1>;
11684 + #size-cells = <0>;
11685 + status = "okay";
11686 +
11687 + spidev@0{
11688 + status = "disabled";
11689 + };
11690 +
11691 + spidev@1{
11692 + status = "disabled";
11693 + };
11694 +
11695 + wm5102@1{
11696 + compatible = "wlf,wm5102";
11697 + reg = <1>;
11698 +
11699 + spi-max-frequency = <500000>;
11700 +
11701 + interrupt-parent = <&gpio>;
11702 + interrupts = <27 8>;
11703 + interrupt-controller;
11704 + #interrupt-cells = <2>;
11705 +
11706 + gpio-controller;
11707 + #gpio-cells = <2>;
11708 +
11709 + LDOVDD-supply = <&rpi_cirrus_reg_1v8>;
11710 + AVDD-supply = <&rpi_cirrus_reg_1v8>;
11711 + DBVDD1-supply = <&rpi_cirrus_reg_1v8>;
11712 + DBVDD2-supply = <&vdd_3v3_reg>;
11713 + DBVDD3-supply = <&vdd_3v3_reg>;
11714 + CPVDD-supply = <&rpi_cirrus_reg_1v8>;
11715 + SPKVDDL-supply = <&vdd_5v0_reg>;
11716 + SPKVDDR-supply = <&vdd_5v0_reg>;
11717 + DCVDD-supply = <&arizona_ldo1>;
11718 +
11719 + wlf,reset = <&gpio 17 GPIO_ACTIVE_HIGH>;
11720 + wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>;
11721 + wlf,gpio-defaults = <
11722 + ARIZONA_GP_DEFAULT
11723 + ARIZONA_GP_DEFAULT
11724 + ARIZONA_GP_DEFAULT
11725 + ARIZONA_GP_DEFAULT
11726 + ARIZONA_GP_DEFAULT
11727 + >;
11728 + wlf,micd-configs = <0 1 0>;
11729 + wlf,dmic-ref = <
11730 + ARIZONA_DMIC_MICVDD
11731 + ARIZONA_DMIC_MICBIAS2
11732 + ARIZONA_DMIC_MICVDD
11733 + ARIZONA_DMIC_MICVDD
11734 + >;
11735 + wlf,inmode = <
11736 + ARIZONA_INMODE_DIFF
11737 + ARIZONA_INMODE_DMIC
11738 + ARIZONA_INMODE_SE
11739 + ARIZONA_INMODE_DIFF
11740 + >;
11741 + status = "okay";
11742 +
11743 + arizona_ldo1: ldo1 {
11744 + regulator-name = "LDO1";
11745 + // default constraints as in
11746 + // arizona-ldo1.c
11747 + regulator-min-microvolt = <1200000>;
11748 + regulator-max-microvolt = <1800000>;
11749 + };
11750 + };
11751 + };
11752 + };
11753 +
11754 + fragment@4 {
11755 + target = <&i2c1>;
11756 + __overlay__ {
11757 + status = "okay";
11758 + #address-cells = <1>;
11759 + #size-cells = <0>;
11760 +
11761 + wm8804@3b {
11762 + compatible = "wlf,wm8804";
11763 + reg = <0x3b>;
11764 + status = "okay";
11765 + PVDD-supply = <&vdd_3v3_reg>;
11766 + DVDD-supply = <&vdd_3v3_reg>;
11767 + wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
11768 + };
11769 + };
11770 + };
11771 +
11772 + fragment@5 {
11773 + target = <&sound>;
11774 + __overlay__ {
11775 + compatible = "wlf,rpi-cirrus";
11776 + i2s-controller = <&i2s>;
11777 + status = "okay";
11778 + };
11779 + };
11780 +};
11781 --- /dev/null
11782 +++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
11783 @@ -0,0 +1,34 @@
11784 +// Definitions for RPi DAC
11785 +/dts-v1/;
11786 +/plugin/;
11787 +
11788 +/ {
11789 + compatible = "brcm,bcm2708";
11790 +
11791 + fragment@0 {
11792 + target = <&i2s>;
11793 + __overlay__ {
11794 + status = "okay";
11795 + };
11796 + };
11797 +
11798 + fragment@1 {
11799 + target-path = "/";
11800 + __overlay__ {
11801 + pcm1794a-codec {
11802 + #sound-dai-cells = <0>;
11803 + compatible = "ti,pcm1794a";
11804 + status = "okay";
11805 + };
11806 + };
11807 + };
11808 +
11809 + fragment@2 {
11810 + target = <&sound>;
11811 + __overlay__ {
11812 + compatible = "rpi,rpi-dac";
11813 + i2s-controller = <&i2s>;
11814 + status = "okay";
11815 + };
11816 + };
11817 +};
11818 --- /dev/null
11819 +++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
11820 @@ -0,0 +1,91 @@
11821 +/*
11822 + * Device Tree overlay for rpi-display by Watterott
11823 + *
11824 + */
11825 +
11826 +/dts-v1/;
11827 +/plugin/;
11828 +
11829 +/ {
11830 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
11831 +
11832 + fragment@0 {
11833 + target = <&spi0>;
11834 + __overlay__ {
11835 + status = "okay";
11836 + };
11837 + };
11838 +
11839 + fragment@1 {
11840 + target = <&spidev0>;
11841 + __overlay__ {
11842 + status = "disabled";
11843 + };
11844 + };
11845 +
11846 + fragment@2 {
11847 + target = <&spidev1>;
11848 + __overlay__ {
11849 + status = "disabled";
11850 + };
11851 + };
11852 +
11853 + fragment@3 {
11854 + target = <&gpio>;
11855 + __overlay__ {
11856 + rpi_display_pins: rpi_display_pins {
11857 + brcm,pins = <18 23 24 25>;
11858 + brcm,function = <1 1 1 0>; /* out out out in */
11859 + brcm,pull = <0 0 0 2>; /* - - - up */
11860 + };
11861 + };
11862 + };
11863 +
11864 + fragment@4 {
11865 + target = <&spi0>;
11866 + __overlay__ {
11867 + /* needed to avoid dtc warning */
11868 + #address-cells = <1>;
11869 + #size-cells = <0>;
11870 +
11871 + rpidisplay: rpi-display@0{
11872 + compatible = "ilitek,ili9341";
11873 + reg = <0>;
11874 + pinctrl-names = "default";
11875 + pinctrl-0 = <&rpi_display_pins>;
11876 +
11877 + spi-max-frequency = <32000000>;
11878 + rotate = <270>;
11879 + bgr;
11880 + fps = <30>;
11881 + buswidth = <8>;
11882 + reset-gpios = <&gpio 23 0>;
11883 + dc-gpios = <&gpio 24 0>;
11884 + led-gpios = <&gpio 18 1>;
11885 + debug = <0>;
11886 + };
11887 +
11888 + rpidisplay_ts: rpi-display-ts@1 {
11889 + compatible = "ti,ads7846";
11890 + reg = <1>;
11891 +
11892 + spi-max-frequency = <2000000>;
11893 + interrupts = <25 2>; /* high-to-low edge triggered */
11894 + interrupt-parent = <&gpio>;
11895 + pendown-gpio = <&gpio 25 0>;
11896 + ti,x-plate-ohms = /bits/ 16 <60>;
11897 + ti,pressure-max = /bits/ 16 <255>;
11898 + };
11899 + };
11900 + };
11901 + __overrides__ {
11902 + speed = <&rpidisplay>,"spi-max-frequency:0";
11903 + rotate = <&rpidisplay>,"rotate:0";
11904 + fps = <&rpidisplay>,"fps:0";
11905 + debug = <&rpidisplay>,"debug:0";
11906 + xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
11907 + swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
11908 + backlight = <&rpidisplay>,"led-gpios:4",
11909 + <&rpi_display_pins>,"brcm,pins:0";
11910 + };
11911 +};
11912 --- /dev/null
11913 +++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
11914 @@ -0,0 +1,30 @@
11915 +/dts-v1/;
11916 +/plugin/;
11917 +
11918 +/ {
11919 + compatible = "brcm,bcm2708";
11920 +
11921 + fragment@0 {
11922 + target-path = "/";
11923 + __overlay__ {
11924 + rpi_ft5406: rpi_ft5406 {
11925 + compatible = "rpi,rpi-ft5406";
11926 + firmware = <&firmware>;
11927 + status = "okay";
11928 + touchscreen-size-x = <800>;
11929 + touchscreen-size-y = <480>;
11930 + touchscreen-inverted-x = <0>;
11931 + touchscreen-inverted-y = <0>;
11932 + touchscreen-swapped-x-y = <0>;
11933 + };
11934 + };
11935 + };
11936 +
11937 + __overrides__ {
11938 + touchscreen-size-x = <&rpi_ft5406>,"touchscreen-size-x:0";
11939 + touchscreen-size-y = <&rpi_ft5406>,"touchscreen-size-y:0";
11940 + touchscreen-inverted-x = <&rpi_ft5406>,"touchscreen-inverted-x:0";
11941 + touchscreen-inverted-y = <&rpi_ft5406>,"touchscreen-inverted-y:0";
11942 + touchscreen-swapped-x-y = <&rpi_ft5406>,"touchscreen-swapped-x-y:0";
11943 + };
11944 +};
11945 --- /dev/null
11946 +++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
11947 @@ -0,0 +1,39 @@
11948 +// Definitions for Rpi-Proto
11949 +/dts-v1/;
11950 +/plugin/;
11951 +
11952 +/ {
11953 + compatible = "brcm,bcm2708";
11954 +
11955 + fragment@0 {
11956 + target = <&i2s>;
11957 + __overlay__ {
11958 + status = "okay";
11959 + };
11960 + };
11961 +
11962 + fragment@1 {
11963 + target = <&i2c1>;
11964 + __overlay__ {
11965 + #address-cells = <1>;
11966 + #size-cells = <0>;
11967 + status = "okay";
11968 +
11969 + wm8731@1a {
11970 + #sound-dai-cells = <0>;
11971 + compatible = "wlf,wm8731";
11972 + reg = <0x1a>;
11973 + status = "okay";
11974 + };
11975 + };
11976 + };
11977 +
11978 + fragment@2 {
11979 + target = <&sound>;
11980 + __overlay__ {
11981 + compatible = "rpi,rpi-proto";
11982 + i2s-controller = <&i2s>;
11983 + status = "okay";
11984 + };
11985 + };
11986 +};
11987 --- /dev/null
11988 +++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
11989 @@ -0,0 +1,47 @@
11990 +// rpi-sense HAT
11991 +/dts-v1/;
11992 +/plugin/;
11993 +
11994 +/ {
11995 + compatible = "brcm,bcm2708", "brcm,bcm2709";
11996 +
11997 + fragment@0 {
11998 + target = <&i2c1>;
11999 + __overlay__ {
12000 + #address-cells = <1>;
12001 + #size-cells = <0>;
12002 + status = "okay";
12003 +
12004 + rpi-sense@46 {
12005 + compatible = "rpi,rpi-sense";
12006 + reg = <0x46>;
12007 + keys-int-gpios = <&gpio 23 1>;
12008 + status = "okay";
12009 + };
12010 +
12011 + lsm9ds1-magn@1c {
12012 + compatible = "st,lsm9ds1-magn";
12013 + reg = <0x1c>;
12014 + status = "okay";
12015 + };
12016 +
12017 + lsm9ds1-accel6a {
12018 + compatible = "st,lsm9ds1-accel";
12019 + reg = <0x6a>;
12020 + status = "okay";
12021 + };
12022 +
12023 + lps25h-press@5c {
12024 + compatible = "st,lps25h-press";
12025 + reg = <0x5c>;
12026 + status = "okay";
12027 + };
12028 +
12029 + hts221-humid@5f {
12030 + compatible = "st,hts221-humid";
12031 + reg = <0x5f>;
12032 + status = "okay";
12033 + };
12034 + };
12035 + };
12036 +};
12037 --- /dev/null
12038 +++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
12039 @@ -0,0 +1,31 @@
12040 +// rpi-tv HAT
12041 +
12042 +/dts-v1/;
12043 +/plugin/;
12044 +
12045 +/ {
12046 + compatible = "brcm,bcm2708", "brcm,bcm2709";
12047 +
12048 + fragment@0 {
12049 + target = <&spi0>;
12050 + __overlay__ {
12051 + /* needed to avoid dtc warning */
12052 + #address-cells = <1>;
12053 + #size-cells = <0>;
12054 +
12055 + status = "okay";
12056 +
12057 + spidev@0 {
12058 + status = "disabled";
12059 + };
12060 +
12061 + cxd2880@0 {
12062 + compatible = "sony,cxd2880";
12063 + reg = <0>; /* CE0 */
12064 + spi-max-frequency = <50000000>;
12065 + status = "okay";
12066 + };
12067 + };
12068 + };
12069 +
12070 +};
12071 --- /dev/null
12072 +++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
12073 @@ -0,0 +1,49 @@
12074 +// Definitions for RRA DigiDAC1 Audio card
12075 +/dts-v1/;
12076 +/plugin/;
12077 +
12078 +/ {
12079 + compatible = "brcm,bcm2708";
12080 +
12081 + fragment@0 {
12082 + target = <&i2s>;
12083 + __overlay__ {
12084 + status = "okay";
12085 + };
12086 + };
12087 +
12088 + fragment@1 {
12089 + target = <&i2c1>;
12090 + __overlay__ {
12091 + #address-cells = <1>;
12092 + #size-cells = <0>;
12093 + status = "okay";
12094 +
12095 + wm8804@3b {
12096 + #sound-dai-cells = <0>;
12097 + compatible = "wlf,wm8804";
12098 + reg = <0x3b>;
12099 + status = "okay";
12100 + PVDD-supply = <&vdd_3v3_reg>;
12101 + DVDD-supply = <&vdd_3v3_reg>;
12102 + };
12103 +
12104 + wm8742: wm8741@1a {
12105 + compatible = "wlf,wm8741";
12106 + reg = <0x1a>;
12107 + status = "okay";
12108 + AVDD-supply = <&vdd_5v0_reg>;
12109 + DVDD-supply = <&vdd_3v3_reg>;
12110 + };
12111 + };
12112 + };
12113 +
12114 + fragment@2 {
12115 + target = <&sound>;
12116 + __overlay__ {
12117 + compatible = "rra,digidac1-soundcard";
12118 + i2s-controller = <&i2s>;
12119 + status = "okay";
12120 + };
12121 + };
12122 +};
12123 --- /dev/null
12124 +++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
12125 @@ -0,0 +1,37 @@
12126 +/dts-v1/;
12127 +/plugin/;
12128 +
12129 +/ {
12130 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12131 +
12132 + fragment@0 {
12133 + target = <&i2c_arm>;
12134 + __overlay__ {
12135 + #address-cells = <1>;
12136 + #size-cells = <0>;
12137 + status = "okay";
12138 +
12139 + sc16is750: sc16is750@48 {
12140 + compatible = "nxp,sc16is750";
12141 + reg = <0x48>; /* address */
12142 + clocks = <&sc16is750_clk>;
12143 + interrupt-parent = <&gpio>;
12144 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
12145 + #gpio-cells = <2>;
12146 +
12147 + sc16is750_clk: sc16is750_clk {
12148 + compatible = "fixed-clock";
12149 + #clock-cells = <0>;
12150 + clock-frequency = <14745600>;
12151 + };
12152 + };
12153 + };
12154 + };
12155 +
12156 +
12157 + __overrides__ {
12158 + int_pin = <&sc16is750>,"interrupts:0";
12159 + addr = <&sc16is750>,"reg:0";
12160 + };
12161 +
12162 +};
12163 --- /dev/null
12164 +++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
12165 @@ -0,0 +1,40 @@
12166 +/dts-v1/;
12167 +/plugin/;
12168 +
12169 +/ {
12170 + compatible = "brcm,bcm2835";
12171 +
12172 + fragment@0 {
12173 + target = <&i2c1>;
12174 +
12175 + frag1: __overlay__ {
12176 + #address-cells = <1>;
12177 + #size-cells = <0>;
12178 + status = "okay";
12179 +
12180 + sc16is752: sc16is752@48 {
12181 + compatible = "nxp,sc16is752";
12182 + reg = <0x48>; // i2c address
12183 + clocks = <&sc16is752_clk>;
12184 + interrupt-parent = <&gpio>;
12185 + interrupts = <24 0x2>; /* IRQ_TYPE_EDGE_FALLING */
12186 + gpio-controller;
12187 + #gpio-cells = <0>;
12188 + i2c-max-frequency = <400000>;
12189 + status = "okay";
12190 +
12191 + sc16is752_clk: sc16is752_clk {
12192 + compatible = "fixed-clock";
12193 + #clock-cells = <0>;
12194 + clock-frequency = <14745600>;
12195 + };
12196 + };
12197 + };
12198 + };
12199 +
12200 + __overrides__ {
12201 + int_pin = <&sc16is752>,"interrupts:0";
12202 + addr = <&sc16is752>,"reg:0";
12203 + xtal = <&sc16is752>,"clock-frequency:0";
12204 + };
12205 +};
12206 --- /dev/null
12207 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
12208 @@ -0,0 +1,61 @@
12209 +/dts-v1/;
12210 +/plugin/;
12211 +
12212 +/ {
12213 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12214 +
12215 + fragment@0 {
12216 + target = <&gpio>;
12217 + __overlay__ {
12218 + spi1_pins: spi1_pins {
12219 + brcm,pins = <19 20 21>;
12220 + brcm,function = <3>; /* alt4 */
12221 + };
12222 +
12223 + spi1_cs_pins: spi1_cs_pins {
12224 + brcm,pins = <18>;
12225 + brcm,function = <1>; /* output */
12226 + };
12227 + };
12228 + };
12229 +
12230 + fragment@1 {
12231 + target = <&spi1>;
12232 + frag1: __overlay__ {
12233 + #address-cells = <1>;
12234 + #size-cells = <0>;
12235 + pinctrl-names = "default";
12236 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12237 + cs-gpios = <&gpio 18 1>;
12238 + status = "okay";
12239 +
12240 + sc16is752: sc16is752@0 {
12241 + compatible = "nxp,sc16is752";
12242 + reg = <0>; /* CE0 */
12243 + clocks = <&sc16is752_clk>;
12244 + interrupt-parent = <&gpio>;
12245 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
12246 + #gpio-controller;
12247 + #gpio-cells = <2>;
12248 + spi-max-frequency = <4000000>;
12249 +
12250 + sc16is752_clk: sc16is752_clk {
12251 + compatible = "fixed-clock";
12252 + #clock-cells = <0>;
12253 + clock-frequency = <14745600>;
12254 + };
12255 + };
12256 + };
12257 + };
12258 +
12259 + fragment@2 {
12260 + target = <&aux>;
12261 + __overlay__ {
12262 + status = "okay";
12263 + };
12264 + };
12265 +
12266 + __overrides__ {
12267 + int_pin = <&sc16is752>,"interrupts:0";
12268 + };
12269 +};
12270 --- /dev/null
12271 +++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
12272 @@ -0,0 +1,31 @@
12273 +/dts-v1/;
12274 +/plugin/;
12275 +
12276 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
12277 +
12278 +/{
12279 + compatible = "brcm,bcm2708";
12280 +
12281 + fragment@0 {
12282 + target = <&sdhost>;
12283 + frag0: __overlay__ {
12284 + brcm,overclock-50 = <0>;
12285 + brcm,pio-limit = <1>;
12286 + status = "okay";
12287 + };
12288 + };
12289 +
12290 + fragment@1 {
12291 + target = <&mmc>;
12292 + __overlay__ {
12293 + status = "disabled";
12294 + };
12295 + };
12296 +
12297 + __overrides__ {
12298 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
12299 + force_pio = <&frag0>,"brcm,force-pio?";
12300 + pio_limit = <&frag0>,"brcm,pio-limit:0";
12301 + debug = <&frag0>,"brcm,debug?";
12302 + };
12303 +};
12304 --- /dev/null
12305 +++ b/arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts
12306 @@ -0,0 +1,63 @@
12307 +/dts-v1/;
12308 +/plugin/;
12309 +
12310 +/* Enable 1-bit SDIO from MMC interface via GPIOs 22-25. Includes sdhost overlay. */
12311 +
12312 +/{
12313 + compatible = "brcm,bcm2708";
12314 +
12315 + fragment@0 {
12316 + target = <&mmc>;
12317 + __overlay__ {
12318 + status = "disabled";
12319 + };
12320 + };
12321 +
12322 + fragment@1 {
12323 + target = <&soc>;
12324 + __overlay__ {
12325 + #address-cells = <1>;
12326 + #size-cells = <1>;
12327 +
12328 + sdio_1bit: sdio@7e300000 {
12329 + compatible = "brcm,bcm2835-mmc",
12330 + "brcm,bcm2835-sdhci";
12331 + reg = <0x7e300000 0x100>;
12332 + interrupts = <2 30>;
12333 + clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>;
12334 + dmas = <&dma 11>;
12335 + dma-names = "rx-tx";
12336 + brcm,overclock-50 = <0>;
12337 + status = "okay";
12338 + pinctrl-names = "default";
12339 + pinctrl-0 = <&sdio_1bit_pins>;
12340 + non-removable;
12341 + bus-width = <1>;
12342 + };
12343 + };
12344 + };
12345 +
12346 + fragment@2 {
12347 + target = <&gpio>;
12348 + __overlay__ {
12349 + sdio_1bit_pins: sdio_1bit_pins {
12350 + brcm,pins = <22 23 24 25>;
12351 + brcm,function = <7>; /* ALT3 = SD1 */
12352 + brcm,pull = <0 2 2 2>;
12353 + };
12354 + };
12355 + };
12356 +
12357 + fragment@3 {
12358 + target-path = "/aliases";
12359 + __overlay__ {
12360 + mmc1 = "/soc/sdio@7e300000";
12361 + };
12362 + };
12363 +
12364 +
12365 + __overrides__ {
12366 + poll_once = <&sdio_1bit>,"non-removable?";
12367 + sdio_overclock = <&sdio_1bit>,"brcm,overclock-50:0";
12368 + };
12369 +};
12370 --- /dev/null
12371 +++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts
12372 @@ -0,0 +1,63 @@
12373 +/dts-v1/;
12374 +/plugin/;
12375 +
12376 +/* Enable SDIO from MMC interface via GPIOs 22-27. Includes sdhost overlay. */
12377 +
12378 +/{
12379 + compatible = "brcm,bcm2708";
12380 +
12381 + fragment@0 {
12382 + target = <&mmc>;
12383 + __overlay__ {
12384 + status = "disabled";
12385 + };
12386 + };
12387 +
12388 + fragment@1 {
12389 + target = <&soc>;
12390 + __overlay__ {
12391 + #address-cells = <1>;
12392 + #size-cells = <1>;
12393 +
12394 + sdio_ovl: sdio@7e300000 {
12395 + compatible = "brcm,bcm2835-mmc",
12396 + "brcm,bcm2835-sdhci";
12397 + reg = <0x7e300000 0x100>;
12398 + interrupts = <2 30>;
12399 + clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>;
12400 + dmas = <&dma 11>;
12401 + dma-names = "rx-tx";
12402 + brcm,overclock-50 = <0>;
12403 + status = "okay";
12404 + pinctrl-names = "default";
12405 + pinctrl-0 = <&sdio_ovl_pins>;
12406 + non-removable;
12407 + bus-width = <1>;
12408 + };
12409 + };
12410 + };
12411 +
12412 + fragment@2 {
12413 + target = <&gpio>;
12414 + __overlay__ {
12415 + sdio_ovl_pins: sdio_ovl_pins {
12416 + brcm,pins = <22 23 24 25 26 27>;
12417 + brcm,function = <7>; /* ALT3 = SD1 */
12418 + brcm,pull = <0 2 2 2 2 2>;
12419 + };
12420 + };
12421 + };
12422 +
12423 + fragment@3 {
12424 + target-path = "/aliases";
12425 + __overlay__ {
12426 + mmc1 = "/soc/sdio@7e300000";
12427 + };
12428 + };
12429 +
12430 + __overrides__ {
12431 + poll_once = <&sdio_ovl>,"non-removable?";
12432 + bus_width = <&sdio_ovl>,"bus-width:0";
12433 + sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0";
12434 + };
12435 +};
12436 --- /dev/null
12437 +++ b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts
12438 @@ -0,0 +1,25 @@
12439 +/dts-v1/;
12440 +/plugin/;
12441 +
12442 +/* Provide backwards compatible aliases for the old sdhost dtparams. */
12443 +
12444 +/{
12445 + compatible = "brcm,bcm2708";
12446 +
12447 + fragment@0 {
12448 + target = <&sdhost>;
12449 + frag0: __overlay__ {
12450 + brcm,overclock-50 = <0>;
12451 + brcm,pio-limit = <1>;
12452 + };
12453 + };
12454 +
12455 + __overrides__ {
12456 + overclock_50 = <&frag0>,"brcm,overclock-50:0";
12457 + force_pio = <&frag0>,"brcm,force-pio?";
12458 + pio_limit = <&frag0>,"brcm,pio-limit:0";
12459 + debug = <&frag0>,"brcm,debug?";
12460 + enable = <&frag0>,"status";
12461 + poll_once = <&frag0>,"non-removable?";
12462 + };
12463 +};
12464 --- /dev/null
12465 +++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
12466 @@ -0,0 +1,18 @@
12467 +// Description: Overlay to enable character device interface for SMI.
12468 +// Author: Luke Wren <luke@raspberrypi.org>
12469 +
12470 +/dts-v1/;
12471 +/plugin/;
12472 +
12473 +/{
12474 + fragment@0 {
12475 + target = <&soc>;
12476 + __overlay__ {
12477 + smi_dev {
12478 + compatible = "brcm,bcm2835-smi-dev";
12479 + smi_handle = <&smi>;
12480 + status = "okay";
12481 + };
12482 + };
12483 + };
12484 +};
12485 --- /dev/null
12486 +++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
12487 @@ -0,0 +1,69 @@
12488 +// Description: Overlay to enable NAND flash through
12489 +// the secondary memory interface
12490 +// Author: Luke Wren
12491 +
12492 +/dts-v1/;
12493 +/plugin/;
12494 +
12495 +/{
12496 + compatible = "brcm,bcm2708";
12497 +
12498 + fragment@0 {
12499 + target = <&smi>;
12500 + __overlay__ {
12501 + pinctrl-names = "default";
12502 + pinctrl-0 = <&smi_pins>;
12503 + status = "okay";
12504 + };
12505 + };
12506 +
12507 + fragment@1 {
12508 + target = <&soc>;
12509 + __overlay__ {
12510 + #address-cells = <1>;
12511 + #size-cells = <1>;
12512 +
12513 + nand: flash@0 {
12514 + compatible = "brcm,bcm2835-smi-nand";
12515 + smi_handle = <&smi>;
12516 + #address-cells = <1>;
12517 + #size-cells = <1>;
12518 + status = "okay";
12519 +
12520 + partition@0 {
12521 + label = "stage2";
12522 + // 128k
12523 + reg = <0 0x20000>;
12524 + read-only;
12525 + };
12526 + partition@1 {
12527 + label = "firmware";
12528 + // 16M
12529 + reg = <0x20000 0x1000000>;
12530 + read-only;
12531 + };
12532 + partition@2 {
12533 + label = "root";
12534 + // 2G (will need to use 64 bit for >=4G)
12535 + reg = <0x1020000 0x80000000>;
12536 + };
12537 + };
12538 + };
12539 + };
12540 +
12541 + fragment@2 {
12542 + target = <&gpio>;
12543 + __overlay__ {
12544 + smi_pins: smi_pins {
12545 + brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
12546 + 12 13 14 15>;
12547 + /* Alt 1: SMI */
12548 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5
12549 + 5 5 5 5 5>;
12550 + /* /CS, /WE and /OE are pulled high, as they are
12551 + generally active low signals */
12552 + brcm,pull = <2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
12553 + };
12554 + };
12555 + };
12556 +};
12557 --- /dev/null
12558 +++ b/arch/arm/boot/dts/overlays/smi-overlay.dts
12559 @@ -0,0 +1,37 @@
12560 +// Description: Overlay to enable the secondary memory interface peripheral
12561 +// Author: Luke Wren
12562 +
12563 +/dts-v1/;
12564 +/plugin/;
12565 +
12566 +/{
12567 + compatible = "brcm,bcm2708";
12568 +
12569 + fragment@0 {
12570 + target = <&smi>;
12571 + __overlay__ {
12572 + pinctrl-names = "default";
12573 + pinctrl-0 = <&smi_pins>;
12574 + status = "okay";
12575 + };
12576 + };
12577 +
12578 + fragment@1 {
12579 + target = <&gpio>;
12580 + __overlay__ {
12581 + smi_pins: smi_pins {
12582 + /* Don't configure the top two address bits, as
12583 + these are already used as ID_SD and ID_SC */
12584 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
12585 + 16 17 18 19 20 21 22 23 24 25>;
12586 + /* Alt 0: SMI */
12587 + brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
12588 + 5 5 5 5 5 5 5 5 5>;
12589 + /* /CS, /WE and /OE are pulled high, as they are
12590 + generally active low signals */
12591 + brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0
12592 + 0 0 0 0 0 0 0>;
12593 + };
12594 + };
12595 + };
12596 +};
12597 --- /dev/null
12598 +++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
12599 @@ -0,0 +1,31 @@
12600 +/*
12601 + * Device tree overlay to move spi0 to gpio 35 to 39 on CM
12602 + */
12603 +
12604 +/dts-v1/;
12605 +/plugin/;
12606 +
12607 +/ {
12608 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
12609 +
12610 + fragment@0 {
12611 + target = <&spi0>;
12612 + __overlay__ {
12613 + cs-gpios = <&gpio 36 1>, <&gpio 35 1>;
12614 + };
12615 + };
12616 +
12617 + fragment@1 {
12618 + target = <&spi0_cs_pins>;
12619 + __overlay__ {
12620 + brcm,pins = <36 35>;
12621 + };
12622 + };
12623 +
12624 + fragment@2 {
12625 + target = <&spi0_pins>;
12626 + __overlay__ {
12627 + brcm,pins = <37 38 39>;
12628 + };
12629 + };
12630 +};
12631 --- /dev/null
12632 +++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
12633 @@ -0,0 +1,33 @@
12634 +/dts-v1/;
12635 +/plugin/;
12636 +
12637 +/ {
12638 + compatible = "brcm,bcm2708";
12639 +
12640 + fragment@0 {
12641 + target = <&spidev0>;
12642 + __dormant__ {
12643 + status = "disabled";
12644 + };
12645 + };
12646 +
12647 + fragment@1 {
12648 + target = <&spi0>;
12649 + __dormant__ {
12650 + #address-cells = <1>;
12651 + #size-cells = <0>;
12652 + status = "okay";
12653 +
12654 + rtc-pcf2123@0 {
12655 + compatible = "nxp,rtc-pcf2123";
12656 + spi-max-frequency = <5000000>;
12657 + spi-cs-high = <1>;
12658 + reg = <0>;
12659 + };
12660 + };
12661 + };
12662 +
12663 + __overrides__ {
12664 + pcf2123 = <0>, "=0=1";
12665 + };
12666 +};
12667 --- /dev/null
12668 +++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts
12669 @@ -0,0 +1,29 @@
12670 +/dts-v1/;
12671 +/plugin/;
12672 +
12673 +
12674 +/ {
12675 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12676 +
12677 + fragment@0 {
12678 + target = <&spi0_cs_pins>;
12679 + frag0: __overlay__ {
12680 + brcm,pins = <8 7>;
12681 + };
12682 + };
12683 +
12684 + fragment@1 {
12685 + target = <&spi0>;
12686 + frag1: __overlay__ {
12687 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
12688 + status = "okay";
12689 + };
12690 + };
12691 +
12692 + __overrides__ {
12693 + cs0_pin = <&frag0>,"brcm,pins:0",
12694 + <&frag1>,"cs-gpios:4";
12695 + cs1_pin = <&frag0>,"brcm,pins:4",
12696 + <&frag1>,"cs-gpios:16";
12697 + };
12698 +};
12699 --- /dev/null
12700 +++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
12701 @@ -0,0 +1,26 @@
12702 +/*
12703 + * Device tree overlay to re-enable hardware CS for SPI0
12704 + */
12705 +
12706 +/dts-v1/;
12707 +/plugin/;
12708 +
12709 +/ {
12710 + compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
12711 +
12712 + fragment@0 {
12713 + target = <&spi0>;
12714 + __overlay__ {
12715 + cs-gpios = <0>, <0>;
12716 + status = "okay";
12717 + };
12718 + };
12719 +
12720 + fragment@1 {
12721 + target = <&spi0_cs_pins>;
12722 + __overlay__ {
12723 + brcm,pins = <8 7>;
12724 + brcm,function = <4>; /* alt0 */
12725 + };
12726 + };
12727 +};
12728 --- /dev/null
12729 +++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
12730 @@ -0,0 +1,57 @@
12731 +/dts-v1/;
12732 +/plugin/;
12733 +
12734 +
12735 +/ {
12736 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12737 +
12738 + fragment@0 {
12739 + target = <&gpio>;
12740 + __overlay__ {
12741 + spi1_pins: spi1_pins {
12742 + brcm,pins = <19 20 21>;
12743 + brcm,function = <3>; /* alt4 */
12744 + };
12745 +
12746 + spi1_cs_pins: spi1_cs_pins {
12747 + brcm,pins = <18>;
12748 + brcm,function = <1>; /* output */
12749 + };
12750 + };
12751 + };
12752 +
12753 + fragment@1 {
12754 + target = <&spi1>;
12755 + frag1: __overlay__ {
12756 + /* needed to avoid dtc warning */
12757 + #address-cells = <1>;
12758 + #size-cells = <0>;
12759 + pinctrl-names = "default";
12760 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12761 + cs-gpios = <&gpio 18 1>;
12762 + status = "okay";
12763 +
12764 + spidev1_0: spidev@0 {
12765 + compatible = "spidev";
12766 + reg = <0>; /* CE0 */
12767 + #address-cells = <1>;
12768 + #size-cells = <0>;
12769 + spi-max-frequency = <125000000>;
12770 + status = "okay";
12771 + };
12772 + };
12773 + };
12774 +
12775 + fragment@2 {
12776 + target = <&aux>;
12777 + __overlay__ {
12778 + status = "okay";
12779 + };
12780 + };
12781 +
12782 + __overrides__ {
12783 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
12784 + <&frag1>,"cs-gpios:4";
12785 + cs0_spidev = <&spidev1_0>,"status";
12786 + };
12787 +};
12788 --- /dev/null
12789 +++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
12790 @@ -0,0 +1,69 @@
12791 +/dts-v1/;
12792 +/plugin/;
12793 +
12794 +
12795 +/ {
12796 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12797 +
12798 + fragment@0 {
12799 + target = <&gpio>;
12800 + __overlay__ {
12801 + spi1_pins: spi1_pins {
12802 + brcm,pins = <19 20 21>;
12803 + brcm,function = <3>; /* alt4 */
12804 + };
12805 +
12806 + spi1_cs_pins: spi1_cs_pins {
12807 + brcm,pins = <18 17>;
12808 + brcm,function = <1>; /* output */
12809 + };
12810 + };
12811 + };
12812 +
12813 + fragment@1 {
12814 + target = <&spi1>;
12815 + frag1: __overlay__ {
12816 + /* needed to avoid dtc warning */
12817 + #address-cells = <1>;
12818 + #size-cells = <0>;
12819 + pinctrl-names = "default";
12820 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12821 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
12822 + status = "okay";
12823 +
12824 + spidev1_0: spidev@0 {
12825 + compatible = "spidev";
12826 + reg = <0>; /* CE0 */
12827 + #address-cells = <1>;
12828 + #size-cells = <0>;
12829 + spi-max-frequency = <125000000>;
12830 + status = "okay";
12831 + };
12832 +
12833 + spidev1_1: spidev@1 {
12834 + compatible = "spidev";
12835 + reg = <1>; /* CE1 */
12836 + #address-cells = <1>;
12837 + #size-cells = <0>;
12838 + spi-max-frequency = <125000000>;
12839 + status = "okay";
12840 + };
12841 + };
12842 + };
12843 +
12844 + fragment@2 {
12845 + target = <&aux>;
12846 + __overlay__ {
12847 + status = "okay";
12848 + };
12849 + };
12850 +
12851 + __overrides__ {
12852 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
12853 + <&frag1>,"cs-gpios:4";
12854 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
12855 + <&frag1>,"cs-gpios:16";
12856 + cs0_spidev = <&spidev1_0>,"status";
12857 + cs1_spidev = <&spidev1_1>,"status";
12858 + };
12859 +};
12860 --- /dev/null
12861 +++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
12862 @@ -0,0 +1,81 @@
12863 +/dts-v1/;
12864 +/plugin/;
12865 +
12866 +
12867 +/ {
12868 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12869 +
12870 + fragment@0 {
12871 + target = <&gpio>;
12872 + __overlay__ {
12873 + spi1_pins: spi1_pins {
12874 + brcm,pins = <19 20 21>;
12875 + brcm,function = <3>; /* alt4 */
12876 + };
12877 +
12878 + spi1_cs_pins: spi1_cs_pins {
12879 + brcm,pins = <18 17 16>;
12880 + brcm,function = <1>; /* output */
12881 + };
12882 + };
12883 + };
12884 +
12885 + fragment@1 {
12886 + target = <&spi1>;
12887 + frag1: __overlay__ {
12888 + /* needed to avoid dtc warning */
12889 + #address-cells = <1>;
12890 + #size-cells = <0>;
12891 + pinctrl-names = "default";
12892 + pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
12893 + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
12894 + status = "okay";
12895 +
12896 + spidev1_0: spidev@0 {
12897 + compatible = "spidev";
12898 + reg = <0>; /* CE0 */
12899 + #address-cells = <1>;
12900 + #size-cells = <0>;
12901 + spi-max-frequency = <125000000>;
12902 + status = "okay";
12903 + };
12904 +
12905 + spidev1_1: spidev@1 {
12906 + compatible = "spidev";
12907 + reg = <1>; /* CE1 */
12908 + #address-cells = <1>;
12909 + #size-cells = <0>;
12910 + spi-max-frequency = <125000000>;
12911 + status = "okay";
12912 + };
12913 +
12914 + spidev1_2: spidev@2 {
12915 + compatible = "spidev";
12916 + reg = <2>; /* CE2 */
12917 + #address-cells = <1>;
12918 + #size-cells = <0>;
12919 + spi-max-frequency = <125000000>;
12920 + status = "okay";
12921 + };
12922 + };
12923 + };
12924 +
12925 + fragment@2 {
12926 + target = <&aux>;
12927 + __overlay__ {
12928 + status = "okay";
12929 + };
12930 + };
12931 +
12932 + __overrides__ {
12933 + cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
12934 + <&frag1>,"cs-gpios:4";
12935 + cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
12936 + <&frag1>,"cs-gpios:16";
12937 + cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
12938 + <&frag1>,"cs-gpios:28";
12939 + cs0_spidev = <&spidev1_0>,"status";
12940 + cs1_spidev = <&spidev1_1>,"status";
12941 + cs2_spidev = <&spidev1_2>,"status";
12942 + };
12943 +};
12944 --- /dev/null
12945 +++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
12946 @@ -0,0 +1,57 @@
12947 +/dts-v1/;
12948 +/plugin/;
12949 +
12950 +
12951 +/ {
12952 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
12953 +
12954 + fragment@0 {
12955 + target = <&gpio>;
12956 + __overlay__ {
12957 + spi2_pins: spi2_pins {
12958 + brcm,pins = <40 41 42>;
12959 + brcm,function = <3>; /* alt4 */
12960 + };
12961 +
12962 + spi2_cs_pins: spi2_cs_pins {
12963 + brcm,pins = <43>;
12964 + brcm,function = <1>; /* output */
12965 + };
12966 + };
12967 + };
12968 +
12969 + fragment@1 {
12970 + target = <&spi2>;
12971 + frag1: __overlay__ {
12972 + /* needed to avoid dtc warning */
12973 + #address-cells = <1>;
12974 + #size-cells = <0>;
12975 + pinctrl-names = "default";
12976 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
12977 + cs-gpios = <&gpio 43 1>;
12978 + status = "okay";
12979 +
12980 + spidev2_0: spidev@0 {
12981 + compatible = "spidev";
12982 + reg = <0>; /* CE0 */
12983 + #address-cells = <1>;
12984 + #size-cells = <0>;
12985 + spi-max-frequency = <125000000>;
12986 + status = "okay";
12987 + };
12988 + };
12989 + };
12990 +
12991 + fragment@2 {
12992 + target = <&aux>;
12993 + __overlay__ {
12994 + status = "okay";
12995 + };
12996 + };
12997 +
12998 + __overrides__ {
12999 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
13000 + <&frag1>,"cs-gpios:4";
13001 + cs0_spidev = <&spidev2_0>,"status";
13002 + };
13003 +};
13004 --- /dev/null
13005 +++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
13006 @@ -0,0 +1,69 @@
13007 +/dts-v1/;
13008 +/plugin/;
13009 +
13010 +
13011 +/ {
13012 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
13013 +
13014 + fragment@0 {
13015 + target = <&gpio>;
13016 + __overlay__ {
13017 + spi2_pins: spi2_pins {
13018 + brcm,pins = <40 41 42>;
13019 + brcm,function = <3>; /* alt4 */
13020 + };
13021 +
13022 + spi2_cs_pins: spi2_cs_pins {
13023 + brcm,pins = <43 44>;
13024 + brcm,function = <1>; /* output */
13025 + };
13026 + };
13027 + };
13028 +
13029 + fragment@1 {
13030 + target = <&spi2>;
13031 + frag1: __overlay__ {
13032 + /* needed to avoid dtc warning */
13033 + #address-cells = <1>;
13034 + #size-cells = <0>;
13035 + pinctrl-names = "default";
13036 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
13037 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
13038 + status = "okay";
13039 +
13040 + spidev2_0: spidev@0 {
13041 + compatible = "spidev";
13042 + reg = <0>; /* CE0 */
13043 + #address-cells = <1>;
13044 + #size-cells = <0>;
13045 + spi-max-frequency = <125000000>;
13046 + status = "okay";
13047 + };
13048 +
13049 + spidev2_1: spidev@1 {
13050 + compatible = "spidev";
13051 + reg = <1>; /* CE1 */
13052 + #address-cells = <1>;
13053 + #size-cells = <0>;
13054 + spi-max-frequency = <125000000>;
13055 + status = "okay";
13056 + };
13057 + };
13058 + };
13059 +
13060 + fragment@2 {
13061 + target = <&aux>;
13062 + __overlay__ {
13063 + status = "okay";
13064 + };
13065 + };
13066 +
13067 + __overrides__ {
13068 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
13069 + <&frag1>,"cs-gpios:4";
13070 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
13071 + <&frag1>,"cs-gpios:16";
13072 + cs0_spidev = <&spidev2_0>,"status";
13073 + cs1_spidev = <&spidev2_1>,"status";
13074 + };
13075 +};
13076 --- /dev/null
13077 +++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
13078 @@ -0,0 +1,81 @@
13079 +/dts-v1/;
13080 +/plugin/;
13081 +
13082 +
13083 +/ {
13084 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
13085 +
13086 + fragment@0 {
13087 + target = <&gpio>;
13088 + __overlay__ {
13089 + spi2_pins: spi2_pins {
13090 + brcm,pins = <40 41 42>;
13091 + brcm,function = <3>; /* alt4 */
13092 + };
13093 +
13094 + spi2_cs_pins: spi2_cs_pins {
13095 + brcm,pins = <43 44 45>;
13096 + brcm,function = <1>; /* output */
13097 + };
13098 + };
13099 + };
13100 +
13101 + fragment@1 {
13102 + target = <&spi2>;
13103 + frag1: __overlay__ {
13104 + /* needed to avoid dtc warning */
13105 + #address-cells = <1>;
13106 + #size-cells = <0>;
13107 + pinctrl-names = "default";
13108 + pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
13109 + cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
13110 + status = "okay";
13111 +
13112 + spidev2_0: spidev@0 {
13113 + compatible = "spidev";
13114 + reg = <0>; /* CE0 */
13115 + #address-cells = <1>;
13116 + #size-cells = <0>;
13117 + spi-max-frequency = <125000000>;
13118 + status = "okay";
13119 + };
13120 +
13121 + spidev2_1: spidev@1 {
13122 + compatible = "spidev";
13123 + reg = <1>; /* CE1 */
13124 + #address-cells = <1>;
13125 + #size-cells = <0>;
13126 + spi-max-frequency = <125000000>;
13127 + status = "okay";
13128 + };
13129 +
13130 + spidev2_2: spidev@2 {
13131 + compatible = "spidev";
13132 + reg = <2>; /* CE2 */
13133 + #address-cells = <1>;
13134 + #size-cells = <0>;
13135 + spi-max-frequency = <125000000>;
13136 + status = "okay";
13137 + };
13138 + };
13139 + };
13140 +
13141 + fragment@2 {
13142 + target = <&aux>;
13143 + __overlay__ {
13144 + status = "okay";
13145 + };
13146 + };
13147 +
13148 + __overrides__ {
13149 + cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
13150 + <&frag1>,"cs-gpios:4";
13151 + cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
13152 + <&frag1>,"cs-gpios:16";
13153 + cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
13154 + <&frag1>,"cs-gpios:28";
13155 + cs0_spidev = <&spidev2_0>,"status";
13156 + cs1_spidev = <&spidev2_1>,"status";
13157 + cs2_spidev = <&spidev2_2>,"status";
13158 + };
13159 +};
13160 --- /dev/null
13161 +++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
13162 @@ -0,0 +1,73 @@
13163 +// Definitions for SuperAudioBoard
13164 +/dts-v1/;
13165 +/plugin/;
13166 +
13167 +/ {
13168 + compatible = "brcm,bcm2708";
13169 +
13170 + fragment@0 {
13171 + target = <&sound>;
13172 + __overlay__ {
13173 + compatible = "simple-audio-card";
13174 + i2s-controller = <&i2s>;
13175 + status = "okay";
13176 +
13177 + simple-audio-card,name = "SuperAudioBoard";
13178 +
13179 + simple-audio-card,widgets =
13180 + "Line", "Line In",
13181 + "Line", "Line Out";
13182 +
13183 + simple-audio-card,routing =
13184 + "Line Out","AOUTA+",
13185 + "Line Out","AOUTA-",
13186 + "Line Out","AOUTB+",
13187 + "Line Out","AOUTB-",
13188 + "AINA","Line In",
13189 + "AINB","Line In";
13190 +
13191 + simple-audio-card,format = "i2s";
13192 +
13193 + simple-audio-card,bitclock-master = <&sound_master>;
13194 + simple-audio-card,frame-master = <&sound_master>;
13195 +
13196 + simple-audio-card,cpu {
13197 + sound-dai = <&i2s>;
13198 + dai-tdm-slot-num = <2>;
13199 + dai-tdm-slot-width = <32>;
13200 + };
13201 +
13202 + sound_master: simple-audio-card,codec {
13203 + sound-dai = <&cs4271>;
13204 + system-clock-frequency = <24576000>;
13205 + };
13206 + };
13207 + };
13208 +
13209 + fragment@1 {
13210 + target = <&i2s>;
13211 + __overlay__ {
13212 + status = "okay";
13213 + };
13214 + };
13215 +
13216 + fragment@2 {
13217 + target = <&i2c1>;
13218 + __overlay__ {
13219 + #address-cells = <1>;
13220 + #size-cells = <0>;
13221 + status = "okay";
13222 +
13223 + cs4271: cs4271@10 {
13224 + #sound-dai-cells = <0>;
13225 + compatible = "cirrus,cs4271";
13226 + reg = <0x10>;
13227 + status = "okay";
13228 + reset-gpio = <&gpio 26 0>; /* Pin 26, active high */
13229 + };
13230 + };
13231 + };
13232 + __overrides__ {
13233 + gpiopin = <&cs4271>,"reset-gpio:4";
13234 + };
13235 +};
13236 --- /dev/null
13237 +++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
13238 @@ -0,0 +1,1706 @@
13239 +// Definitions for SX150x I2C GPIO Expanders from Semtech
13240 +
13241 +// dtparams:
13242 +// sx150<x>-<n>-<m> - Enables SX150X device on I2C#<n> with slave address <m>. <x> may be 1-9.
13243 +// <n> may be 0 or 1. Permissible values of <m> (which is denoted in hex)
13244 +// depend on the device variant.
13245 +// For SX1501, SX1502, SX1504 and SX1505, <m> may be 20 or 21.
13246 +// For SX1503 and SX1506, <m> may be 20.
13247 +// For SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
13248 +// For SX1508, <m> may be 20, 21, 22 or 23.
13249 +// sx150<x>-<n>-<m>-int-gpio - Integer, enables interrupts on SX150X device on I2C#<n> with slave address <m>,
13250 +// specifies the GPIO pin to which NINT output of SX150X is connected.
13251 +//
13252 +//
13253 +// Example 1: A single SX1505 device on I2C#1 with its slave address set to 0x20 and NINT output connected to GPIO25:
13254 +// dtoverlay=sx150x:sx1505-1-20,sx1505-1-20-int-gpio=25
13255 +//
13256 +// Example 2: Two SX1507 devices on I2C#0 with their slave addresses set to 0x3E and 0x70 (interrupts not used):
13257 +// dtoverlay=sx150x:sx1507-0-3E,sx1507-0-70
13258 +
13259 +/dts-v1/;
13260 +/plugin/;
13261 +
13262 +/ {
13263 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
13264 +
13265 + // Enable I2C#0 interface
13266 + fragment@0 {
13267 + target = <&i2c0>;
13268 + __dormant__ {
13269 + status = "okay";
13270 + };
13271 + };
13272 +
13273 + // Enable I2C#1 interface
13274 + fragment@1 {
13275 + target = <&i2c1>;
13276 + __dormant__ {
13277 + status = "okay";
13278 + };
13279 + };
13280 +
13281 + // Enable a SX1501 on I2C#0 at slave addr 0x20
13282 + fragment@2 {
13283 + target = <&i2c0>;
13284 + __dormant__ {
13285 + #address-cells = <1>;
13286 + #size-cells = <0>;
13287 +
13288 + sx1501_0_20: sx150x@20 {
13289 + compatible = "semtech,sx1501q";
13290 + reg = <0x20>;
13291 + gpio-controller;
13292 + #gpio-cells = <2>;
13293 + #interrupt-cells = <2>;
13294 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-20-int-gpio parameter
13295 + 2nd word is 2 for falling-edge triggered */
13296 + status = "okay";
13297 + };
13298 + };
13299 + };
13300 +
13301 + // Enable a SX1501 on I2C#1 at slave addr 0x20
13302 + fragment@3 {
13303 + target = <&i2c1>;
13304 + __dormant__ {
13305 + #address-cells = <1>;
13306 + #size-cells = <0>;
13307 +
13308 + sx1501_1_20: sx150x@20 {
13309 + compatible = "semtech,sx1501q";
13310 + reg = <0x20>;
13311 + gpio-controller;
13312 + #gpio-cells = <2>;
13313 + #interrupt-cells = <2>;
13314 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-20-int-gpio parameter
13315 + 2nd word is 2 for falling-edge triggered */
13316 + status = "okay";
13317 + };
13318 + };
13319 + };
13320 +
13321 + // Enable a SX1501 on I2C#0 at slave addr 0x21
13322 + fragment@4 {
13323 + target = <&i2c0>;
13324 + __dormant__ {
13325 + #address-cells = <1>;
13326 + #size-cells = <0>;
13327 +
13328 + sx1501_0_21: sx150x@21 {
13329 + compatible = "semtech,sx1501q";
13330 + reg = <0x21>;
13331 + gpio-controller;
13332 + #gpio-cells = <2>;
13333 + #interrupt-cells = <2>;
13334 + interrupts = <25 2>; /* 1st word overwritten by sx1501-0-21-int-gpio parameter
13335 + 2nd word is 2 for falling-edge triggered */
13336 + status = "okay";
13337 + };
13338 + };
13339 + };
13340 +
13341 + // Enable a SX1501 on I2C#1 at slave addr 0x21
13342 + fragment@5 {
13343 + target = <&i2c1>;
13344 + __dormant__ {
13345 + #address-cells = <1>;
13346 + #size-cells = <0>;
13347 +
13348 + sx1501_1_21: sx150x@21 {
13349 + compatible = "semtech,sx1501q";
13350 + reg = <0x21>;
13351 + gpio-controller;
13352 + #gpio-cells = <2>;
13353 + #interrupt-cells = <2>;
13354 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
13355 + 2nd word is 2 for falling-edge triggered */
13356 + status = "okay";
13357 + };
13358 + };
13359 + };
13360 +
13361 + // Enable a SX1502 on I2C#0 at slave addr 0x20
13362 + fragment@6 {
13363 + target = <&i2c0>;
13364 + __dormant__ {
13365 + #address-cells = <1>;
13366 + #size-cells = <0>;
13367 +
13368 + sx1502_0_20: sx150x@20 {
13369 + compatible = "semtech,sx1502q";
13370 + reg = <0x20>;
13371 + gpio-controller;
13372 + #gpio-cells = <2>;
13373 + #interrupt-cells = <2>;
13374 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-20-int-gpio parameter
13375 + 2nd word is 2 for falling-edge triggered */
13376 + status = "okay";
13377 + };
13378 + };
13379 + };
13380 +
13381 + // Enable a SX1502 on I2C#1 at slave addr 0x20
13382 + fragment@7 {
13383 + target = <&i2c1>;
13384 + __dormant__ {
13385 + #address-cells = <1>;
13386 + #size-cells = <0>;
13387 +
13388 + sx1502_1_20: sx150x@20 {
13389 + compatible = "semtech,sx1502q";
13390 + reg = <0x20>;
13391 + gpio-controller;
13392 + #gpio-cells = <2>;
13393 + #interrupt-cells = <2>;
13394 + interrupts = <25 2>; /* 1st word overwritten by sx1502-1-20-int-gpio parameter
13395 + 2nd word is 2 for falling-edge triggered */
13396 + status = "okay";
13397 + };
13398 + };
13399 + };
13400 +
13401 + // Enable a SX1502 on I2C#0 at slave addr 0x21
13402 + fragment@8 {
13403 + target = <&i2c0>;
13404 + __dormant__ {
13405 + #address-cells = <1>;
13406 + #size-cells = <0>;
13407 +
13408 + sx1502_0_21: sx150x@21 {
13409 + compatible = "semtech,sx1502q";
13410 + reg = <0x21>;
13411 + gpio-controller;
13412 + #gpio-cells = <2>;
13413 + #interrupt-cells = <2>;
13414 + interrupts = <25 2>; /* 1st word overwritten by sx1502-0-21-int-gpio parameter
13415 + 2nd word is 2 for falling-edge triggered */
13416 + status = "okay";
13417 + };
13418 + };
13419 + };
13420 +
13421 + // Enable a SX1502 on I2C#1 at slave addr 0x21
13422 + fragment@9 {
13423 + target = <&i2c1>;
13424 + __dormant__ {
13425 + #address-cells = <1>;
13426 + #size-cells = <0>;
13427 +
13428 + sx1502_1_21: sx150x@21 {
13429 + compatible = "semtech,sx1502q";
13430 + reg = <0x21>;
13431 + gpio-controller;
13432 + #gpio-cells = <2>;
13433 + #interrupt-cells = <2>;
13434 + interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
13435 + 2nd word is 2 for falling-edge triggered */
13436 + status = "okay";
13437 + };
13438 + };
13439 + };
13440 +
13441 + // Enable a SX1503 on I2C#0 at slave addr 0x20
13442 + fragment@10 {
13443 + target = <&i2c0>;
13444 + __dormant__ {
13445 + #address-cells = <1>;
13446 + #size-cells = <0>;
13447 +
13448 + sx1503_0_20: sx150x@20 {
13449 + compatible = "semtech,sx1503q";
13450 + reg = <0x20>;
13451 + gpio-controller;
13452 + #gpio-cells = <2>;
13453 + #interrupt-cells = <2>;
13454 + interrupts = <25 2>; /* 1st word overwritten by sx1503-0-20-int-gpio parameter
13455 + 2nd word is 2 for falling-edge triggered */
13456 + status = "okay";
13457 + };
13458 + };
13459 + };
13460 +
13461 + // Enable a SX1503 on I2C#1 at slave addr 0x20
13462 + fragment@11 {
13463 + target = <&i2c1>;
13464 + __dormant__ {
13465 + #address-cells = <1>;
13466 + #size-cells = <0>;
13467 +
13468 + sx1503_1_20: sx150x@20 {
13469 + compatible = "semtech,sx1503q";
13470 + reg = <0x20>;
13471 + gpio-controller;
13472 + #gpio-cells = <2>;
13473 + #interrupt-cells = <2>;
13474 + interrupts = <25 2>; /* 1st word overwritten by sx1503-1-20-int-gpio parameter
13475 + 2nd word is 2 for falling-edge triggered */
13476 + status = "okay";
13477 + };
13478 + };
13479 + };
13480 +
13481 + // Enable a SX1504 on I2C#0 at slave addr 0x20
13482 + fragment@12 {
13483 + target = <&i2c0>;
13484 + __dormant__ {
13485 + #address-cells = <1>;
13486 + #size-cells = <0>;
13487 +
13488 + sx1504_0_20: sx150x@20 {
13489 + compatible = "semtech,sx1504q";
13490 + reg = <0x20>;
13491 + gpio-controller;
13492 + #gpio-cells = <2>;
13493 + #interrupt-cells = <2>;
13494 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-20-int-gpio parameter
13495 + 2nd word is 2 for falling-edge triggered */
13496 + status = "okay";
13497 + };
13498 + };
13499 + };
13500 +
13501 + // Enable a SX1504 on I2C#1 at slave addr 0x20
13502 + fragment@13 {
13503 + target = <&i2c1>;
13504 + __dormant__ {
13505 + #address-cells = <1>;
13506 + #size-cells = <0>;
13507 +
13508 + sx1504_1_20: sx150x@20 {
13509 + compatible = "semtech,sx1504q";
13510 + reg = <0x20>;
13511 + gpio-controller;
13512 + #gpio-cells = <2>;
13513 + #interrupt-cells = <2>;
13514 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
13515 + 2nd word is 2 for falling-edge triggered */
13516 + status = "okay";
13517 + };
13518 + };
13519 + };
13520 +
13521 + // Enable a SX1504 on I2C#0 at slave addr 0x21
13522 + fragment@14 {
13523 + target = <&i2c0>;
13524 + __dormant__ {
13525 + #address-cells = <1>;
13526 + #size-cells = <0>;
13527 +
13528 + sx1504_0_21: sx150x@21 {
13529 + compatible = "semtech,sx1504q";
13530 + reg = <0x21>;
13531 + gpio-controller;
13532 + #gpio-cells = <2>;
13533 + #interrupt-cells = <2>;
13534 + interrupts = <25 2>; /* 1st word overwritten by sx1504-0-21-int-gpio parameter
13535 + 2nd word is 2 for falling-edge triggered */
13536 + status = "okay";
13537 + };
13538 + };
13539 + };
13540 +
13541 + // Enable a SX1504 on I2C#1 at slave addr 0x21
13542 + fragment@15 {
13543 + target = <&i2c1>;
13544 + __dormant__ {
13545 + #address-cells = <1>;
13546 + #size-cells = <0>;
13547 +
13548 + sx1504_1_21: sx150x@21 {
13549 + compatible = "semtech,sx1504q";
13550 + reg = <0x21>;
13551 + gpio-controller;
13552 + #gpio-cells = <2>;
13553 + #interrupt-cells = <2>;
13554 + interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
13555 + 2nd word is 2 for falling-edge triggered */
13556 + status = "okay";
13557 + };
13558 + };
13559 + };
13560 +
13561 + // Enable a SX1505 on I2C#0 at slave addr 0x20
13562 + fragment@16 {
13563 + target = <&i2c0>;
13564 + __dormant__ {
13565 + #address-cells = <1>;
13566 + #size-cells = <0>;
13567 +
13568 + sx1505_0_20: sx150x@20 {
13569 + compatible = "semtech,sx1505q";
13570 + reg = <0x20>;
13571 + gpio-controller;
13572 + #gpio-cells = <2>;
13573 + #interrupt-cells = <2>;
13574 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-20-int-gpio parameter
13575 + 2nd word is 2 for falling-edge triggered */
13576 + status = "okay";
13577 + };
13578 + };
13579 + };
13580 +
13581 + // Enable a SX1505 on I2C#1 at slave addr 0x20
13582 + fragment@17 {
13583 + target = <&i2c1>;
13584 + __dormant__ {
13585 + #address-cells = <1>;
13586 + #size-cells = <0>;
13587 +
13588 + sx1505_1_20: sx150x@20 {
13589 + compatible = "semtech,sx1505q";
13590 + reg = <0x20>;
13591 + gpio-controller;
13592 + #gpio-cells = <2>;
13593 + #interrupt-cells = <2>;
13594 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-20-int-gpio parameter
13595 + 2nd word is 2 for falling-edge triggered */
13596 + status = "okay";
13597 + };
13598 + };
13599 + };
13600 +
13601 + // Enable a SX1505 on I2C#0 at slave addr 0x21
13602 + fragment@18 {
13603 + target = <&i2c0>;
13604 + __dormant__ {
13605 + #address-cells = <1>;
13606 + #size-cells = <0>;
13607 +
13608 + sx1505_0_21: sx150x@21 {
13609 + compatible = "semtech,sx1505q";
13610 + reg = <0x21>;
13611 + gpio-controller;
13612 + #gpio-cells = <2>;
13613 + #interrupt-cells = <2>;
13614 + interrupts = <25 2>; /* 1st word overwritten by sx1505-0-21-int-gpio parameter
13615 + 2nd word is 2 for falling-edge triggered */
13616 + status = "okay";
13617 + };
13618 + };
13619 + };
13620 +
13621 + // Enable a SX1505 on I2C#1 at slave addr 0x21
13622 + fragment@19 {
13623 + target = <&i2c1>;
13624 + __dormant__ {
13625 + #address-cells = <1>;
13626 + #size-cells = <0>;
13627 +
13628 + sx1505_1_21: sx150x@21 {
13629 + compatible = "semtech,sx1505q";
13630 + reg = <0x21>;
13631 + gpio-controller;
13632 + #gpio-cells = <2>;
13633 + #interrupt-cells = <2>;
13634 + interrupts = <25 2>; /* 1st word overwritten by sx1505-1-21-int-gpio parameter
13635 + 2nd word is 2 for falling-edge triggered */
13636 + status = "okay";
13637 + };
13638 + };
13639 + };
13640 +
13641 + // Enable a SX1506 on I2C#0 at slave addr 0x20
13642 + fragment@20 {
13643 + target = <&i2c0>;
13644 + __dormant__ {
13645 + #address-cells = <1>;
13646 + #size-cells = <0>;
13647 +
13648 + sx1506_0_20: sx150x@20 {
13649 + compatible = "semtech,sx1506q";
13650 + reg = <0x20>;
13651 + gpio-controller;
13652 + #gpio-cells = <2>;
13653 + #interrupt-cells = <2>;
13654 + interrupts = <25 2>; /* 1st word overwritten by sx1506-0-20-int-gpio parameter
13655 + 2nd word is 2 for falling-edge triggered */
13656 + status = "okay";
13657 + };
13658 + };
13659 + };
13660 +
13661 + // Enable a SX1506 on I2C#1 at slave addr 0x20
13662 + fragment@21 {
13663 + target = <&i2c1>;
13664 + __dormant__ {
13665 + #address-cells = <1>;
13666 + #size-cells = <0>;
13667 +
13668 + sx1506_1_20: sx150x@20 {
13669 + compatible = "semtech,sx1506q";
13670 + reg = <0x20>;
13671 + gpio-controller;
13672 + #gpio-cells = <2>;
13673 + #interrupt-cells = <2>;
13674 + interrupts = <25 2>; /* 1st word overwritten by sx1506-1-20-int-gpio parameter
13675 + 2nd word is 2 for falling-edge triggered */
13676 + status = "okay";
13677 + };
13678 + };
13679 + };
13680 +
13681 + // Enable a SX1507 on I2C#0 at slave addr 0x3E
13682 + fragment@22 {
13683 + target = <&i2c0>;
13684 + __dormant__ {
13685 + #address-cells = <1>;
13686 + #size-cells = <0>;
13687 +
13688 + sx1507_0_3E: sx150x@3E {
13689 + compatible = "semtech,sx1507q";
13690 + reg = <0x3E>;
13691 + gpio-controller;
13692 + #gpio-cells = <2>;
13693 + #interrupt-cells = <2>;
13694 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3E-int-gpio parameter
13695 + 2nd word is 2 for falling-edge triggered */
13696 + status = "okay";
13697 + };
13698 + };
13699 + };
13700 +
13701 + // Enable a SX1507 on I2C#1 at slave addr 0x3E
13702 + fragment@23 {
13703 + target = <&i2c1>;
13704 + __dormant__ {
13705 + #address-cells = <1>;
13706 + #size-cells = <0>;
13707 +
13708 + sx1507_1_3E: sx150x@3E {
13709 + compatible = "semtech,sx1507q";
13710 + reg = <0x3E>;
13711 + gpio-controller;
13712 + #gpio-cells = <2>;
13713 + #interrupt-cells = <2>;
13714 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3E-int-gpio parameter
13715 + 2nd word is 2 for falling-edge triggered */
13716 + status = "okay";
13717 + };
13718 + };
13719 + };
13720 +
13721 + // Enable a SX1507 on I2C#0 at slave addr 0x3F
13722 + fragment@24 {
13723 + target = <&i2c0>;
13724 + __dormant__ {
13725 + #address-cells = <1>;
13726 + #size-cells = <0>;
13727 +
13728 + sx1507_0_3F: sx150x@3F {
13729 + compatible = "semtech,sx1507q";
13730 + reg = <0x3F>;
13731 + gpio-controller;
13732 + #gpio-cells = <2>;
13733 + #interrupt-cells = <2>;
13734 + interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3F-int-gpio parameter
13735 + 2nd word is 2 for falling-edge triggered */
13736 + status = "okay";
13737 + };
13738 + };
13739 + };
13740 +
13741 + // Enable a SX1507 on I2C#1 at slave addr 0x3F
13742 + fragment@25 {
13743 + target = <&i2c1>;
13744 + __dormant__ {
13745 + #address-cells = <1>;
13746 + #size-cells = <0>;
13747 +
13748 + sx1507_1_3F: sx150x@3F {
13749 + compatible = "semtech,sx1507q";
13750 + reg = <0x3F>;
13751 + gpio-controller;
13752 + #gpio-cells = <2>;
13753 + #interrupt-cells = <2>;
13754 + interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3F-int-gpio parameter
13755 + 2nd word is 2 for falling-edge triggered */
13756 + status = "okay";
13757 + };
13758 + };
13759 + };
13760 +
13761 + // Enable a SX1507 on I2C#0 at slave addr 0x70
13762 + fragment@26 {
13763 + target = <&i2c0>;
13764 + __dormant__ {
13765 + #address-cells = <1>;
13766 + #size-cells = <0>;
13767 +
13768 + sx1507_0_70: sx150x@70 {
13769 + compatible = "semtech,sx1507q";
13770 + reg = <0x70>;
13771 + gpio-controller;
13772 + #gpio-cells = <2>;
13773 + #interrupt-cells = <2>;
13774 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-70-int-gpio parameter
13775 + 2nd word is 2 for falling-edge triggered */
13776 + status = "okay";
13777 + };
13778 + };
13779 + };
13780 +
13781 + // Enable a SX1507 on I2C#1 at slave addr 0x70
13782 + fragment@27 {
13783 + target = <&i2c1>;
13784 + __dormant__ {
13785 + #address-cells = <1>;
13786 + #size-cells = <0>;
13787 +
13788 + sx1507_1_70: sx150x@70 {
13789 + compatible = "semtech,sx1507q";
13790 + reg = <0x70>;
13791 + gpio-controller;
13792 + #gpio-cells = <2>;
13793 + #interrupt-cells = <2>;
13794 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-70-int-gpio parameter
13795 + 2nd word is 2 for falling-edge triggered */
13796 + status = "okay";
13797 + };
13798 + };
13799 + };
13800 +
13801 + // Enable a SX1507 on I2C#0 at slave addr 0x71
13802 + fragment@28 {
13803 + target = <&i2c0>;
13804 + __dormant__ {
13805 + #address-cells = <1>;
13806 + #size-cells = <0>;
13807 +
13808 + sx1507_0_71: sx150x@71 {
13809 + compatible = "semtech,sx1507q";
13810 + reg = <0x71>;
13811 + gpio-controller;
13812 + #gpio-cells = <2>;
13813 + #interrupt-cells = <2>;
13814 + interrupts = <25 2>; /* 1st word overwritten by sx1507-0-71-int-gpio parameter
13815 + 2nd word is 2 for falling-edge triggered */
13816 + status = "okay";
13817 + };
13818 + };
13819 + };
13820 +
13821 + // Enable a SX1507 on I2C#1 at slave addr 0x71
13822 + fragment@29 {
13823 + target = <&i2c1>;
13824 + __dormant__ {
13825 + #address-cells = <1>;
13826 + #size-cells = <0>;
13827 +
13828 + sx1507_1_71: sx150x@71 {
13829 + compatible = "semtech,sx1507q";
13830 + reg = <0x71>;
13831 + gpio-controller;
13832 + #gpio-cells = <2>;
13833 + #interrupt-cells = <2>;
13834 + interrupts = <25 2>; /* 1st word overwritten by sx1507-1-71-int-gpio parameter
13835 + 2nd word is 2 for falling-edge triggered */
13836 + status = "okay";
13837 + };
13838 + };
13839 + };
13840 +
13841 + // Enable a SX1508 on I2C#0 at slave addr 0x20
13842 + fragment@30 {
13843 + target = <&i2c0>;
13844 + __dormant__ {
13845 + #address-cells = <1>;
13846 + #size-cells = <0>;
13847 +
13848 + sx1508_0_20: sx150x@20 {
13849 + compatible = "semtech,sx1508q";
13850 + reg = <0x20>;
13851 + gpio-controller;
13852 + #gpio-cells = <2>;
13853 + #interrupt-cells = <2>;
13854 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-20-int-gpio parameter
13855 + 2nd word is 2 for falling-edge triggered */
13856 + status = "okay";
13857 + };
13858 + };
13859 + };
13860 +
13861 + // Enable a SX1508 on I2C#1 at slave addr 0x20
13862 + fragment@31 {
13863 + target = <&i2c1>;
13864 + __dormant__ {
13865 + #address-cells = <1>;
13866 + #size-cells = <0>;
13867 +
13868 + sx1508_1_20: sx150x@20 {
13869 + compatible = "semtech,sx1508q";
13870 + reg = <0x20>;
13871 + gpio-controller;
13872 + #gpio-cells = <2>;
13873 + #interrupt-cells = <2>;
13874 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-20-int-gpio parameter
13875 + 2nd word is 2 for falling-edge triggered */
13876 + status = "okay";
13877 + };
13878 + };
13879 + };
13880 +
13881 + // Enable a SX1508 on I2C#0 at slave addr 0x21
13882 + fragment@32 {
13883 + target = <&i2c0>;
13884 + __dormant__ {
13885 + #address-cells = <1>;
13886 + #size-cells = <0>;
13887 +
13888 + sx1508_0_21: sx150x@21 {
13889 + compatible = "semtech,sx1508q";
13890 + reg = <0x21>;
13891 + gpio-controller;
13892 + #gpio-cells = <2>;
13893 + #interrupt-cells = <2>;
13894 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-21-int-gpio parameter
13895 + 2nd word is 2 for falling-edge triggered */
13896 + status = "okay";
13897 + };
13898 + };
13899 + };
13900 +
13901 + // Enable a SX1508 on I2C#1 at slave addr 0x21
13902 + fragment@33 {
13903 + target = <&i2c1>;
13904 + __dormant__ {
13905 + #address-cells = <1>;
13906 + #size-cells = <0>;
13907 +
13908 + sx1508_1_21: sx150x@21 {
13909 + compatible = "semtech,sx1508q";
13910 + reg = <0x21>;
13911 + gpio-controller;
13912 + #gpio-cells = <2>;
13913 + #interrupt-cells = <2>;
13914 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-21-int-gpio parameter
13915 + 2nd word is 2 for falling-edge triggered */
13916 + status = "okay";
13917 + };
13918 + };
13919 + };
13920 +
13921 + // Enable a SX1508 on I2C#0 at slave addr 0x22
13922 + fragment@34 {
13923 + target = <&i2c0>;
13924 + __dormant__ {
13925 + #address-cells = <1>;
13926 + #size-cells = <0>;
13927 +
13928 + sx1508_0_22: sx150x@22 {
13929 + compatible = "semtech,sx1508q";
13930 + reg = <0x22>;
13931 + gpio-controller;
13932 + #gpio-cells = <2>;
13933 + #interrupt-cells = <2>;
13934 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-22-int-gpio parameter
13935 + 2nd word is 2 for falling-edge triggered */
13936 + status = "okay";
13937 + };
13938 + };
13939 + };
13940 +
13941 + // Enable a SX1508 on I2C#1 at slave addr 0x22
13942 + fragment@35 {
13943 + target = <&i2c1>;
13944 + __dormant__ {
13945 + #address-cells = <1>;
13946 + #size-cells = <0>;
13947 +
13948 + sx1508_1_22: sx150x@22 {
13949 + compatible = "semtech,sx1508q";
13950 + reg = <0x22>;
13951 + gpio-controller;
13952 + #gpio-cells = <2>;
13953 + #interrupt-cells = <2>;
13954 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-22-int-gpio parameter
13955 + 2nd word is 2 for falling-edge triggered */
13956 + status = "okay";
13957 + };
13958 + };
13959 + };
13960 +
13961 + // Enable a SX1508 on I2C#0 at slave addr 0x23
13962 + fragment@36 {
13963 + target = <&i2c0>;
13964 + __dormant__ {
13965 + #address-cells = <1>;
13966 + #size-cells = <0>;
13967 +
13968 + sx1508_0_23: sx150x@23 {
13969 + compatible = "semtech,sx1508q";
13970 + reg = <0x23>;
13971 + gpio-controller;
13972 + #gpio-cells = <2>;
13973 + #interrupt-cells = <2>;
13974 + interrupts = <25 2>; /* 1st word overwritten by sx1508-0-23-int-gpio parameter
13975 + 2nd word is 2 for falling-edge triggered */
13976 + status = "okay";
13977 + };
13978 + };
13979 + };
13980 +
13981 + // Enable a SX1508 on I2C#1 at slave addr 0x23
13982 + fragment@37 {
13983 + target = <&i2c1>;
13984 + __dormant__ {
13985 + #address-cells = <1>;
13986 + #size-cells = <0>;
13987 +
13988 + sx1508_1_23: sx150x@23 {
13989 + compatible = "semtech,sx1508q";
13990 + reg = <0x23>;
13991 + gpio-controller;
13992 + #gpio-cells = <2>;
13993 + #interrupt-cells = <2>;
13994 + interrupts = <25 2>; /* 1st word overwritten by sx1508-1-23-int-gpio parameter
13995 + 2nd word is 2 for falling-edge triggered */
13996 + status = "okay";
13997 + };
13998 + };
13999 + };
14000 +
14001 + // Enable a SX1509 on I2C#0 at slave addr 0x3E
14002 + fragment@38 {
14003 + target = <&i2c0>;
14004 + __dormant__ {
14005 + #address-cells = <1>;
14006 + #size-cells = <0>;
14007 +
14008 + sx1509_0_3E: sx150x@3E {
14009 + compatible = "semtech,sx1509q";
14010 + reg = <0x3E>;
14011 + gpio-controller;
14012 + #gpio-cells = <2>;
14013 + #interrupt-cells = <2>;
14014 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3E-int-gpio parameter
14015 + 2nd word is 2 for falling-edge triggered */
14016 + status = "okay";
14017 + };
14018 + };
14019 + };
14020 +
14021 + // Enable a SX1509 on I2C#1 at slave addr 0x3E
14022 + fragment@39 {
14023 + target = <&i2c1>;
14024 + __dormant__ {
14025 + #address-cells = <1>;
14026 + #size-cells = <0>;
14027 +
14028 + sx1509_1_3E: sx150x@3E {
14029 + compatible = "semtech,sx1509q";
14030 + reg = <0x3E>;
14031 + gpio-controller;
14032 + #gpio-cells = <2>;
14033 + #interrupt-cells = <2>;
14034 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3E-int-gpio parameter
14035 + 2nd word is 2 for falling-edge triggered */
14036 + status = "okay";
14037 + };
14038 + };
14039 + };
14040 +
14041 + // Enable a SX1509 on I2C#0 at slave addr 0x3F
14042 + fragment@40 {
14043 + target = <&i2c0>;
14044 + __dormant__ {
14045 + #address-cells = <1>;
14046 + #size-cells = <0>;
14047 +
14048 + sx1509_0_3F: sx150x@3F {
14049 + compatible = "semtech,sx1509q";
14050 + reg = <0x3F>;
14051 + gpio-controller;
14052 + #gpio-cells = <2>;
14053 + #interrupt-cells = <2>;
14054 + interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3F-int-gpio parameter
14055 + 2nd word is 2 for falling-edge triggered */
14056 + status = "okay";
14057 + };
14058 + };
14059 + };
14060 +
14061 + // Enable a SX1509 on I2C#1 at slave addr 0x3F
14062 + fragment@41 {
14063 + target = <&i2c1>;
14064 + __dormant__ {
14065 + #address-cells = <1>;
14066 + #size-cells = <0>;
14067 +
14068 + sx1509_1_3F: sx150x@3F {
14069 + compatible = "semtech,sx1509q";
14070 + reg = <0x3F>;
14071 + gpio-controller;
14072 + #gpio-cells = <2>;
14073 + #interrupt-cells = <2>;
14074 + interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3F-int-gpio parameter
14075 + 2nd word is 2 for falling-edge triggered */
14076 + status = "okay";
14077 + };
14078 + };
14079 + };
14080 +
14081 + // Enable a SX1509 on I2C#0 at slave addr 0x70
14082 + fragment@42 {
14083 + target = <&i2c0>;
14084 + __dormant__ {
14085 + #address-cells = <1>;
14086 + #size-cells = <0>;
14087 +
14088 + sx1509_0_70: sx150x@70 {
14089 + compatible = "semtech,sx1509q";
14090 + reg = <0x70>;
14091 + gpio-controller;
14092 + #gpio-cells = <2>;
14093 + #interrupt-cells = <2>;
14094 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-70-int-gpio parameter
14095 + 2nd word is 2 for falling-edge triggered */
14096 + status = "okay";
14097 + };
14098 + };
14099 + };
14100 +
14101 + // Enable a SX1509 on I2C#1 at slave addr 0x70
14102 + fragment@43 {
14103 + target = <&i2c1>;
14104 + __dormant__ {
14105 + #address-cells = <1>;
14106 + #size-cells = <0>;
14107 +
14108 + sx1509_1_70: sx150x@70 {
14109 + compatible = "semtech,sx1509q";
14110 + reg = <0x70>;
14111 + gpio-controller;
14112 + #gpio-cells = <2>;
14113 + #interrupt-cells = <2>;
14114 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-70-int-gpio parameter
14115 + 2nd word is 2 for falling-edge triggered */
14116 + status = "okay";
14117 + };
14118 + };
14119 + };
14120 +
14121 + // Enable a SX1509 on I2C#0 at slave addr 0x71
14122 + fragment@44 {
14123 + target = <&i2c0>;
14124 + __dormant__ {
14125 + #address-cells = <1>;
14126 + #size-cells = <0>;
14127 +
14128 + sx1509_0_71: sx150x@71 {
14129 + compatible = "semtech,sx1509q";
14130 + reg = <0x71>;
14131 + gpio-controller;
14132 + #gpio-cells = <2>;
14133 + #interrupt-cells = <2>;
14134 + interrupts = <25 2>; /* 1st word overwritten by sx1509-0-71-int-gpio parameter
14135 + 2nd word is 2 for falling-edge triggered */
14136 + status = "okay";
14137 + };
14138 + };
14139 + };
14140 +
14141 + // Enable a SX1509 on I2C#1 at slave addr 0x71
14142 + fragment@45 {
14143 + target = <&i2c1>;
14144 + __dormant__ {
14145 + #address-cells = <1>;
14146 + #size-cells = <0>;
14147 +
14148 + sx1509_1_71: sx150x@71 {
14149 + compatible = "semtech,sx1509q";
14150 + reg = <0x71>;
14151 + gpio-controller;
14152 + #gpio-cells = <2>;
14153 + #interrupt-cells = <2>;
14154 + interrupts = <25 2>; /* 1st word overwritten by sx1509-1-71-int-gpio parameter
14155 + 2nd word is 2 for falling-edge triggered */
14156 + status = "okay";
14157 + };
14158 + };
14159 + };
14160 +
14161 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x20
14162 + fragment@46 {
14163 + target = <&sx1501_0_20>;
14164 + __dormant__ {
14165 + interrupt-parent = <&gpio>;
14166 + interrupt-controller;
14167 + pinctrl-names = "default";
14168 + pinctrl-0 = <&sx150x_0_20_pins>;
14169 + };
14170 + };
14171 +
14172 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x20
14173 + fragment@47 {
14174 + target = <&sx1501_1_20>;
14175 + __dormant__ {
14176 + interrupt-parent = <&gpio>;
14177 + interrupt-controller;
14178 + pinctrl-names = "default";
14179 + pinctrl-0 = <&sx150x_1_20_pins>;
14180 + };
14181 + };
14182 +
14183 + // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x21
14184 + fragment@48 {
14185 + target = <&sx1501_0_21>;
14186 + __dormant__ {
14187 + interrupt-parent = <&gpio>;
14188 + interrupt-controller;
14189 + pinctrl-names = "default";
14190 + pinctrl-0 = <&sx150x_0_21_pins>;
14191 + };
14192 + };
14193 +
14194 + // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x21
14195 + fragment@49 {
14196 + target = <&sx1501_1_21>;
14197 + __dormant__ {
14198 + interrupt-parent = <&gpio>;
14199 + interrupt-controller;
14200 + pinctrl-names = "default";
14201 + pinctrl-0 = <&sx150x_1_21_pins>;
14202 + };
14203 + };
14204 +
14205 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x20
14206 + fragment@50 {
14207 + target = <&sx1502_0_20>;
14208 + __dormant__ {
14209 + interrupt-parent = <&gpio>;
14210 + interrupt-controller;
14211 + pinctrl-names = "default";
14212 + pinctrl-0 = <&sx150x_0_20_pins>;
14213 + };
14214 + };
14215 +
14216 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x20
14217 + fragment@51 {
14218 + target = <&sx1502_1_20>;
14219 + __dormant__ {
14220 + interrupt-parent = <&gpio>;
14221 + interrupt-controller;
14222 + pinctrl-names = "default";
14223 + pinctrl-0 = <&sx150x_1_20_pins>;
14224 + };
14225 + };
14226 +
14227 + // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x21
14228 + fragment@52 {
14229 + target = <&sx1502_0_21>;
14230 + __dormant__ {
14231 + interrupt-parent = <&gpio>;
14232 + interrupt-controller;
14233 + pinctrl-names = "default";
14234 + pinctrl-0 = <&sx150x_0_21_pins>;
14235 + };
14236 + };
14237 +
14238 + // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x21
14239 + fragment@53 {
14240 + target = <&sx1502_1_21>;
14241 + __dormant__ {
14242 + interrupt-parent = <&gpio>;
14243 + interrupt-controller;
14244 + pinctrl-names = "default";
14245 + pinctrl-0 = <&sx150x_1_21_pins>;
14246 + };
14247 + };
14248 +
14249 + // Enable interrupts for a SX1503 on I2C#0 at slave addr 0x20
14250 + fragment@54 {
14251 + target = <&sx1503_0_20>;
14252 + __dormant__ {
14253 + interrupt-parent = <&gpio>;
14254 + interrupt-controller;
14255 + pinctrl-names = "default";
14256 + pinctrl-0 = <&sx150x_0_20_pins>;
14257 + };
14258 + };
14259 +
14260 + // Enable interrupts for a SX1503 on I2C#1 at slave addr 0x20
14261 + fragment@55 {
14262 + target = <&sx1503_1_20>;
14263 + __dormant__ {
14264 + interrupt-parent = <&gpio>;
14265 + interrupt-controller;
14266 + pinctrl-names = "default";
14267 + pinctrl-0 = <&sx150x_1_20_pins>;
14268 + };
14269 + };
14270 +
14271 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x20
14272 + fragment@56 {
14273 + target = <&sx1504_0_20>;
14274 + __dormant__ {
14275 + interrupt-parent = <&gpio>;
14276 + interrupt-controller;
14277 + pinctrl-names = "default";
14278 + pinctrl-0 = <&sx150x_0_20_pins>;
14279 + };
14280 + };
14281 +
14282 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x20
14283 + fragment@57 {
14284 + target = <&sx1504_1_20>;
14285 + __dormant__ {
14286 + interrupt-parent = <&gpio>;
14287 + interrupt-controller;
14288 + pinctrl-names = "default";
14289 + pinctrl-0 = <&sx150x_1_20_pins>;
14290 + };
14291 + };
14292 +
14293 + // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x21
14294 + fragment@58 {
14295 + target = <&sx1504_0_21>;
14296 + __dormant__ {
14297 + interrupt-parent = <&gpio>;
14298 + interrupt-controller;
14299 + pinctrl-names = "default";
14300 + pinctrl-0 = <&sx150x_0_21_pins>;
14301 + };
14302 + };
14303 +
14304 + // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x21
14305 + fragment@59 {
14306 + target = <&sx1504_1_21>;
14307 + __dormant__ {
14308 + interrupt-parent = <&gpio>;
14309 + interrupt-controller;
14310 + pinctrl-names = "default";
14311 + pinctrl-0 = <&sx150x_1_21_pins>;
14312 + };
14313 + };
14314 +
14315 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x20
14316 + fragment@60 {
14317 + target = <&sx1505_0_20>;
14318 + __dormant__ {
14319 + interrupt-parent = <&gpio>;
14320 + interrupt-controller;
14321 + pinctrl-names = "default";
14322 + pinctrl-0 = <&sx150x_0_20_pins>;
14323 + };
14324 + };
14325 +
14326 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x20
14327 + fragment@61 {
14328 + target = <&sx1505_1_20>;
14329 + __dormant__ {
14330 + interrupt-parent = <&gpio>;
14331 + interrupt-controller;
14332 + pinctrl-names = "default";
14333 + pinctrl-0 = <&sx150x_1_20_pins>;
14334 + };
14335 + };
14336 +
14337 + // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x21
14338 + fragment@62 {
14339 + target = <&sx1505_0_21>;
14340 + __dormant__ {
14341 + interrupt-parent = <&gpio>;
14342 + interrupt-controller;
14343 + pinctrl-names = "default";
14344 + pinctrl-0 = <&sx150x_0_21_pins>;
14345 + };
14346 + };
14347 +
14348 + // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x21
14349 + fragment@63 {
14350 + target = <&sx1505_1_21>;
14351 + __dormant__ {
14352 + interrupt-parent = <&gpio>;
14353 + interrupt-controller;
14354 + pinctrl-names = "default";
14355 + pinctrl-0 = <&sx150x_1_21_pins>;
14356 + };
14357 + };
14358 +
14359 + // Enable interrupts for a SX1506 on I2C#0 at slave addr 0x20
14360 + fragment@64 {
14361 + target = <&sx1506_0_20>;
14362 + __dormant__ {
14363 + interrupt-parent = <&gpio>;
14364 + interrupt-controller;
14365 + pinctrl-names = "default";
14366 + pinctrl-0 = <&sx150x_0_20_pins>;
14367 + };
14368 + };
14369 +
14370 + // Enable interrupts for a SX1506 on I2C#1 at slave addr 0x20
14371 + fragment@65 {
14372 + target = <&sx1506_1_20>;
14373 + __dormant__ {
14374 + interrupt-parent = <&gpio>;
14375 + interrupt-controller;
14376 + pinctrl-names = "default";
14377 + pinctrl-0 = <&sx150x_1_20_pins>;
14378 + };
14379 + };
14380 +
14381 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3E
14382 + fragment@66 {
14383 + target = <&sx1507_0_3E>;
14384 + __dormant__ {
14385 + interrupt-parent = <&gpio>;
14386 + interrupt-controller;
14387 + pinctrl-names = "default";
14388 + pinctrl-0 = <&sx150x_0_3E_pins>;
14389 + };
14390 + };
14391 +
14392 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3E
14393 + fragment@67 {
14394 + target = <&sx1507_1_3E>;
14395 + __dormant__ {
14396 + interrupt-parent = <&gpio>;
14397 + interrupt-controller;
14398 + pinctrl-names = "default";
14399 + pinctrl-0 = <&sx150x_1_3E_pins>;
14400 + };
14401 + };
14402 +
14403 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3F
14404 + fragment@68 {
14405 + target = <&sx1507_0_3F>;
14406 + __dormant__ {
14407 + interrupt-parent = <&gpio>;
14408 + interrupt-controller;
14409 + pinctrl-names = "default";
14410 + pinctrl-0 = <&sx150x_0_3F_pins>;
14411 + };
14412 + };
14413 +
14414 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3F
14415 + fragment@69 {
14416 + target = <&sx1507_1_3F>;
14417 + __dormant__ {
14418 + interrupt-parent = <&gpio>;
14419 + interrupt-controller;
14420 + pinctrl-names = "default";
14421 + pinctrl-0 = <&sx150x_1_3F_pins>;
14422 + };
14423 + };
14424 +
14425 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x70
14426 + fragment@70 {
14427 + target = <&sx1507_0_70>;
14428 + __dormant__ {
14429 + interrupt-parent = <&gpio>;
14430 + interrupt-controller;
14431 + pinctrl-names = "default";
14432 + pinctrl-0 = <&sx150x_1_70_pins>;
14433 + };
14434 + };
14435 +
14436 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x70
14437 + fragment@71 {
14438 + target = <&sx1507_1_70>;
14439 + __dormant__ {
14440 + interrupt-parent = <&gpio>;
14441 + interrupt-controller;
14442 + pinctrl-names = "default";
14443 + pinctrl-0 = <&sx150x_1_70_pins>;
14444 + };
14445 + };
14446 +
14447 + // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x71
14448 + fragment@72 {
14449 + target = <&sx1507_0_71>;
14450 + __dormant__ {
14451 + interrupt-parent = <&gpio>;
14452 + interrupt-controller;
14453 + pinctrl-names = "default";
14454 + pinctrl-0 = <&sx150x_0_71_pins>;
14455 + };
14456 + };
14457 +
14458 + // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x71
14459 + fragment@73 {
14460 + target = <&sx1507_1_71>;
14461 + __dormant__ {
14462 + interrupt-parent = <&gpio>;
14463 + interrupt-controller;
14464 + pinctrl-names = "default";
14465 + pinctrl-0 = <&sx150x_1_71_pins>;
14466 + };
14467 + };
14468 +
14469 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x20
14470 + fragment@74 {
14471 + target = <&sx1508_0_20>;
14472 + __dormant__ {
14473 + interrupt-parent = <&gpio>;
14474 + interrupt-controller;
14475 + pinctrl-names = "default";
14476 + pinctrl-0 = <&sx150x_0_20_pins>;
14477 + };
14478 + };
14479 +
14480 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x20
14481 + fragment@75 {
14482 + target = <&sx1508_1_20>;
14483 + __dormant__ {
14484 + interrupt-parent = <&gpio>;
14485 + interrupt-controller;
14486 + pinctrl-names = "default";
14487 + pinctrl-0 = <&sx150x_1_20_pins>;
14488 + };
14489 + };
14490 +
14491 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x21
14492 + fragment@76 {
14493 + target = <&sx1508_0_21>;
14494 + __dormant__ {
14495 + interrupt-parent = <&gpio>;
14496 + interrupt-controller;
14497 + pinctrl-names = "default";
14498 + pinctrl-0 = <&sx150x_0_21_pins>;
14499 + };
14500 + };
14501 +
14502 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x21
14503 + fragment@77 {
14504 + target = <&sx1508_1_21>;
14505 + __dormant__ {
14506 + interrupt-parent = <&gpio>;
14507 + interrupt-controller;
14508 + pinctrl-names = "default";
14509 + pinctrl-0 = <&sx150x_1_21_pins>;
14510 + };
14511 + };
14512 +
14513 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x22
14514 + fragment@78 {
14515 + target = <&sx1508_0_22>;
14516 + __dormant__ {
14517 + interrupt-parent = <&gpio>;
14518 + interrupt-controller;
14519 + pinctrl-names = "default";
14520 + pinctrl-0 = <&sx150x_0_22_pins>;
14521 + };
14522 + };
14523 +
14524 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x22
14525 + fragment@79 {
14526 + target = <&sx1508_1_22>;
14527 + __dormant__ {
14528 + interrupt-parent = <&gpio>;
14529 + interrupt-controller;
14530 + pinctrl-names = "default";
14531 + pinctrl-0 = <&sx150x_1_22_pins>;
14532 + };
14533 + };
14534 +
14535 + // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x23
14536 + fragment@80 {
14537 + target = <&sx1508_0_23>;
14538 + __dormant__ {
14539 + interrupt-parent = <&gpio>;
14540 + interrupt-controller;
14541 + pinctrl-names = "default";
14542 + pinctrl-0 = <&sx150x_0_23_pins>;
14543 + };
14544 + };
14545 +
14546 + // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x23
14547 + fragment@81 {
14548 + target = <&sx1508_1_23>;
14549 + __dormant__ {
14550 + interrupt-parent = <&gpio>;
14551 + interrupt-controller;
14552 + pinctrl-names = "default";
14553 + pinctrl-0 = <&sx150x_1_23_pins>;
14554 + };
14555 + };
14556 +
14557 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3E
14558 + fragment@82 {
14559 + target = <&sx1509_0_3E>;
14560 + __dormant__ {
14561 + interrupt-parent = <&gpio>;
14562 + interrupt-controller;
14563 + pinctrl-names = "default";
14564 + pinctrl-0 = <&sx150x_0_3E_pins>;
14565 + };
14566 + };
14567 +
14568 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3E
14569 + fragment@83 {
14570 + target = <&sx1509_1_3E>;
14571 + __dormant__ {
14572 + interrupt-parent = <&gpio>;
14573 + interrupt-controller;
14574 + pinctrl-names = "default";
14575 + pinctrl-0 = <&sx150x_1_3E_pins>;
14576 + };
14577 + };
14578 +
14579 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3F
14580 + fragment@84 {
14581 + target = <&sx1509_0_3F>;
14582 + __dormant__ {
14583 + interrupt-parent = <&gpio>;
14584 + interrupt-controller;
14585 + pinctrl-names = "default";
14586 + pinctrl-0 = <&sx150x_0_3F_pins>;
14587 + };
14588 + };
14589 +
14590 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3F
14591 + fragment@85 {
14592 + target = <&sx1509_1_3F>;
14593 + __dormant__ {
14594 + interrupt-parent = <&gpio>;
14595 + interrupt-controller;
14596 + pinctrl-names = "default";
14597 + pinctrl-0 = <&sx150x_1_3F_pins>;
14598 + };
14599 + };
14600 +
14601 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x70
14602 + fragment@86 {
14603 + target = <&sx1509_0_70>;
14604 + __dormant__ {
14605 + interrupt-parent = <&gpio>;
14606 + interrupt-controller;
14607 + pinctrl-names = "default";
14608 + pinctrl-0 = <&sx150x_0_70_pins>;
14609 + };
14610 + };
14611 +
14612 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x70
14613 + fragment@87 {
14614 + target = <&sx1509_1_70>;
14615 + __dormant__ {
14616 + interrupt-parent = <&gpio>;
14617 + interrupt-controller;
14618 + pinctrl-names = "default";
14619 + pinctrl-0 = <&sx150x_1_70_pins>;
14620 + };
14621 + };
14622 +
14623 + // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x71
14624 + fragment@88 {
14625 + target = <&sx1509_0_71>;
14626 + __dormant__ {
14627 + interrupt-parent = <&gpio>;
14628 + interrupt-controller;
14629 + pinctrl-names = "default";
14630 + pinctrl-0 = <&sx150x_0_71_pins>;
14631 + };
14632 + };
14633 +
14634 + // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x71
14635 + fragment@89 {
14636 + target = <&sx1509_1_71>;
14637 + __dormant__ {
14638 + interrupt-parent = <&gpio>;
14639 + interrupt-controller;
14640 + pinctrl-names = "default";
14641 + pinctrl-0 = <&sx150x_1_71_pins>;
14642 + };
14643 + };
14644 +
14645 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x20
14646 + // Configure as a input with no pull-up/down
14647 + fragment@90 {
14648 + target = <&gpio>;
14649 + __dormant__ {
14650 + sx150x_0_20_pins: sx150x_0_20_pins {
14651 + brcm,pins = <0>; /* overwritten by sx150x-0-20-int-gpio parameter */
14652 + brcm,function = <0>;
14653 + brcm,pull = <0>;
14654 + };
14655 + };
14656 + };
14657 +
14658 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x20
14659 + // Configure as a input with no pull-up/down
14660 + fragment@91 {
14661 + target = <&gpio>;
14662 + __dormant__ {
14663 + sx150x_1_20_pins: sx150x_1_20_pins {
14664 + brcm,pins = <0>; /* overwritten by sx150x-1-20-int-gpio parameter */
14665 + brcm,function = <0>;
14666 + brcm,pull = <0>;
14667 + };
14668 + };
14669 + };
14670 +
14671 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x21
14672 + // Configure as a input with no pull-up/down
14673 + fragment@92 {
14674 + target = <&gpio>;
14675 + __dormant__ {
14676 + sx150x_0_21_pins: sx150x_0_21_pins {
14677 + brcm,pins = <0>; /* overwritten by sx150x-0-21-int-gpio parameter */
14678 + brcm,function = <0>;
14679 + brcm,pull = <0>;
14680 + };
14681 + };
14682 + };
14683 +
14684 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x21
14685 + // Configure as a input with no pull-up/down
14686 + fragment@93 {
14687 + target = <&gpio>;
14688 + __dormant__ {
14689 + sx150x_1_21_pins: sx150x_1_21_pins {
14690 + brcm,pins = <0>; /* overwritten by sx150x-1-21-int-gpio parameter */
14691 + brcm,function = <0>;
14692 + brcm,pull = <0>;
14693 + };
14694 + };
14695 + };
14696 +
14697 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x22
14698 + // Configure as a input with no pull-up/down
14699 + fragment@94 {
14700 + target = <&gpio>;
14701 + __dormant__ {
14702 + sx150x_0_22_pins: sx150x_0_22_pins {
14703 + brcm,pins = <0>; /* overwritten by sx150x-0-22-int-gpio parameter */
14704 + brcm,function = <0>;
14705 + brcm,pull = <0>;
14706 + };
14707 + };
14708 + };
14709 +
14710 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x22
14711 + // Configure as a input with no pull-up/down
14712 + fragment@95 {
14713 + target = <&gpio>;
14714 + __dormant__ {
14715 + sx150x_1_22_pins: sx150x_1_22_pins {
14716 + brcm,pins = <0>; /* overwritten by sx150x-1-22-int-gpio parameter */
14717 + brcm,function = <0>;
14718 + brcm,pull = <0>;
14719 + };
14720 + };
14721 + };
14722 +
14723 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x23
14724 + // Configure as a input with no pull-up/down
14725 + fragment@96 {
14726 + target = <&gpio>;
14727 + __dormant__ {
14728 + sx150x_0_23_pins: sx150x_0_23_pins {
14729 + brcm,pins = <0>; /* overwritten by sx150x-0-23-int-gpio parameter */
14730 + brcm,function = <0>;
14731 + brcm,pull = <0>;
14732 + };
14733 + };
14734 + };
14735 +
14736 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x23
14737 + // Configure as a input with no pull-up/down
14738 + fragment@97 {
14739 + target = <&gpio>;
14740 + __dormant__ {
14741 + sx150x_1_23_pins: sx150x_1_23_pins {
14742 + brcm,pins = <0>; /* overwritten by sx150x-1-23-int-gpio parameter */
14743 + brcm,function = <0>;
14744 + brcm,pull = <0>;
14745 + };
14746 + };
14747 + };
14748 +
14749 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3E
14750 + // Configure as a input with no pull-up/down
14751 + fragment@98 {
14752 + target = <&gpio>;
14753 + __dormant__ {
14754 + sx150x_0_3E_pins: sx150x_0_3E_pins {
14755 + brcm,pins = <0>; /* overwritten by sx150x-0-3E-int-gpio parameter */
14756 + brcm,function = <0>;
14757 + brcm,pull = <0>;
14758 + };
14759 + };
14760 + };
14761 +
14762 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3E
14763 + // Configure as a input with no pull-up/down
14764 + fragment@99 {
14765 + target = <&gpio>;
14766 + __dormant__ {
14767 + sx150x_1_3E_pins: sx150x_1_3E_pins {
14768 + brcm,pins = <0>; /* overwritten by sx150x-1-3E-int-gpio parameter */
14769 + brcm,function = <0>;
14770 + brcm,pull = <0>;
14771 + };
14772 + };
14773 + };
14774 +
14775 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3F
14776 + // Configure as a input with no pull-up/down
14777 + fragment@100 {
14778 + target = <&gpio>;
14779 + __dormant__ {
14780 + sx150x_0_3F_pins: sx150x_0_3F_pins {
14781 + brcm,pins = <0>; /* overwritten by sx150x-0-3F-int-gpio parameter */
14782 + brcm,function = <0>;
14783 + brcm,pull = <0>;
14784 + };
14785 + };
14786 + };
14787 +
14788 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3F
14789 + // Configure as a input with no pull-up/down
14790 + fragment@101 {
14791 + target = <&gpio>;
14792 + __dormant__ {
14793 + sx150x_1_3F_pins: sx150x_1_3F_pins {
14794 + brcm,pins = <0>; /* overwritten by sx150x-1-3F-int-gpio parameter */
14795 + brcm,function = <0>;
14796 + brcm,pull = <0>;
14797 + };
14798 + };
14799 + };
14800 +
14801 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x70
14802 + // Configure as a input with no pull-up/down
14803 + fragment@102 {
14804 + target = <&gpio>;
14805 + __dormant__ {
14806 + sx150x_0_70_pins: sx150x_0_70_pins {
14807 + brcm,pins = <0>; /* overwritten by sx150x-0-70-int-gpio parameter */
14808 + brcm,function = <0>;
14809 + brcm,pull = <0>;
14810 + };
14811 + };
14812 + };
14813 +
14814 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x70
14815 + // Configure as a input with no pull-up/down
14816 + fragment@103 {
14817 + target = <&gpio>;
14818 + __dormant__ {
14819 + sx150x_1_70_pins: sx150x_1_70_pins {
14820 + brcm,pins = <0>; /* overwritten by sx150x-1-70-int-gpio parameter */
14821 + brcm,function = <0>;
14822 + brcm,pull = <0>;
14823 + };
14824 + };
14825 + };
14826 +
14827 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x71
14828 + // Configure as a input with no pull-up/down
14829 + fragment@104 {
14830 + target = <&gpio>;
14831 + __dormant__ {
14832 + sx150x_0_71_pins: sx150x_0_71_pins {
14833 + brcm,pins = <0>; /* overwritten by sx150x-0-71-int-gpio parameter */
14834 + brcm,function = <0>;
14835 + brcm,pull = <0>;
14836 + };
14837 + };
14838 + };
14839 +
14840 + // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x71
14841 + // Configure as a input with no pull-up/down
14842 + fragment@105 {
14843 + target = <&gpio>;
14844 + __dormant__ {
14845 + sx150x_1_71_pins: sx150x_1_71_pins {
14846 + brcm,pins = <0>; /* overwritten by sx150x-1-71-int-gpio parameter */
14847 + brcm,function = <0>;
14848 + brcm,pull = <0>;
14849 + };
14850 + };
14851 + };
14852 +
14853 + __overrides__ {
14854 + sx1501-0-20 = <0>,"+0+2";
14855 + sx1501-1-20 = <0>,"+1+3";
14856 + sx1501-0-21 = <0>,"+0+4";
14857 + sx1501-1-21 = <0>,"+1+5";
14858 + sx1502-0-20 = <0>,"+0+6";
14859 + sx1502-1-20 = <0>,"+1+7";
14860 + sx1502-0-21 = <0>,"+0+8";
14861 + sx1502-1-21 = <0>,"+1+9";
14862 + sx1503-0-20 = <0>,"+0+10";
14863 + sx1503-1-20 = <0>,"+1+11";
14864 + sx1504-0-20 = <0>,"+0+12";
14865 + sx1504-1-20 = <0>,"+1+13";
14866 + sx1504-0-21 = <0>,"+0+14";
14867 + sx1504-1-21 = <0>,"+1+15";
14868 + sx1505-0-20 = <0>,"+0+16";
14869 + sx1505-1-20 = <0>,"+1+17";
14870 + sx1505-0-21 = <0>,"+0+18";
14871 + sx1505-1-21 = <0>,"+1+19";
14872 + sx1506-0-20 = <0>,"+0+20";
14873 + sx1506-1-20 = <0>,"+1+21";
14874 + sx1507-0-3E = <0>,"+0+22";
14875 + sx1507-1-3E = <0>,"+1+23";
14876 + sx1507-0-3F = <0>,"+0+24";
14877 + sx1507-1-3F = <0>,"+1+25";
14878 + sx1507-0-70 = <0>,"+0+26";
14879 + sx1507-1-70 = <0>,"+1+27";
14880 + sx1507-0-71 = <0>,"+0+28";
14881 + sx1507-1-71 = <0>,"+1+29";
14882 + sx1508-0-20 = <0>,"+0+30";
14883 + sx1508-1-20 = <0>,"+1+31";
14884 + sx1508-0-21 = <0>,"+0+32";
14885 + sx1508-1-21 = <0>,"+1+33";
14886 + sx1508-0-22 = <0>,"+0+34";
14887 + sx1508-1-22 = <0>,"+1+35";
14888 + sx1508-0-23 = <0>,"+0+36";
14889 + sx1508-1-23 = <0>,"+1+37";
14890 + sx1509-0-3E = <0>,"+0+38";
14891 + sx1509-1-3E = <0>,"+1+39";
14892 + sx1509-0-3F = <0>,"+0+40";
14893 + sx1509-1-3F = <0>,"+1+41";
14894 + sx1509-0-70 = <0>,"+0+42";
14895 + sx1509-1-70 = <0>,"+1+43";
14896 + sx1509-0-71 = <0>,"+0+44";
14897 + sx1509-1-71 = <0>,"+1+45";
14898 + sx1501-0-20-int-gpio = <0>,"+46+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1501_0_20>,"interrupts:0";
14899 + sx1501-1-20-int-gpio = <0>,"+47+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1501_1_20>,"interrupts:0";
14900 + sx1501-0-21-int-gpio = <0>,"+48+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1501_0_21>,"interrupts:0";
14901 + sx1501-1-21-int-gpio = <0>,"+49+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1501_1_21>,"interrupts:0";
14902 + sx1502-0-20-int-gpio = <0>,"+50+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1502_0_20>,"interrupts:0";
14903 + sx1502-1-20-int-gpio = <0>,"+51+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1502_1_20>,"interrupts:0";
14904 + sx1502-0-21-int-gpio = <0>,"+52+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1502_0_21>,"interrupts:0";
14905 + sx1502-1-21-int-gpio = <0>,"+53+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1502_1_21>,"interrupts:0";
14906 + sx1503-0-20-int-gpio = <0>,"+54+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1503_0_20>,"interrupts:0";
14907 + sx1503-1-20-int-gpio = <0>,"+55+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1503_1_20>,"interrupts:0";
14908 + sx1504-0-20-int-gpio = <0>,"+56+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1504_0_20>,"interrupts:0";
14909 + sx1504-1-20-int-gpio = <0>,"+57+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1504_1_20>,"interrupts:0";
14910 + sx1504-0-21-int-gpio = <0>,"+58+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1504_0_21>,"interrupts:0";
14911 + sx1504-1-21-int-gpio = <0>,"+59+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1504_1_21>,"interrupts:0";
14912 + sx1505-0-20-int-gpio = <0>,"+60+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1505_0_20>,"interrupts:0";
14913 + sx1505-1-20-int-gpio = <0>,"+61+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1505_1_20>,"interrupts:0";
14914 + sx1505-0-21-int-gpio = <0>,"+62+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1505_0_21>,"interrupts:0";
14915 + sx1505-1-21-int-gpio = <0>,"+63+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1505_1_21>,"interrupts:0";
14916 + sx1506-0-20-int-gpio = <0>,"+64+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1506_0_20>,"interrupts:0";
14917 + sx1506-1-20-int-gpio = <0>,"+65+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1506_1_20>,"interrupts:0";
14918 + sx1507-0-3E-int-gpio = <0>,"+66+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1507_0_3E>,"interrupts:0";
14919 + sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0";
14920 + sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0";
14921 + sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0";
14922 + sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
14923 + sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0";
14924 + sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0";
14925 + sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0";
14926 + sx1508-0-20-int-gpio = <0>,"+74+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1508_0_20>,"interrupts:0";
14927 + sx1508-1-20-int-gpio = <0>,"+75+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1508_1_20>,"interrupts:0";
14928 + sx1508-0-21-int-gpio = <0>,"+76+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1508_0_21>,"interrupts:0";
14929 + sx1508-1-21-int-gpio = <0>,"+77+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1508_1_21>,"interrupts:0";
14930 + sx1508-0-22-int-gpio = <0>,"+78+94", <&sx150x_0_22_pins>,"brcm,pins:0", <&sx1508_0_22>,"interrupts:0";
14931 + sx1508-1-22-int-gpio = <0>,"+79+95", <&sx150x_1_22_pins>,"brcm,pins:0", <&sx1508_1_22>,"interrupts:0";
14932 + sx1508-0-23-int-gpio = <0>,"+80+96", <&sx150x_0_23_pins>,"brcm,pins:0", <&sx1508_0_23>,"interrupts:0";
14933 + sx1508-1-23-int-gpio = <0>,"+81+97", <&sx150x_1_23_pins>,"brcm,pins:0", <&sx1508_1_23>,"interrupts:0";
14934 + sx1509-0-3E-int-gpio = <0>,"+82+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1509_0_3E>,"interrupts:0";
14935 + sx1509-1-3E-int-gpio = <0>,"+83+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1509_1_3E>,"interrupts:0";
14936 + sx1509-0-3F-int-gpio = <0>,"+84+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1509_0_3F>,"interrupts:0";
14937 + sx1509-1-3F-int-gpio = <0>,"+85+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1509_1_3F>,"interrupts:0";
14938 + sx1509-0-70-int-gpio = <0>,"+86+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1509_0_70>,"interrupts:0";
14939 + sx1509-1-70-int-gpio = <0>,"+87+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1509_1_70>,"interrupts:0";
14940 + sx1509-0-71-int-gpio = <0>,"+88+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1509_0_71>,"interrupts:0";
14941 + sx1509-1-71-int-gpio = <0>,"+89+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1509_1_71>,"interrupts:0";
14942 + };
14943 +};
14944 +
14945 --- /dev/null
14946 +++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
14947 @@ -0,0 +1,224 @@
14948 +/*
14949 + * tinylcd35-overlay.dts
14950 + *
14951 + * -------------------------------------------------
14952 + * www.tinlylcd.com
14953 + * -------------------------------------------------
14954 + * Device---Driver-----BUS GPIO's
14955 + * display tinylcd35 spi0.0 25 24 18
14956 + * touch ads7846 spi0.1 5
14957 + * rtc ds1307 i2c1-0068
14958 + * rtc pcf8563 i2c1-0051
14959 + * keypad gpio-keys --------- 17 22 27 23 28
14960 + *
14961 + *
14962 + * TinyLCD.com 3.5 inch TFT
14963 + *
14964 + * Version 001
14965 + * 5/3/2015 -- Noralf Trønnes Initial Device tree framework
14966 + * 10/3/2015 -- tinylcd@gmail.com added ds1307 support.
14967 + *
14968 + */
14969 +
14970 +/dts-v1/;
14971 +/plugin/;
14972 +
14973 +/ {
14974 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
14975 +
14976 + fragment@0 {
14977 + target = <&spi0>;
14978 + __overlay__ {
14979 + status = "okay";
14980 + };
14981 + };
14982 +
14983 + fragment@1 {
14984 + target = <&spidev0>;
14985 + __overlay__ {
14986 + status = "disabled";
14987 + };
14988 + };
14989 +
14990 + fragment@2 {
14991 + target = <&spidev1>;
14992 + __overlay__ {
14993 + status = "disabled";
14994 + };
14995 + };
14996 +
14997 + fragment@3 {
14998 + target = <&gpio>;
14999 + __overlay__ {
15000 + tinylcd35_pins: tinylcd35_pins {
15001 + brcm,pins = <25 24 18>;
15002 + brcm,function = <1>; /* out */
15003 + };
15004 + tinylcd35_ts_pins: tinylcd35_ts_pins {
15005 + brcm,pins = <5>;
15006 + brcm,function = <0>; /* in */
15007 + };
15008 + keypad_pins: keypad_pins {
15009 + brcm,pins = <4 17 22 23 27>;
15010 + brcm,function = <0>; /* in */
15011 + brcm,pull = <1>; /* down */
15012 + };
15013 + };
15014 + };
15015 +
15016 + fragment@4 {
15017 + target = <&spi0>;
15018 + __overlay__ {
15019 + /* needed to avoid dtc warning */
15020 + #address-cells = <1>;
15021 + #size-cells = <0>;
15022 +
15023 + tinylcd35: tinylcd35@0{
15024 + compatible = "neosec,tinylcd";
15025 + reg = <0>;
15026 + pinctrl-names = "default";
15027 + pinctrl-0 = <&tinylcd35_pins>,
15028 + <&tinylcd35_ts_pins>;
15029 +
15030 + spi-max-frequency = <48000000>;
15031 + rotate = <270>;
15032 + fps = <20>;
15033 + bgr;
15034 + buswidth = <8>;
15035 + reset-gpios = <&gpio 25 0>;
15036 + dc-gpios = <&gpio 24 0>;
15037 + led-gpios = <&gpio 18 1>;
15038 + debug = <0>;
15039 +
15040 + init = <0x10000B0 0x80
15041 + 0x10000C0 0x0A 0x0A
15042 + 0x10000C1 0x01 0x01
15043 + 0x10000C2 0x33
15044 + 0x10000C5 0x00 0x42 0x80
15045 + 0x10000B1 0xD0 0x11
15046 + 0x10000B4 0x02
15047 + 0x10000B6 0x00 0x22 0x3B
15048 + 0x10000B7 0x07
15049 + 0x1000036 0x58
15050 + 0x10000F0 0x36 0xA5 0xD3
15051 + 0x10000E5 0x80
15052 + 0x10000E5 0x01
15053 + 0x10000B3 0x00
15054 + 0x10000E5 0x00
15055 + 0x10000F0 0x36 0xA5 0x53
15056 + 0x10000E0 0x00 0x35 0x33 0x00 0x00 0x00 0x00 0x35 0x33 0x00 0x00 0x00
15057 + 0x100003A 0x55
15058 + 0x1000011
15059 + 0x2000001
15060 + 0x1000029>;
15061 + };
15062 +
15063 + tinylcd35_ts: tinylcd35_ts@1 {
15064 + compatible = "ti,ads7846";
15065 + reg = <1>;
15066 + status = "disabled";
15067 +
15068 + spi-max-frequency = <2000000>;
15069 + interrupts = <5 2>; /* high-to-low edge triggered */
15070 + interrupt-parent = <&gpio>;
15071 + pendown-gpio = <&gpio 5 0>;
15072 + ti,x-plate-ohms = /bits/ 16 <100>;
15073 + ti,pressure-max = /bits/ 16 <255>;
15074 + };
15075 + };
15076 + };
15077 +
15078 + /* RTC */
15079 +
15080 + fragment@5 {
15081 + target = <&i2c1>;
15082 + __dormant__ {
15083 + #address-cells = <1>;
15084 + #size-cells = <0>;
15085 +
15086 + status = "okay";
15087 +
15088 + pcf8563: pcf8563@51 {
15089 + compatible = "nxp,pcf8563";
15090 + reg = <0x51>;
15091 + status = "okay";
15092 + };
15093 + };
15094 + };
15095 +
15096 + fragment@6 {
15097 + target = <&i2c1>;
15098 + __dormant__ {
15099 + #address-cells = <1>;
15100 + #size-cells = <0>;
15101 +
15102 + status = "okay";
15103 +
15104 + ds1307: ds1307@68 {
15105 + compatible = "maxim,ds1307";
15106 + reg = <0x68>;
15107 + status = "okay";
15108 + };
15109 + };
15110 + };
15111 +
15112 + /*
15113 + * Values for input event code is found under the
15114 + * 'Keys and buttons' heading in include/uapi/linux/input.h
15115 + */
15116 + fragment@7 {
15117 + target-path = "/soc";
15118 + __overlay__ {
15119 + keypad: keypad {
15120 + compatible = "gpio-keys";
15121 + #address-cells = <1>;
15122 + #size-cells = <0>;
15123 + pinctrl-names = "default";
15124 + pinctrl-0 = <&keypad_pins>;
15125 + status = "disabled";
15126 + autorepeat;
15127 +
15128 + button@17 {
15129 + label = "GPIO KEY_UP";
15130 + linux,code = <103>;
15131 + gpios = <&gpio 17 0>;
15132 + };
15133 + button@22 {
15134 + label = "GPIO KEY_DOWN";
15135 + linux,code = <108>;
15136 + gpios = <&gpio 22 0>;
15137 + };
15138 + button@27 {
15139 + label = "GPIO KEY_LEFT";
15140 + linux,code = <105>;
15141 + gpios = <&gpio 27 0>;
15142 + };
15143 + button@23 {
15144 + label = "GPIO KEY_RIGHT";
15145 + linux,code = <106>;
15146 + gpios = <&gpio 23 0>;
15147 + };
15148 + button@4 {
15149 + label = "GPIO KEY_ENTER";
15150 + linux,code = <28>;
15151 + gpios = <&gpio 4 0>;
15152 + };
15153 + };
15154 + };
15155 + };
15156 +
15157 + __overrides__ {
15158 + speed = <&tinylcd35>,"spi-max-frequency:0";
15159 + rotate = <&tinylcd35>,"rotate:0";
15160 + fps = <&tinylcd35>,"fps:0";
15161 + debug = <&tinylcd35>,"debug:0";
15162 + touch = <&tinylcd35_ts>,"status";
15163 + touchgpio = <&tinylcd35_ts_pins>,"brcm,pins:0",
15164 + <&tinylcd35_ts>,"interrupts:0",
15165 + <&tinylcd35_ts>,"pendown-gpio:4";
15166 + xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
15167 + rtc-pcf = <0>,"=5";
15168 + rtc-ds = <0>,"=6";
15169 + keypad = <&keypad>,"status";
15170 + };
15171 +};
15172 --- /dev/null
15173 +++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts
15174 @@ -0,0 +1,32 @@
15175 +/dts-v1/;
15176 +/plugin/;
15177 +
15178 +/{
15179 + compatible = "brcm,bcm2708";
15180 +
15181 + fragment@0 {
15182 + target = <&uart0>;
15183 + __overlay__ {
15184 + pinctrl-names = "default";
15185 + pinctrl-0 = <&uart0_pins>;
15186 + status = "okay";
15187 + };
15188 + };
15189 +
15190 + fragment@1 {
15191 + target = <&gpio>;
15192 + __overlay__ {
15193 + uart0_pins: uart0_pins {
15194 + brcm,pins = <14 15>;
15195 + brcm,function = <4>; /* alt0 */
15196 + brcm,pull = <0 2>;
15197 + };
15198 + };
15199 + };
15200 +
15201 + __overrides__ {
15202 + txd0_pin = <&uart0_pins>,"brcm,pins:0";
15203 + rxd0_pin = <&uart0_pins>,"brcm,pins:4";
15204 + pin_func = <&uart0_pins>,"brcm,function:0";
15205 + };
15206 +};
15207 --- /dev/null
15208 +++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts
15209 @@ -0,0 +1,38 @@
15210 +/dts-v1/;
15211 +/plugin/;
15212 +
15213 +/{
15214 + compatible = "brcm,bcm2708";
15215 +
15216 + fragment@0 {
15217 + target = <&uart1>;
15218 + __overlay__ {
15219 + pinctrl-names = "default";
15220 + pinctrl-0 = <&uart1_pins>;
15221 + status = "okay";
15222 + };
15223 + };
15224 +
15225 + fragment@1 {
15226 + target = <&gpio>;
15227 + __overlay__ {
15228 + uart1_pins: uart1_pins {
15229 + brcm,pins = <14 15>;
15230 + brcm,function = <2>; /* alt5 */
15231 + brcm,pull = <0 2>;
15232 + };
15233 + };
15234 + };
15235 +
15236 + fragment@2 {
15237 + target-path = "/chosen";
15238 + __overlay__ {
15239 + bootargs = "8250.nr_uarts=1";
15240 + };
15241 + };
15242 +
15243 + __overrides__ {
15244 + txd1_pin = <&uart1_pins>,"brcm,pins:0";
15245 + rxd1_pin = <&uart1_pins>,"brcm,pins:4";
15246 + };
15247 +};
15248 --- /dev/null
15249 +++ b/arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts
15250 @@ -0,0 +1,33 @@
15251 +// Overlay for missing AUX interrupt controller
15252 +// Instead we bind all AUX devices to the generic AUX interrupt line
15253 +/dts-v1/;
15254 +/plugin/;
15255 +
15256 +/ {
15257 + compatible = "brcm,bcm2708";
15258 +
15259 + fragment@0 {
15260 + target = <&uart1>;
15261 + __overlay__ {
15262 + interrupt-parent = <&intc>;
15263 + interrupts = <0x1 0x1d>;
15264 + };
15265 + };
15266 +
15267 + fragment@1 {
15268 + target = <&spi1>;
15269 + __overlay__ {
15270 + interrupt-parent = <&intc>;
15271 + interrupts = <0x1 0x1d>;
15272 + };
15273 + };
15274 +
15275 + fragment@2 {
15276 + target = <&spi2>;
15277 + __overlay__ {
15278 + interrupt-parent = <&intc>;
15279 + interrupts = <0x1 0x1d>;
15280 + };
15281 + };
15282 +};
15283 +
15284 --- /dev/null
15285 +++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
15286 @@ -0,0 +1,154 @@
15287 +// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-96 dwc2-overlay.dts,dr_mode=otg upstream-aux-interrupt-overlay.dts,
15288 +
15289 +/dts-v1/;
15290 +/plugin/;
15291 +
15292 +#include <dt-bindings/clock/bcm2835.h>
15293 +
15294 +/ {
15295 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15296 + fragment@0 {
15297 + target-path = "/chosen";
15298 + __dormant__ {
15299 + bootargs = "cma=256M";
15300 + };
15301 + };
15302 + fragment@1 {
15303 + target-path = "/chosen";
15304 + __dormant__ {
15305 + bootargs = "cma=192M";
15306 + };
15307 + };
15308 + fragment@2 {
15309 + target-path = "/chosen";
15310 + __dormant__ {
15311 + bootargs = "cma=128M";
15312 + };
15313 + };
15314 + fragment@3 {
15315 + target-path = "/chosen";
15316 + __overlay__ {
15317 + bootargs = "cma=96M";
15318 + };
15319 + };
15320 + fragment@4 {
15321 + target-path = "/chosen";
15322 + __dormant__ {
15323 + bootargs = "cma=64M";
15324 + };
15325 + };
15326 + fragment@5 {
15327 + target = <&i2c2>;
15328 + __overlay__ {
15329 + status = "okay";
15330 + };
15331 + };
15332 + fragment@6 {
15333 + target = <&fb>;
15334 + __overlay__ {
15335 + status = "disabled";
15336 + };
15337 + };
15338 + fragment@7 {
15339 + target = <&pixelvalve0>;
15340 + __overlay__ {
15341 + interrupts = <2 13>;
15342 + status = "okay";
15343 + };
15344 + };
15345 + fragment@8 {
15346 + target = <&pixelvalve1>;
15347 + __overlay__ {
15348 + interrupts = <2 14>;
15349 + status = "okay";
15350 + };
15351 + };
15352 + fragment@9 {
15353 + target = <&pixelvalve2>;
15354 + __overlay__ {
15355 + interrupts = <2 10>;
15356 + status = "okay";
15357 + };
15358 + };
15359 + fragment@10 {
15360 + target = <&hvs>;
15361 + __overlay__ {
15362 + interrupts = <2 1>;
15363 + status = "okay";
15364 + };
15365 + };
15366 + fragment@11 {
15367 + target = <&hdmi>;
15368 + __overlay__ {
15369 + interrupts = <2 8>, <2 9>;
15370 + status = "okay";
15371 + };
15372 + };
15373 + fragment@12 {
15374 + target = <&v3d>;
15375 + __overlay__ {
15376 + interrupts = <1 10>;
15377 + status = "okay";
15378 + };
15379 + };
15380 + fragment@13 {
15381 + target = <&vc4>;
15382 + __overlay__ {
15383 + status = "okay";
15384 + };
15385 + };
15386 + fragment@14 {
15387 + target-path = "/soc/dma";
15388 + __overlay__ {
15389 + brcm,dma-channel-mask = <0x7f35>;
15390 + };
15391 + };
15392 + fragment@15 {
15393 + target = <&clocks>;
15394 + __overlay__ {
15395 + claim-clocks = <BCM2835_PLLD_DSI0 BCM2835_PLLD_DSI1 BCM2835_PLLH_AUX BCM2835_PLLH_PIX>;
15396 + };
15397 + };
15398 + fragment@16 {
15399 + target = <&vec>;
15400 + __overlay__ {
15401 + status = "okay";
15402 + };
15403 + };
15404 + fragment@17 {
15405 + target = <&usb>;
15406 + #address-cells = <1>;
15407 + #size-cells = <1>;
15408 + dwc2_usb: __overlay__ {
15409 + compatible = "brcm,bcm2835-usb";
15410 + reg = <0x7e980000 0x10000>;
15411 + interrupts = <1 9>;
15412 + dr_mode = "otg";
15413 + g-np-tx-fifo-size = <32>;
15414 + g-rx-fifo-size = <256>;
15415 + g-tx-fifo-size = <512 512 512 512 512 256 256>;
15416 + status = "okay";
15417 + };
15418 + };
15419 + fragment@18 {
15420 + target = <&uart1>;
15421 + __overlay__ {
15422 + interrupt-parent = <&intc>;
15423 + interrupts = <0x1 0x1d>;
15424 + };
15425 + };
15426 + fragment@19 {
15427 + target = <&spi1>;
15428 + __overlay__ {
15429 + interrupt-parent = <&intc>;
15430 + interrupts = <0x1 0x1d>;
15431 + };
15432 + };
15433 + fragment@20 {
15434 + target = <&spi2>;
15435 + __overlay__ {
15436 + interrupt-parent = <&intc>;
15437 + interrupts = <0x1 0x1d>;
15438 + };
15439 + };
15440 +};
15441 --- /dev/null
15442 +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
15443 @@ -0,0 +1,89 @@
15444 +/*
15445 + * vc4-fkms-v3d-overlay.dts
15446 + */
15447 +
15448 +/dts-v1/;
15449 +/plugin/;
15450 +
15451 +/ {
15452 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15453 +
15454 + fragment@0 {
15455 + target-path = "/chosen";
15456 + __overlay__ {
15457 + bootargs = "cma=256M";
15458 + };
15459 + };
15460 +
15461 + fragment@1 {
15462 + target-path = "/chosen";
15463 + __dormant__ {
15464 + bootargs = "cma=192M";
15465 + };
15466 + };
15467 +
15468 + fragment@2 {
15469 + target-path = "/chosen";
15470 + __dormant__ {
15471 + bootargs = "cma=128M";
15472 + };
15473 + };
15474 +
15475 + fragment@3 {
15476 + target-path = "/chosen";
15477 + __dormant__ {
15478 + bootargs = "cma=96M";
15479 + };
15480 + };
15481 +
15482 + fragment@4 {
15483 + target-path = "/chosen";
15484 + __dormant__ {
15485 + bootargs = "cma=64M";
15486 + };
15487 + };
15488 +
15489 + fragment@5 {
15490 + target = <&fb>;
15491 + __overlay__ {
15492 + status = "disabled";
15493 + };
15494 + };
15495 +
15496 + fragment@6 {
15497 + target = <&firmwarekms>;
15498 + __overlay__ {
15499 + status = "okay";
15500 + };
15501 + };
15502 +
15503 + fragment@7 {
15504 + target = <&v3d>;
15505 + __overlay__ {
15506 + interrupts = <1 10>;
15507 + status = "okay";
15508 + };
15509 + };
15510 +
15511 + fragment@8 {
15512 + target = <&vc4>;
15513 + __overlay__ {
15514 + status = "okay";
15515 + };
15516 + };
15517 +
15518 + fragment@9 {
15519 + target-path = "/soc/dma";
15520 + __overlay__ {
15521 + brcm,dma-channel-mask = <0x7f35>;
15522 + };
15523 + };
15524 +
15525 + __overrides__ {
15526 + cma-256 = <0>,"+0-1-2-3-4";
15527 + cma-192 = <0>,"-0+1-2-3-4";
15528 + cma-128 = <0>,"-0-1+2-3-4";
15529 + cma-96 = <0>,"-0-1-2+3-4";
15530 + cma-64 = <0>,"-0-1-2-3+4";
15531 + };
15532 +};
15533 --- /dev/null
15534 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
15535 @@ -0,0 +1,151 @@
15536 +/*
15537 + * vc4-kms-v3d-overlay.dts
15538 + */
15539 +
15540 +/dts-v1/;
15541 +/plugin/;
15542 +
15543 +#include <dt-bindings/clock/bcm2835.h>
15544 +
15545 +/ {
15546 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15547 +
15548 + fragment@0 {
15549 + target-path = "/chosen";
15550 + __overlay__ {
15551 + bootargs = "cma=256M";
15552 + };
15553 + };
15554 +
15555 + fragment@1 {
15556 + target-path = "/chosen";
15557 + __dormant__ {
15558 + bootargs = "cma=192M";
15559 + };
15560 + };
15561 +
15562 + fragment@2 {
15563 + target-path = "/chosen";
15564 + __dormant__ {
15565 + bootargs = "cma=128M";
15566 + };
15567 + };
15568 +
15569 + fragment@3 {
15570 + target-path = "/chosen";
15571 + __dormant__ {
15572 + bootargs = "cma=96M";
15573 + };
15574 + };
15575 +
15576 + fragment@4 {
15577 + target-path = "/chosen";
15578 + __dormant__ {
15579 + bootargs = "cma=64M";
15580 + };
15581 + };
15582 +
15583 + fragment@5 {
15584 + target = <&i2c2>;
15585 + __overlay__ {
15586 + status = "okay";
15587 + };
15588 + };
15589 +
15590 + fragment@6 {
15591 + target = <&fb>;
15592 + __overlay__ {
15593 + status = "disabled";
15594 + };
15595 + };
15596 +
15597 + fragment@7 {
15598 + target = <&pixelvalve0>;
15599 + __overlay__ {
15600 + interrupts = <2 13>; /* pwa0 */
15601 + status = "okay";
15602 + };
15603 + };
15604 +
15605 + fragment@8 {
15606 + target = <&pixelvalve1>;
15607 + __overlay__ {
15608 + interrupts = <2 14>; /* pwa1 */
15609 + status = "okay";
15610 + };
15611 + };
15612 +
15613 + fragment@9 {
15614 + target = <&pixelvalve2>;
15615 + __overlay__ {
15616 + interrupts = <2 10>; /* pixelvalve */
15617 + status = "okay";
15618 + };
15619 + };
15620 +
15621 + fragment@10 {
15622 + target = <&hvs>;
15623 + __overlay__ {
15624 + interrupts = <2 1>;
15625 + status = "okay";
15626 + };
15627 + };
15628 +
15629 + fragment@11 {
15630 + target = <&hdmi>;
15631 + __overlay__ {
15632 + interrupts = <2 8>, <2 9>;
15633 + status = "okay";
15634 + };
15635 + };
15636 +
15637 + fragment@12 {
15638 + target = <&v3d>;
15639 + __overlay__ {
15640 + interrupts = <1 10>;
15641 + status = "okay";
15642 + };
15643 + };
15644 +
15645 + fragment@13 {
15646 + target = <&vc4>;
15647 + __overlay__ {
15648 + status = "okay";
15649 + };
15650 + };
15651 +
15652 + fragment@14 {
15653 + target-path = "/soc/dma";
15654 + __overlay__ {
15655 + brcm,dma-channel-mask = <0x7f35>;
15656 + };
15657 + };
15658 +
15659 +
15660 + fragment@15 {
15661 + target = <&clocks>;
15662 + __overlay__ {
15663 + claim-clocks = <
15664 + BCM2835_PLLD_DSI0
15665 + BCM2835_PLLD_DSI1
15666 + BCM2835_PLLH_AUX
15667 + BCM2835_PLLH_PIX
15668 + >;
15669 + };
15670 + };
15671 +
15672 + fragment@16 {
15673 + target = <&vec>;
15674 + __overlay__ {
15675 + status = "okay";
15676 + };
15677 + };
15678 +
15679 + __overrides__ {
15680 + cma-256 = <0>,"+0-1-2-3-4";
15681 + cma-192 = <0>,"-0+1-2-3-4";
15682 + cma-128 = <0>,"-0-1+2-3-4";
15683 + cma-96 = <0>,"-0-1-2+3-4";
15684 + cma-64 = <0>,"-0-1-2-3+4";
15685 + };
15686 +};
15687 --- /dev/null
15688 +++ b/arch/arm/boot/dts/overlays/vga666-overlay.dts
15689 @@ -0,0 +1,30 @@
15690 +/dts-v1/;
15691 +/plugin/;
15692 +
15693 +/{
15694 + compatible = "brcm,bcm2708";
15695 +
15696 + // There is no VGA driver module, but we need a platform device
15697 + // node (that doesn't already use pinctrl) to hang the pinctrl
15698 + // reference on - leds will do
15699 +
15700 + fragment@0 {
15701 + target = <&leds>;
15702 + __overlay__ {
15703 + pinctrl-names = "default";
15704 + pinctrl-0 = <&vga666_pins>;
15705 + };
15706 + };
15707 +
15708 + fragment@1 {
15709 + target = <&gpio>;
15710 + __overlay__ {
15711 + vga666_pins: vga666_pins {
15712 + brcm,pins = <2 3 4 5 6 7 8 9 10 11 12
15713 + 13 14 15 16 17 18 19 20 21>;
15714 + brcm,function = <6>; /* alt2 */
15715 + brcm,pull = <0>; /* no pull */
15716 + };
15717 + };
15718 + };
15719 +};
15720 --- /dev/null
15721 +++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
15722 @@ -0,0 +1,41 @@
15723 +// Definitions for w1-gpio module (without external pullup)
15724 +/dts-v1/;
15725 +/plugin/;
15726 +
15727 +/ {
15728 + compatible = "brcm,bcm2708";
15729 +
15730 + fragment@0 {
15731 + target-path = "/";
15732 + __overlay__ {
15733 +
15734 + w1: onewire@0 {
15735 + compatible = "w1-gpio";
15736 + pinctrl-names = "default";
15737 + pinctrl-0 = <&w1_pins>;
15738 + gpios = <&gpio 4 0>;
15739 + rpi,parasitic-power = <0>;
15740 + status = "okay";
15741 + };
15742 + };
15743 + };
15744 +
15745 + fragment@1 {
15746 + target = <&gpio>;
15747 + __overlay__ {
15748 + w1_pins: w1_pins@0 {
15749 + brcm,pins = <4>;
15750 + brcm,function = <0>; // in (initially)
15751 + brcm,pull = <0>; // off
15752 + };
15753 + };
15754 + };
15755 +
15756 + __overrides__ {
15757 + gpiopin = <&w1>,"gpios:4",
15758 + <&w1>,"reg:0",
15759 + <&w1_pins>,"brcm,pins:0",
15760 + <&w1_pins>,"reg:0";
15761 + pullup = <&w1>,"rpi,parasitic-power:0";
15762 + };
15763 +};
15764 --- /dev/null
15765 +++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
15766 @@ -0,0 +1,43 @@
15767 +// Definitions for w1-gpio module (with external pullup)
15768 +/dts-v1/;
15769 +/plugin/;
15770 +
15771 +/ {
15772 + compatible = "brcm,bcm2708";
15773 +
15774 + fragment@0 {
15775 + target-path = "/";
15776 + __overlay__ {
15777 +
15778 + w1: onewire@0 {
15779 + compatible = "w1-gpio";
15780 + pinctrl-names = "default";
15781 + pinctrl-0 = <&w1_pins>;
15782 + gpios = <&gpio 4 0>, <&gpio 5 1>;
15783 + rpi,parasitic-power = <0>;
15784 + status = "okay";
15785 + };
15786 + };
15787 + };
15788 +
15789 + fragment@1 {
15790 + target = <&gpio>;
15791 + __overlay__ {
15792 + w1_pins: w1_pins@0 {
15793 + brcm,pins = <4 5>;
15794 + brcm,function = <0 1>; // in out
15795 + brcm,pull = <0 0>; // off off
15796 + };
15797 + };
15798 + };
15799 +
15800 + __overrides__ {
15801 + gpiopin = <&w1>,"gpios:4",
15802 + <&w1>,"reg:0",
15803 + <&w1_pins>,"brcm,pins:0",
15804 + <&w1_pins>,"reg:0";
15805 + extpullup = <&w1>,"gpios:16",
15806 + <&w1_pins>,"brcm,pins:4";
15807 + pullup = <&w1>,"rpi,parasitic-power:0";
15808 + };
15809 +};
15810 --- /dev/null
15811 +++ b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
15812 @@ -0,0 +1,44 @@
15813 +/*
15814 + * Device Tree overlay for Witty Pi extension board by UUGear
15815 + *
15816 + */
15817 +
15818 +/dts-v1/;
15819 +/plugin/;
15820 +
15821 +/ {
15822 +
15823 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
15824 +
15825 + fragment@0 {
15826 + target = <&leds>;
15827 + __overlay__ {
15828 + compatible = "gpio-leds";
15829 + wittypi_led: wittypi_led {
15830 + label = "wittypi_led";
15831 + linux,default-trigger = "default-on";
15832 + gpios = <&gpio 17 0>;
15833 + };
15834 + };
15835 + };
15836 +
15837 + fragment@1 {
15838 + target = <&i2c1>;
15839 + __overlay__ {
15840 + #address-cells = <1>;
15841 + #size-cells = <0>;
15842 +
15843 + rtc: ds1337@68 {
15844 + compatible = "dallas,ds1337";
15845 + reg = <0x68>;
15846 + wakeup-source;
15847 + };
15848 + };
15849 + };
15850 +
15851 + __overrides__ {
15852 + led_gpio = <&wittypi_led>,"gpios:4";
15853 + led_trigger = <&wittypi_led>,"linux,default-trigger";
15854 + };
15855 +
15856 +};
15857 --- a/scripts/Makefile.dtbinst
15858 +++ b/scripts/Makefile.dtbinst
15859 @@ -20,6 +20,7 @@ include scripts/Kbuild.include
15860 include $(src)/Makefile
15861
15862 dtbinst-files := $(sort $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-)))
15863 +dtboinst-files := $(sort $(dtbo-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-)))
15864 dtbinst-dirs := $(subdir-y) $(subdir-m)
15865
15866 # Helper targets for Installing DTBs into the boot directory
15867 @@ -31,10 +32,13 @@ install-dir = $(patsubst $(dtbinst_root)
15868 $(dtbinst-files): %.dtb: $(obj)/%.dtb
15869 $(call cmd,dtb_install,$(install-dir))
15870
15871 +$(dtboinst-files): %.dtbo: $(obj)/%.dtbo
15872 + $(call cmd,dtb_install,$(install-dir))
15873 +
15874 $(dtbinst-dirs):
15875 $(Q)$(MAKE) $(dtbinst)=$(obj)/$@
15876
15877 -PHONY += $(dtbinst-files) $(dtbinst-dirs)
15878 -__dtbs_install: $(dtbinst-files) $(dtbinst-dirs)
15879 +PHONY += $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
15880 +__dtbs_install: $(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs)
15881
15882 .PHONY: $(PHONY)
15883 --- a/scripts/Makefile.lib
15884 +++ b/scripts/Makefile.lib
15885 @@ -248,6 +248,7 @@ DTC ?= $(objtree)/scripts/dtc/dtc
15886 ifeq ($(findstring 1,$(KBUILD_ENABLE_EXTRA_GCC_CHECKS)),)
15887 DTC_FLAGS += -Wno-unit_address_vs_reg \
15888 -Wno-unit_address_format \
15889 + -Wno-gpios_property \
15890 -Wno-avoid_unnecessary_addr_size \
15891 -Wno-alias_paths \
15892 -Wno-graph_child_address \
15893 @@ -293,6 +294,18 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
15894 $(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE
15895 $(call if_changed_dep,dtc)
15896
15897 +quiet_cmd_dtco = DTCO $@
15898 +cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
15899 + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
15900 + $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
15901 + -i $(dir $<) $(DTC_FLAGS) \
15902 + -Wno-interrupts_property \
15903 + -d $(depfile).dtc.tmp $(dtc-tmp) ; \
15904 + cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
15905 +
15906 +$(obj)/%.dtbo: $(src)/%-overlay.dts FORCE
15907 + $(call if_changed_dep,dtco)
15908 +
15909 dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
15910
15911 # Bzip2