brcm2708: add linux 4.19 support
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.19 / 950-0338-bcm2835-dma-Add-support-for-per-channel-flags.patch
1 From f1eb781eb15506a49307cd80ad5b70533622ee68 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.org>
3 Date: Fri, 20 Jul 2018 22:03:41 +0100
4 Subject: [PATCH 338/703] bcm2835-dma: Add support for per-channel flags
5
6 Add the ability to interpret the high bits of the dreq specifier as
7 flags to be included in the DMA_CS register. The motivation for this
8 change is the ability to set the DISDEBUG flag for SD card transfers
9 to avoid corruption when using the VPU debugger.
10
11 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
12 ---
13 drivers/dma/bcm2835-dma.c | 10 ++++++++--
14 1 file changed, 8 insertions(+), 2 deletions(-)
15
16 --- a/drivers/dma/bcm2835-dma.c
17 +++ b/drivers/dma/bcm2835-dma.c
18 @@ -146,6 +146,10 @@ struct bcm2835_desc {
19 #define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */
20 #define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */
21 #define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12)
22 +#define BCM2835_DMA_CS_FLAGS(x) (x & (BCM2835_DMA_PRIORITY(15) | \
23 + BCM2835_DMA_PANIC_PRIORITY(15) | \
24 + BCM2835_DMA_WAIT_FOR_WRITES | \
25 + BCM2835_DMA_DIS_DEBUG))
26 #define BCM2835_DMA_PER_MAP(x) ((x & 31) << 16) /* REQ source */
27 #define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */
28 #define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */
29 @@ -461,7 +465,8 @@ static void bcm2835_dma_start_desc(struc
30 c->desc = d = to_bcm2835_dma_desc(&vd->tx);
31
32 writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR);
33 - writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
34 + writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
35 + c->chan_base + BCM2835_DMA_CS);
36 }
37
38 static irqreturn_t bcm2835_dma_callback(int irq, void *data)
39 @@ -488,7 +493,8 @@ static irqreturn_t bcm2835_dma_callback(
40 * if this IRQ handler is threaded.) If the channel is finished, it
41 * will remain idle despite the ACTIVE flag being set.
42 */
43 - writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE,
44 + writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE |
45 + BCM2835_DMA_CS_FLAGS(c->dreq),
46 c->chan_base + BCM2835_DMA_CS);
47
48 d = c->desc;