brcm2708: update linux 4.4 patches to latest version
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.4 / 0052-bcm2835-Match-with-BCM2708-Device-Trees.patch
1 From f24cdbd260fb91b52c2b32301713f2d0de7e15bc Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
3 Date: Sat, 15 Aug 2015 20:47:07 +0200
4 Subject: [PATCH] bcm2835: Match with BCM2708 Device Trees
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
10 ---
11 arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 132 ++++++++++++++++++---
12 arch/arm/boot/dts/bcm2835-rpi-b.dts | 115 ++++++++++++++++--
13 arch/arm/boot/dts/bcm2835.dtsi | 195 +++----------------------------
14 3 files changed, 237 insertions(+), 205 deletions(-)
15
16 --- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
17 +++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
18 @@ -1,30 +1,128 @@
19 /dts-v1/;
20 -#include "bcm2835-rpi.dtsi"
21 +#include "bcm2835.dtsi"
22
23 / {
24 compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
25 model = "Raspberry Pi Model B+";
26 -
27 - leds {
28 - act {
29 - gpios = <&gpio 47 0>;
30 - };
31 -
32 - pwr {
33 - label = "PWR";
34 - gpios = <&gpio 35 0>;
35 - default-state = "keep";
36 - linux,default-trigger = "default-on";
37 - };
38 - };
39 };
40
41 &gpio {
42 - pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
43 + spi0_pins: spi0_pins {
44 + brcm,pins = <7 8 9 10 11>;
45 + brcm,function = <4>; /* alt0 */
46 + };
47 +
48 + i2c0_pins: i2c0 {
49 + brcm,pins = <0 1>;
50 + brcm,function = <4>;
51 + };
52
53 - /* I2S interface */
54 - i2s_alt0: i2s_alt0 {
55 + i2c1_pins: i2c1 {
56 + brcm,pins = <2 3>;
57 + brcm,function = <4>;
58 + };
59 +
60 + i2s_pins: i2s {
61 brcm,pins = <18 19 20 21>;
62 - brcm,function = <BCM2835_FSEL_ALT0>;
63 + brcm,function = <4>; /* alt0 */
64 + };
65 +};
66 +
67 +&mmc {
68 + status = "okay";
69 + bus-width = <4>;
70 +};
71 +
72 +&fb {
73 + status = "okay";
74 +};
75 +
76 +&uart0 {
77 + status = "okay";
78 +};
79 +
80 +&spi0 {
81 + pinctrl-names = "default";
82 + pinctrl-0 = <&spi0_pins>;
83 +
84 + spidev@0{
85 + compatible = "spidev";
86 + reg = <0>; /* CE0 */
87 + #address-cells = <1>;
88 + #size-cells = <0>;
89 + spi-max-frequency = <500000>;
90 + };
91 +
92 + spidev@1{
93 + compatible = "spidev";
94 + reg = <1>; /* CE1 */
95 + #address-cells = <1>;
96 + #size-cells = <0>;
97 + spi-max-frequency = <500000>;
98 + };
99 +};
100 +
101 +&i2c0 {
102 + pinctrl-names = "default";
103 + pinctrl-0 = <&i2c0_pins>;
104 + clock-frequency = <100000>;
105 +};
106 +
107 +&i2c1 {
108 + pinctrl-names = "default";
109 + pinctrl-0 = <&i2c1_pins>;
110 + clock-frequency = <100000>;
111 +};
112 +
113 +&i2c2 {
114 + clock-frequency = <100000>;
115 +};
116 +
117 +&i2s {
118 + #sound-dai-cells = <0>;
119 + pinctrl-names = "default";
120 + pinctrl-0 = <&i2s_pins>;
121 +};
122 +
123 +&leds {
124 + act_led: act {
125 + label = "led0";
126 + linux,default-trigger = "mmc0";
127 + gpios = <&gpio 47 0>;
128 + };
129 +
130 + pwr_led: pwr {
131 + label = "led1";
132 + linux,default-trigger = "input";
133 + gpios = <&gpio 35 0>;
134 + };
135 +};
136 +
137 +/ {
138 + __overrides__ {
139 + uart0 = <&uart0>,"status";
140 + uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
141 + uart1_clkrate = <&uart1>,"clock-frequency:0";
142 + i2s = <&i2s>,"status";
143 + spi = <&spi0>,"status";
144 + i2c0 = <&i2c0>,"status";
145 + i2c1 = <&i2c1>,"status";
146 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
147 + i2c0_baudrate = <&i2c0>,"clock-frequency:0";
148 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
149 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
150 + core_freq = <&clk_core>,"clock-frequency:0";
151 +
152 + act_led_gpio = <&act_led>,"gpios:4";
153 + act_led_activelow = <&act_led>,"gpios:8";
154 + act_led_trigger = <&act_led>,"linux,default-trigger";
155 +
156 + pwr_led_gpio = <&pwr_led>,"gpios:4";
157 + pwr_led_activelow = <&pwr_led>,"gpios:8";
158 + pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
159 +
160 + audio = <&audio>,"status";
161 + watchdog = <&watchdog>,"status";
162 + random = <&random>,"status";
163 };
164 };
165 --- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
166 +++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
167 @@ -1,17 +1,118 @@
168 /dts-v1/;
169 -#include "bcm2835-rpi.dtsi"
170 +#include "bcm2835.dtsi"
171
172 / {
173 compatible = "raspberrypi,model-b", "brcm,bcm2835";
174 model = "Raspberry Pi Model B";
175 +};
176
177 - leds {
178 - act {
179 - gpios = <&gpio 16 1>;
180 - };
181 +&gpio {
182 + spi0_pins: spi0_pins {
183 + brcm,pins = <7 8 9 10 11>;
184 + brcm,function = <4>; /* alt0 */
185 + };
186 +
187 + i2c0_pins: i2c0 {
188 + brcm,pins = <0 1>;
189 + brcm,function = <4>;
190 + };
191 +
192 + i2c1_pins: i2c1 {
193 + brcm,pins = <2 3>;
194 + brcm,function = <4>;
195 + };
196 +
197 + i2s_pins: i2s {
198 + brcm,pins = <28 29 30 31>;
199 + brcm,function = <6>; /* alt2 */
200 };
201 };
202
203 -&gpio {
204 - pinctrl-0 = <&gpioout &alt0 &alt3>;
205 +&mmc {
206 + status = "okay";
207 + bus-width = <4>;
208 +};
209 +
210 +&fb {
211 + status = "okay";
212 +};
213 +
214 +&uart0 {
215 + status = "okay";
216 +};
217 +
218 +&spi0 {
219 + pinctrl-names = "default";
220 + pinctrl-0 = <&spi0_pins>;
221 +
222 + spidev@0{
223 + compatible = "spidev";
224 + reg = <0>; /* CE0 */
225 + #address-cells = <1>;
226 + #size-cells = <0>;
227 + spi-max-frequency = <500000>;
228 + };
229 +
230 + spidev@1{
231 + compatible = "spidev";
232 + reg = <1>; /* CE1 */
233 + #address-cells = <1>;
234 + #size-cells = <0>;
235 + spi-max-frequency = <500000>;
236 + };
237 +};
238 +
239 +&i2c0 {
240 + pinctrl-names = "default";
241 + pinctrl-0 = <&i2c0_pins>;
242 + clock-frequency = <100000>;
243 +};
244 +
245 +&i2c1 {
246 + pinctrl-names = "default";
247 + pinctrl-0 = <&i2c1_pins>;
248 + clock-frequency = <100000>;
249 +};
250 +
251 +&i2c2 {
252 + clock-frequency = <100000>;
253 +};
254 +
255 +&i2s {
256 + #sound-dai-cells = <0>;
257 + pinctrl-names = "default";
258 + pinctrl-0 = <&i2s_pins>;
259 +};
260 +
261 +&leds {
262 + act_led: act {
263 + label = "led0";
264 + linux,default-trigger = "mmc0";
265 + gpios = <&gpio 16 1>;
266 + };
267 +};
268 +
269 +/ {
270 + __overrides__ {
271 + uart0 = <&uart0>,"status";
272 + uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
273 + uart1_clkrate = <&uart1>,"clock-frequency:0";
274 + i2s = <&i2s>,"status";
275 + spi = <&spi0>,"status";
276 + i2c0 = <&i2c0>,"status";
277 + i2c1 = <&i2c1>,"status";
278 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
279 + i2c0_baudrate = <&i2c0>,"clock-frequency:0";
280 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
281 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
282 + core_freq = <&clk_core>,"clock-frequency:0";
283 +
284 + act_led_gpio = <&act_led>,"gpios:4";
285 + act_led_activelow = <&act_led>,"gpios:8";
286 + act_led_trigger = <&act_led>,"linux,default-trigger";
287 +
288 + audio = <&audio>,"status";
289 + watchdog = <&watchdog>,"status";
290 + random = <&random>,"status";
291 + };
292 };
293 --- a/arch/arm/boot/dts/bcm2835.dtsi
294 +++ b/arch/arm/boot/dts/bcm2835.dtsi
295 @@ -1,206 +1,39 @@
296 -#include <dt-bindings/pinctrl/bcm2835.h>
297 -#include <dt-bindings/clock/bcm2835.h>
298 -#include "skeleton.dtsi"
299 +#include "bcm2708_common.dtsi"
300
301 / {
302 compatible = "brcm,bcm2835";
303 model = "BCM2835";
304 - interrupt-parent = <&intc>;
305
306 chosen {
307 - bootargs = "earlyprintk console=ttyAMA0";
308 + bootargs = "";
309 };
310
311 soc {
312 - compatible = "simple-bus";
313 - #address-cells = <1>;
314 - #size-cells = <1>;
315 - ranges = <0x7e000000 0x20000000 0x02000000>;
316 + ranges = <0x7e000000 0x20000000 0x01000000>;
317 dma-ranges = <0x40000000 0x00000000 0x20000000>;
318
319 timer@7e003000 {
320 compatible = "brcm,bcm2835-system-timer";
321 reg = <0x7e003000 0x1000>;
322 interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
323 - /* This could be a reference to BCM2835_CLOCK_TIMER,
324 - * but we don't have the driver using the common clock
325 - * support yet.
326 - */
327 clock-frequency = <1000000>;
328 };
329
330 - dma: dma@7e007000 {
331 - compatible = "brcm,bcm2835-dma";
332 - reg = <0x7e007000 0xf00>;
333 - interrupts = <1 16>,
334 - <1 17>,
335 - <1 18>,
336 - <1 19>,
337 - <1 20>,
338 - <1 21>,
339 - <1 22>,
340 - <1 23>,
341 - <1 24>,
342 - <1 25>,
343 - <1 26>,
344 - <1 27>,
345 - <1 28>;
346 -
347 - #dma-cells = <1>;
348 - brcm,dma-channel-mask = <0x7f35>;
349 - };
350 -
351 - intc: interrupt-controller@7e00b200 {
352 - compatible = "brcm,bcm2835-armctrl-ic";
353 - reg = <0x7e00b200 0x200>;
354 - interrupt-controller;
355 - #interrupt-cells = <2>;
356 - };
357 -
358 - watchdog@7e100000 {
359 - compatible = "brcm,bcm2835-pm-wdt";
360 - reg = <0x7e100000 0x28>;
361 - };
362 -
363 - clocks: cprman@7e101000 {
364 - compatible = "brcm,bcm2835-cprman";
365 - #clock-cells = <1>;
366 - reg = <0x7e101000 0x2000>;
367 -
368 - /* CPRMAN derives everything from the platform's
369 - * oscillator.
370 - */
371 - clocks = <&clk_osc>;
372 - };
373 -
374 - rng@7e104000 {
375 - compatible = "brcm,bcm2835-rng";
376 - reg = <0x7e104000 0x10>;
377 - };
378 -
379 - mailbox: mailbox@7e00b800 {
380 - compatible = "brcm,bcm2835-mbox";
381 - reg = <0x7e00b880 0x40>;
382 - interrupts = <0 1>;
383 - #mbox-cells = <0>;
384 - };
385 -
386 - gpio: gpio@7e200000 {
387 - compatible = "brcm,bcm2835-gpio";
388 - reg = <0x7e200000 0xb4>;
389 - /*
390 - * The GPIO IP block is designed for 3 banks of GPIOs.
391 - * Each bank has a GPIO interrupt for itself.
392 - * There is an overall "any bank" interrupt.
393 - * In order, these are GIC interrupts 17, 18, 19, 20.
394 - * Since the BCM2835 only has 2 banks, the 2nd bank
395 - * interrupt output appears to be mirrored onto the
396 - * 3rd bank's interrupt signal.
397 - * So, a bank0 interrupt shows up on 17, 20, and
398 - * a bank1 interrupt shows up on 18, 19, 20!
399 - */
400 - interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
401 -
402 - gpio-controller;
403 - #gpio-cells = <2>;
404 -
405 - interrupt-controller;
406 - #interrupt-cells = <2>;
407 - };
408 -
409 - uart0: uart@7e201000 {
410 - compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
411 - reg = <0x7e201000 0x1000>;
412 - interrupts = <2 25>;
413 - clocks = <&clocks BCM2835_CLOCK_UART>,
414 - <&clocks BCM2835_CLOCK_VPU>;
415 - clock-names = "uartclk", "apb_pclk";
416 - arm,primecell-periphid = <0x00241011>;
417 - };
418 -
419 - i2s: i2s@7e203000 {
420 - compatible = "brcm,bcm2835-i2s";
421 - reg = <0x7e203000 0x24>,
422 - <0x7e101098 0x08>;
423 -
424 - dmas = <&dma 2>,
425 - <&dma 3>;
426 - dma-names = "tx", "rx";
427 - status = "disabled";
428 - };
429 -
430 - spi: spi@7e204000 {
431 - compatible = "brcm,bcm2835-spi";
432 - reg = <0x7e204000 0x1000>;
433 - interrupts = <2 22>;
434 - clocks = <&clocks BCM2835_CLOCK_VPU>;
435 - #address-cells = <1>;
436 - #size-cells = <0>;
437 - status = "disabled";
438 - };
439 -
440 - i2c0: i2c@7e205000 {
441 - compatible = "brcm,bcm2835-i2c";
442 - reg = <0x7e205000 0x1000>;
443 - interrupts = <2 21>;
444 - clocks = <&clocks BCM2835_CLOCK_VPU>;
445 - #address-cells = <1>;
446 - #size-cells = <0>;
447 - status = "disabled";
448 - };
449 -
450 - sdhci: sdhci@7e300000 {
451 - compatible = "brcm,bcm2835-sdhci";
452 - reg = <0x7e300000 0x100>;
453 - interrupts = <2 30>;
454 - clocks = <&clocks BCM2835_CLOCK_EMMC>;
455 - status = "disabled";
456 - };
457 -
458 - i2c1: i2c@7e804000 {
459 - compatible = "brcm,bcm2835-i2c";
460 - reg = <0x7e804000 0x1000>;
461 - interrupts = <2 21>;
462 - clocks = <&clocks BCM2835_CLOCK_VPU>;
463 - #address-cells = <1>;
464 - #size-cells = <0>;
465 - status = "disabled";
466 - };
467 -
468 - i2c2: i2c@7e805000 {
469 - compatible = "brcm,bcm2835-i2c";
470 - reg = <0x7e805000 0x1000>;
471 - interrupts = <2 21>;
472 - clocks = <&clocks BCM2835_CLOCK_VPU>;
473 - #address-cells = <1>;
474 - #size-cells = <0>;
475 - status = "disabled";
476 - };
477 -
478 - usb@7e980000 {
479 - compatible = "brcm,bcm2835-usb";
480 - reg = <0x7e980000 0x10000>;
481 - interrupts = <1 9>;
482 - };
483 -
484 arm-pmu {
485 compatible = "arm,arm1176-pmu";
486 };
487 - };
488
489 - clocks {
490 - compatible = "simple-bus";
491 - #address-cells = <1>;
492 - #size-cells = <0>;
493 -
494 - /* The oscillator is the root of the clock tree. */
495 - clk_osc: clock@3 {
496 - compatible = "fixed-clock";
497 - reg = <3>;
498 - #clock-cells = <0>;
499 - clock-output-names = "osc";
500 - clock-frequency = <19200000>;
501 + aux_enable: aux_enable@0x7e215004 {
502 + compatible = "bcrm,bcm2835-aux-enable";
503 + reg = <0x7e215004 0x04>;
504 };
505 -
506 };
507 };
508 +
509 +&intc {
510 + compatible = "brcm,bcm2835-armctrl-ic";
511 +};
512 +
513 +&watchdog {
514 + status = "okay";
515 +};