d306d84ec27bfcff15d351c57bdb669a348dfaf0
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.4 / 0102-drm-vc4-Enable-VC4-modules-and-increase-CMA-size-wit.patch
1 From 885697c1ff9e687315f0be69b775782aa135e663 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.org>
3 Date: Mon, 2 Nov 2015 17:07:33 +0000
4 Subject: [PATCH 102/156] drm/vc4: Enable VC4 modules, and increase CMA size
5 with overlay
6
7 If using the overlay, be careful not to boot to GUI or run startx,
8 or the Pi will almost hang, reporting stalls in kernel threads.
9 ---
10 arch/arm/boot/dts/overlays/README | 8 ++
11 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 95 ++++++++++++++++++++++
12 arch/arm/configs/bcm2709_defconfig | 2 +
13 arch/arm/configs/bcmrpi_defconfig | 2 +
14 4 files changed, 107 insertions(+)
15 create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
16
17 --- a/arch/arm/boot/dts/overlays/README
18 +++ b/arch/arm/boot/dts/overlays/README
19 @@ -601,6 +601,14 @@ Params: txd1_pin GPIO pi
20 rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
21
22
23 +Name: vc4-kms-v3d
24 +Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or
25 + booting to GUI while this overlay is in use will cause interesting
26 + lockups.
27 +Load: dtoverlay=vc4-kms-v3d
28 +Params: <None>
29 +
30 +
31 Name: vga666
32 Info: Overlay for the Fen Logic VGA666 board
33 This uses GPIOs 2-21 (so no I2C), and activates the output 2-3 seconds
34 --- /dev/null
35 +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
36 @@ -0,0 +1,95 @@
37 +/*
38 + * vc4-kms-v3d-overlay.dts
39 + */
40 +
41 +/dts-v1/;
42 +/plugin/;
43 +
44 +#include "dt-bindings/clock/bcm2835.h"
45 +#include "dt-bindings/gpio/gpio.h"
46 +
47 +/ {
48 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
49 +
50 + fragment@0 {
51 + target = <&i2c2>;
52 + __overlay__ {
53 + status = "okay";
54 + };
55 + };
56 +
57 + fragment@1 {
58 + target = <&cprman>;
59 + __overlay__ {
60 + status = "okay";
61 + };
62 + };
63 +
64 + fragment@2 {
65 + target = <&fb>;
66 + __overlay__ {
67 + status = "disabled";
68 + };
69 + };
70 +
71 + fragment@3 {
72 + target = <&soc>;
73 + __overlay__ {
74 + #address-cells = <1>;
75 + #size-cells = <1>;
76 +
77 + pixelvalve@7e206000 {
78 + compatible = "brcm,bcm2835-pixelvalve0";
79 + reg = <0x7e206000 0x100>;
80 + interrupts = <2 13>; /* pwa0 */
81 + };
82 +
83 + pixelvalve@7e207000 {
84 + compatible = "brcm,bcm2835-pixelvalve1";
85 + reg = <0x7e207000 0x100>;
86 + interrupts = <2 14>; /* pwa1 */
87 + };
88 +
89 + hvs@7e400000 {
90 + compatible = "brcm,bcm2835-hvs";
91 + reg = <0x7e400000 0x6000>;
92 + interrupts = <2 1>;
93 + };
94 +
95 + pixelvalve@7e807000 {
96 + compatible = "brcm,bcm2835-pixelvalve2";
97 + reg = <0x7e807000 0x100>;
98 + interrupts = <2 10>; /* pixelvalve */
99 + };
100 +
101 + hdmi@7e902000 {
102 + compatible = "brcm,bcm2835-hdmi";
103 + reg = <0x7e902000 0x600>,
104 + <0x7e808000 0x100>;
105 + interrupts = <2 8>, <2 9>;
106 + ddc = <&i2c2>;
107 + hpd-gpio = <&gpio 46 GPIO_ACTIVE_HIGH>;
108 + clocks = <&cprman BCM2835_PLLH_PIX>,
109 + <&cprman BCM2835_CLOCK_HSM>;
110 + clock-names = "pixel", "hdmi";
111 + };
112 +
113 + v3d@7ec00000 {
114 + compatible = "brcm,vc4-v3d";
115 + reg = <0x7ec00000 0x1000>;
116 + interrupts = <1 10>;
117 + };
118 +
119 + gpu@7e4c0000 {
120 + compatible = "brcm,bcm2835-vc4";
121 + };
122 + };
123 + };
124 +
125 + fragment@4 {
126 + target-path = "/chosen";
127 + __overlay__ {
128 + bootargs = "cma=256M@512M";
129 + };
130 + };
131 +};
132 --- a/arch/arm/configs/bcm2709_defconfig
133 +++ b/arch/arm/configs/bcm2709_defconfig
134 @@ -802,6 +802,8 @@ CONFIG_VIDEO_TW9903=m
135 CONFIG_VIDEO_TW9906=m
136 CONFIG_VIDEO_OV7640=m
137 CONFIG_VIDEO_MT9V011=m
138 +CONFIG_DRM=m
139 +CONFIG_DRM_VC4=m
140 CONFIG_FB=y
141 CONFIG_FB_BCM2708=y
142 CONFIG_FB_UDL=m
143 --- a/arch/arm/configs/bcmrpi_defconfig
144 +++ b/arch/arm/configs/bcmrpi_defconfig
145 @@ -795,6 +795,8 @@ CONFIG_VIDEO_TW9903=m
146 CONFIG_VIDEO_TW9906=m
147 CONFIG_VIDEO_OV7640=m
148 CONFIG_VIDEO_MT9V011=m
149 +CONFIG_DRM=m
150 +CONFIG_DRM_VC4=m
151 CONFIG_FB=y
152 CONFIG_FB_BCM2708=y
153 CONFIG_FB_UDL=m