target/linux/brcm2708/patches-4.4/0195-drm-vc4-Fix-the-clear-color-for-the-first-tile-rende.patch

   1 From 339e2ea50b25fe0183161cee31f640e691f2a1c0 Mon Sep 17 00:00:00 2001
   2 From: Eric Anholt <eric@anholt.net>
   3 Date: Mon, 25 Jan 2016 13:52:41 -0800
   4 Subject: [PATCH] drm/vc4: Fix the clear color for the first tile rendered.
   5
   6 Apparently in hardware (as opposed to simulation), the clear colors
   7 need to be uploaded before the render config, otherwise they won't
   8 take effect.  Fixes igt's vc4_wait_bo/used-bo-* subtests.
   9
  10 Signed-off-by: Eric Anholt <eric@anholt.net>
  11 ---
  12  drivers/gpu/drm/vc4/vc4_render_cl.c | 18 +++++++++---------
  13  1 file changed, 9 insertions(+), 9 deletions(-)
  14
  15 --- a/drivers/gpu/drm/vc4/vc4_render_cl.c
  16 +++ b/drivers/gpu/drm/vc4/vc4_render_cl.c
  17 @@ -321,15 +321,6 @@ static int vc4_create_rcl_bo(struct drm_
  18         list_add_tail(&to_vc4_bo(&setup->rcl->base)->unref_head,
  19                       &exec->unref_list);
  20
  21 -       rcl_u8(setup, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);
  22 -       rcl_u32(setup,
  23 -               (setup->color_write ? (setup->color_write->paddr +
  24 -                                      args->color_write.offset) :
  25 -                0));
  26 -       rcl_u16(setup, args->width);
  27 -       rcl_u16(setup, args->height);
  28 -       rcl_u16(setup, args->color_write.bits);
  29 -
  30         /* The tile buffer gets cleared when the previous tile is stored.  If
  31          * the clear values changed between frames, then the tile buffer has
  32          * stale clear values in it, so we have to do a store in None mode (no
  33 @@ -349,6 +340,15 @@ static int vc4_create_rcl_bo(struct drm_
  34                 rcl_u32(setup, 0); /* no address, since we're in None mode */
  35         }
  36
  37 +       rcl_u8(setup, VC4_PACKET_TILE_RENDERING_MODE_CONFIG);
  38 +       rcl_u32(setup,
  39 +               (setup->color_write ? (setup->color_write->paddr +
  40 +                                      args->color_write.offset) :
  41 +                0));
  42 +       rcl_u16(setup, args->width);
  43 +       rcl_u16(setup, args->height);
  44 +       rcl_u16(setup, args->color_write.bits);
  45 +
  46         for (y = min_y_tile; y <= max_y_tile; y++) {
  47                 for (x = min_x_tile; x <= max_x_tile; x++) {
  48                         bool first = (x == min_x_tile && y == min_y_tile);