brcm2708: update linux 4.4 patches to latest version
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.4 / 0255-clk-bcm2835-added-missing-clock-register-definitions.patch
1 From 4b1216203d83ff57820312dafb9a0b3500f03f80 Mon Sep 17 00:00:00 2001
2 From: Martin Sperl <kernel@martin.sperl.org>
3 Date: Tue, 22 Dec 2015 20:13:08 +0000
4 Subject: [PATCH 255/381] clk: bcm2835: added missing clock register
5 definitions
6
7 Added missing CTRL and DIV clock register definitions for:
8 PCM, SLIM, TCNT, TEC, TD0, TD1
9
10 Register information taken from:
11 https://rawgit.com/msperl/rpi-registers/master/rpi-registers.html#CM
12 which extracted the information from the header files shared by
13 Broadcom/rpi foundation in this file:
14 http://www.broadcom.com/docs/support/videocore/Brcm_Android_ICS_Graphics_Stack.tar.gz
15
16 Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
17 Reviewed-by: Eric Anholt <eric@anholt.net>
18 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
19 (cherry picked from commit 2103a2156119b30f5924af2a1094227954be4617)
20 ---
21 drivers/clk/bcm/clk-bcm2835.c | 13 +++++++++++++
22 1 file changed, 13 insertions(+)
23
24 --- a/drivers/clk/bcm/clk-bcm2835.c
25 +++ b/drivers/clk/bcm/clk-bcm2835.c
26 @@ -88,10 +88,23 @@
27 #define CM_HSMDIV 0x08c
28 #define CM_OTPCTL 0x090
29 #define CM_OTPDIV 0x094
30 +#define CM_PCMCTL 0x098
31 +#define CM_PCMDIV 0x09c
32 #define CM_PWMCTL 0x0a0
33 #define CM_PWMDIV 0x0a4
34 +#define CM_SLIMCTL 0x0a8
35 +#define CM_SLIMDIV 0x0ac
36 #define CM_SMICTL 0x0b0
37 #define CM_SMIDIV 0x0b4
38 +/* no definition for 0x0b8 and 0x0bc */
39 +#define CM_TCNTCTL 0x0c0
40 +#define CM_TCNTDIV 0x0c4
41 +#define CM_TECCTL 0x0c8
42 +#define CM_TECDIV 0x0cc
43 +#define CM_TD0CTL 0x0d0
44 +#define CM_TD0DIV 0x0d4
45 +#define CM_TD1CTL 0x0d8
46 +#define CM_TD1DIV 0x0dc
47 #define CM_TSENSCTL 0x0e0
48 #define CM_TSENSDIV 0x0e4
49 #define CM_TIMERCTL 0x0e8