brcm2708-gpu-fw: update to latest version
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.4 / 0267-clk-bcm2835-Fix-PLL-poweron.patch
1 From 66350cdbb13029d143f99c97b0953805afe2f175 Mon Sep 17 00:00:00 2001
2 From: Eric Anholt <eric@anholt.net>
3 Date: Wed, 13 Apr 2016 13:05:03 -0700
4 Subject: [PATCH 267/304] clk: bcm2835: Fix PLL poweron
5
6 In poweroff, we set the reset bit and the power down bit, but only
7 managed to unset the reset bit for poweron. This meant that if HDMI
8 did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the
9 PLLH (that had been on at boot time) and never recover.
10
11 Signed-off-by: Eric Anholt <eric@anholt.net>
12 Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
13 Cc: stable@vger.kernel.org
14 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
15 (cherry picked from commit d794a7b18350b7538e64248adf639f2cb8da5fb7)
16 ---
17 drivers/clk/bcm/clk-bcm2835.c | 4 ++++
18 1 file changed, 4 insertions(+)
19
20 --- a/drivers/clk/bcm/clk-bcm2835.c
21 +++ b/drivers/clk/bcm/clk-bcm2835.c
22 @@ -557,6 +557,10 @@ static int bcm2835_pll_on(struct clk_hw
23 const struct bcm2835_pll_data *data = pll->data;
24 ktime_t timeout;
25
26 + cprman_write(cprman, data->a2w_ctrl_reg,
27 + cprman_read(cprman, data->a2w_ctrl_reg) &
28 + ~A2W_PLL_CTRL_PWRDN);
29 +
30 /* Take the PLL out of reset. */
31 cprman_write(cprman, data->cm_ctrl_reg,
32 cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);