brcm2708: update linux 4.4 patches to latest version
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.4 / 0357-rtc-ds1307-ensure-that-any-pending-alarm-is-cleared-.patch
1 From 0d311e4c6e701192c62668665ae1ba25d2219f28 Mon Sep 17 00:00:00 2001
2 From: Nicolas Boullis <nboullis@debian.org>
3 Date: Sun, 10 Apr 2016 13:23:05 +0200
4 Subject: [PATCH 357/381] rtc: ds1307: ensure that any pending alarm is cleared
5 before a new alarm is enabled
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 If a previously-set alarm was disabled and then triggered, it may still
11 be pending when a new alarm is configured.
12
13 Then, if the alarm is enabled before the pending alarm is cleared, then
14 an interrupt is immediately raised.
15
16 Unfortunately, when the alarm is cleared and enabled during the same I²C
17 block write, the chip (at least the DS1339 I have) considers that the
18 alarm is enabled before it is cleared, and raises an interrupt.
19
20 This patch ensures that the pending alarm is cleared before the alarm is
21 enabled.
22
23 Signed-off-by: Nicolas Boullis <nboullis@debian.org>
24 Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
25 ---
26 drivers/rtc/rtc-ds1307.c | 13 ++++++++-----
27 1 file changed, 8 insertions(+), 5 deletions(-)
28
29 --- a/drivers/rtc/rtc-ds1307.c
30 +++ b/drivers/rtc/rtc-ds1307.c
31 @@ -540,12 +540,8 @@ static int ds1337_set_alarm(struct devic
32 buf[5] = 0;
33 buf[6] = 0;
34
35 - /* optionally enable ALARM1 */
36 + /* disable alarms */
37 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
38 - if (t->enabled) {
39 - dev_dbg(dev, "alarm IRQ armed\n");
40 - buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
41 - }
42 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
43
44 ret = ds1307->write_block_data(client,
45 @@ -555,6 +551,13 @@ static int ds1337_set_alarm(struct devic
46 return ret;
47 }
48
49 + /* optionally enable ALARM1 */
50 + if (t->enabled) {
51 + dev_dbg(dev, "alarm IRQ armed\n");
52 + buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
53 + i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
54 + }
55 +
56 return 0;
57 }
58