82f462847b876639331fedd8dcab13559ef8c7f7
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.9 / 950-0151-clk-bcm2835-Fix-fixed_divider-of-pllh_aux.patch
1 From b8ded4dca34feafd33f22eff47d19b17b7dd83f4 Mon Sep 17 00:00:00 2001
2 From: Boris Brezillon <boris.brezillon@free-electrons.com>
3 Date: Tue, 22 Nov 2016 12:45:28 -0800
4 Subject: [PATCH] clk: bcm2835: Fix ->fixed_divider of pllh_aux
5
6 There is no fixed divider on pllh_aux.
7
8 Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
9 Signed-off-by: Eric Anholt <eric@anholt.net>
10 Reviewed-by: Eric Anholt <eric@anholt.net>
11 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
12 (cherry picked from commit f2a46926aba1f0c33944901d2420a6a887455ddc)
13 ---
14 drivers/clk/bcm/clk-bcm2835.c | 2 +-
15 1 file changed, 1 insertion(+), 1 deletion(-)
16
17 --- a/drivers/clk/bcm/clk-bcm2835.c
18 +++ b/drivers/clk/bcm/clk-bcm2835.c
19 @@ -1607,7 +1607,7 @@ static const struct bcm2835_clk_desc clk
20 .a2w_reg = A2W_PLLH_AUX,
21 .load_mask = CM_PLLH_LOADAUX,
22 .hold_mask = 0,
23 - .fixed_divider = 10),
24 + .fixed_divider = 1),
25 [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
26 .name = "pllh_pix",
27 .source_pll = "pllh",