a2d22312ca603e25a50a648acbe12fe6f9c8595b
[openwrt/openwrt.git] / target / linux / brcm47xx-2.6 / files / drivers / ssb / main.c
1 /*
2 * Sonics Silicon Backplane
3 * Subsystem core
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11 #include "ssb_private.h"
12
13 #include <linux/delay.h>
14 #include <linux/ssb/ssb.h>
15 #include <linux/ssb/ssb_regs.h>
16
17 #ifdef CONFIG_SSB_PCIHOST
18 # include <linux/pci.h>
19 #endif
20
21 #ifdef CONFIG_SSB_PCMCIAHOST
22 # include <pcmcia/cs_types.h>
23 # include <pcmcia/cs.h>
24 # include <pcmcia/cistpl.h>
25 # include <pcmcia/ds.h>
26 #endif
27
28
29 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
30 MODULE_LICENSE("GPL");
31
32
33 static LIST_HEAD(attach_queue);
34 static LIST_HEAD(buses);
35 static int nr_buses;
36 static DEFINE_MUTEX(buses_mutex);
37
38 static void ssb_buses_lock(void);
39 static void ssb_buses_unlock(void);
40
41
42 #ifdef CONFIG_SSB_PCIHOST
43 struct ssb_bus * ssb_pci_dev_to_bus(struct pci_dev *pdev)
44 {
45 struct ssb_bus *bus;
46
47 ssb_buses_lock();
48 list_for_each_entry(bus, &buses, list) {
49 if (bus->bustype == SSB_BUSTYPE_PCI &&
50 bus->host_pci == pdev)
51 goto found;
52 }
53 bus = NULL;
54 found:
55 ssb_buses_unlock();
56
57 return bus;
58 }
59 #endif /* CONFIG_SSB_PCIHOST */
60
61 static struct ssb_device * ssb_device_get(struct ssb_device *dev)
62 {
63 if (dev)
64 get_device(dev->dev);
65 return dev;
66 }
67
68 static void ssb_device_put(struct ssb_device *dev)
69 {
70 if (dev)
71 put_device(dev->dev);
72 }
73
74 static int ssb_bus_resume(struct ssb_bus *bus)
75 {
76 int err;
77
78 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
79 err = ssb_pcmcia_init(bus);
80 if (err) {
81 /* No need to disable XTAL, as we don't have one on PCMCIA. */
82 return err;
83 }
84 ssb_chipco_resume(&bus->chipco);
85
86 return 0;
87 }
88
89 static int ssb_device_resume(struct device *dev)
90 {
91 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
92 struct ssb_driver *ssb_drv;
93 struct ssb_bus *bus;
94 int err = 0;
95
96 bus = ssb_dev->bus;
97 if (bus->suspend_cnt == bus->nr_devices) {
98 err = ssb_bus_resume(bus);
99 if (err)
100 return err;
101 }
102 bus->suspend_cnt--;
103 if (dev->driver) {
104 ssb_drv = drv_to_ssb_drv(dev->driver);
105 if (ssb_drv && ssb_drv->resume)
106 err = ssb_drv->resume(ssb_dev);
107 if (err)
108 goto out;
109 }
110 out:
111 return err;
112 }
113
114 static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state)
115 {
116 ssb_chipco_suspend(&bus->chipco, state);
117 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
118
119 /* Reset HW state information in memory, so that HW is
120 * completely reinitialized on resume. */
121 bus->mapped_device = NULL;
122 #ifdef CONFIG_SSB_DRIVER_PCICORE
123 bus->pcicore.setup_done = 0;
124 #endif
125 }
126
127 static int ssb_device_suspend(struct device *dev, pm_message_t state)
128 {
129 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
130 struct ssb_driver *ssb_drv;
131 struct ssb_bus *bus;
132 int err = 0;
133
134 if (dev->driver) {
135 ssb_drv = drv_to_ssb_drv(dev->driver);
136 if (ssb_drv && ssb_drv->suspend)
137 err = ssb_drv->suspend(ssb_dev, state);
138 if (err)
139 goto out;
140 }
141
142 bus = ssb_dev->bus;
143 bus->suspend_cnt++;
144 if (bus->suspend_cnt == bus->nr_devices) {
145 /* All devices suspended. Shutdown the bus. */
146 ssb_bus_suspend(bus, state);
147 }
148
149 out:
150 return err;
151 }
152
153 #ifdef CONFIG_SSB_PCIHOST
154 int ssb_devices_freeze(struct ssb_bus *bus)
155 {
156 struct ssb_device *dev;
157 struct ssb_driver *drv;
158 int err = 0;
159 int i;
160 pm_message_t state = PMSG_FREEZE;
161
162 for (i = 0; i < bus->nr_devices; i++) {
163 dev = &(bus->devices[i]);
164 if (!dev->dev->driver)
165 continue;
166 if (!device_is_registered(dev->dev))
167 continue;
168 drv = drv_to_ssb_drv(dev->dev->driver);
169 if (drv && drv->suspend) {
170 err = drv->suspend(dev, state);
171 if (err)
172 goto out;
173 }
174 }
175 out:
176 return err;
177 }
178
179 int ssb_devices_thaw(struct ssb_bus *bus)
180 {
181 struct ssb_device *dev;
182 struct ssb_driver *drv;
183 int err = 0;
184 int i;
185
186 for (i = 0; i < bus->nr_devices; i++) {
187 dev = &(bus->devices[i]);
188 if (!dev->dev->driver)
189 continue;
190 if (!device_is_registered(dev->dev))
191 continue;
192 drv = drv_to_ssb_drv(dev->dev->driver);
193 if (drv && drv->resume) {
194 err = drv->resume(dev);
195 if (err)
196 goto out;
197 }
198 }
199 out:
200 return err;
201 }
202 #endif /* CONFIG_SSB_PCIHOST */
203
204 static void ssb_device_shutdown(struct device *dev)
205 {
206 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
207 struct ssb_driver *ssb_drv;
208
209 if (!dev->driver)
210 return;
211 ssb_drv = drv_to_ssb_drv(dev->driver);
212 if (ssb_drv && ssb_drv->shutdown)
213 ssb_drv->shutdown(ssb_dev);
214 }
215
216 static int ssb_device_remove(struct device *dev)
217 {
218 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
219 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
220
221 if (ssb_drv && ssb_drv->remove)
222 ssb_drv->remove(ssb_dev);
223 ssb_device_put(ssb_dev);
224
225 return 0;
226 }
227
228 static int ssb_device_probe(struct device *dev)
229 {
230 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
231 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
232 int err = 0;
233
234 ssb_device_get(ssb_dev);
235 if (ssb_drv && ssb_drv->probe)
236 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
237 if (err)
238 ssb_device_put(ssb_dev);
239
240 return err;
241 }
242
243 static int ssb_match_devid(const struct ssb_device_id *tabid,
244 const struct ssb_device_id *devid)
245 {
246 if ((tabid->vendor != devid->vendor) &&
247 tabid->vendor != SSB_ANY_VENDOR)
248 return 0;
249 if ((tabid->coreid != devid->coreid) &&
250 tabid->coreid != SSB_ANY_ID)
251 return 0;
252 if ((tabid->revision != devid->revision) &&
253 tabid->revision != SSB_ANY_REV)
254 return 0;
255 return 1;
256 }
257
258 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
259 {
260 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
261 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
262 const struct ssb_device_id *id;
263
264 for (id = ssb_drv->id_table;
265 id->vendor || id->coreid || id->revision;
266 id++) {
267 if (ssb_match_devid(id, &ssb_dev->id))
268 return 1; /* found */
269 }
270
271 return 0;
272 }
273
274 static struct bus_type ssb_bustype = {
275 .name = NULL, /* Intentionally NULL to indicate early boot */
276 .match = ssb_bus_match,
277 .probe = ssb_device_probe,
278 .remove = ssb_device_remove,
279 .shutdown = ssb_device_shutdown,
280 .suspend = ssb_device_suspend,
281 .resume = ssb_device_resume,
282 };
283
284 #define is_early_boot() (ssb_bustype.name == NULL)
285
286 static void ssb_buses_lock(void)
287 {
288 if (!is_early_boot())
289 mutex_lock(&buses_mutex);
290 }
291
292 static void ssb_buses_unlock(void)
293 {
294 if (!is_early_boot())
295 mutex_unlock(&buses_mutex);
296 }
297
298 static void ssb_devices_unregister(struct ssb_bus *bus)
299 {
300 struct ssb_device *sdev;
301 int i;
302
303 for (i = bus->nr_devices - 1; i >= 0; i--) {
304 sdev = &(bus->devices[i]);
305 if (sdev->dev)
306 device_unregister(sdev->dev);
307 }
308 }
309
310 void ssb_bus_unregister(struct ssb_bus *bus)
311 {
312 ssb_buses_lock();
313 ssb_devices_unregister(bus);
314 list_del(&bus->list);
315 ssb_buses_unlock();
316
317 /* ssb_pcmcia_exit(bus); */
318 ssb_pci_exit(bus);
319 ssb_iounmap(bus);
320 }
321 EXPORT_SYMBOL(ssb_bus_unregister);
322
323 static void ssb_release_dev(struct device *dev)
324 {
325 struct __ssb_dev_wrapper *devwrap;
326
327 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
328 kfree(devwrap);
329 }
330
331 static int ssb_devices_register(struct ssb_bus *bus)
332 {
333 struct ssb_device *sdev;
334 struct device *dev;
335 struct __ssb_dev_wrapper *devwrap;
336 int i, err = 0;
337 int dev_idx = 0;
338
339 for (i = 0; i < bus->nr_devices; i++) {
340 sdev = &(bus->devices[i]);
341
342 /* We don't register SSB-system devices to the kernel,
343 * as the drivers for them are built into SSB. */
344 switch (sdev->id.coreid) {
345 case SSB_DEV_CHIPCOMMON:
346 case SSB_DEV_PCI:
347 case SSB_DEV_PCIE:
348 case SSB_DEV_PCMCIA:
349 case SSB_DEV_MIPS:
350 case SSB_DEV_MIPS_3302:
351 case SSB_DEV_EXTIF:
352 continue;
353 }
354
355 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
356 if (!devwrap) {
357 ssb_printk(KERN_ERR PFX
358 "Could not allocate device\n");
359 err = -ENOMEM;
360 goto error;
361 }
362 dev = &devwrap->dev;
363 devwrap->sdev = sdev;
364
365 dev->release = ssb_release_dev;
366 dev->bus = &ssb_bustype;
367 snprintf(dev->bus_id, sizeof(dev->bus_id),
368 "ssb%d:%d", bus->busnumber, dev_idx);
369
370 switch (bus->bustype) {
371 case SSB_BUSTYPE_PCI:
372 #ifdef CONFIG_SSB_PCIHOST
373 sdev->irq = bus->host_pci->irq;
374 dev->parent = &bus->host_pci->dev;
375 #endif
376 break;
377 case SSB_BUSTYPE_PCMCIA:
378 #ifdef CONFIG_SSB_PCMCIAHOST
379 dev->parent = &bus->host_pcmcia->dev;
380 #endif
381 break;
382 case SSB_BUSTYPE_SSB:
383 break;
384 }
385
386 sdev->dev = dev;
387 err = device_register(dev);
388 if (err) {
389 ssb_printk(KERN_ERR PFX
390 "Could not register %s\n",
391 dev->bus_id);
392 /* Set dev to NULL to not unregister
393 * dev on error unwinding. */
394 sdev->dev = NULL;
395 kfree(devwrap);
396 goto error;
397 }
398 dev_idx++;
399 }
400
401 return 0;
402 error:
403 /* Unwind the already registered devices. */
404 ssb_devices_unregister(bus);
405 return err;
406 }
407
408 /* Needs ssb_buses_lock() */
409 static int ssb_attach_queued_buses(void)
410 {
411 struct ssb_bus *bus, *n;
412 int err = 0;
413 int drop_them_all = 0;
414
415 list_for_each_entry_safe(bus, n, &attach_queue, list) {
416 if (drop_them_all) {
417 list_del(&bus->list);
418 continue;
419 }
420 /* Can't init the PCIcore in ssb_bus_register(), as that
421 * is too early in boot for embedded systems
422 * (no udelay() available). So do it here in attach stage.
423 */
424 ssb_pcicore_init(&bus->pcicore);
425
426 err = ssb_devices_register(bus);
427 if (err) {
428 drop_them_all = 1;
429 list_del(&bus->list);
430 continue;
431 }
432 list_move_tail(&bus->list, &buses);
433 }
434
435 return err;
436 }
437
438 static void ssb_get_boardtype(struct ssb_bus *bus)
439 {//FIXME for pcmcia?
440 if (bus->bustype != SSB_BUSTYPE_PCI) {
441 /* Must set board_vendor, board_type and board_rev
442 * before calling ssb_bus_*_register() */
443 assert(bus->board_vendor && bus->board_type);
444 return;
445 }
446 ssb_pci_get_boardtype(bus);
447 }
448
449 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
450 {
451 struct ssb_bus *bus = dev->bus;
452
453 offset += dev->core_index * SSB_CORE_SIZE;
454 return readw(bus->mmio + offset);
455 }
456
457 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
458 {
459 struct ssb_bus *bus = dev->bus;
460
461 offset += dev->core_index * SSB_CORE_SIZE;
462 return readl(bus->mmio + offset);
463 }
464
465 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
466 {
467 struct ssb_bus *bus = dev->bus;
468
469 offset += dev->core_index * SSB_CORE_SIZE;
470 writew(value, bus->mmio + offset);
471 }
472
473 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
474 {
475 struct ssb_bus *bus = dev->bus;
476
477 offset += dev->core_index * SSB_CORE_SIZE;
478 writel(value, bus->mmio + offset);
479 }
480
481 static const struct ssb_bus_ops ssb_ssb_ops = {
482 .read16 = ssb_ssb_read16,
483 .read32 = ssb_ssb_read32,
484 .write16 = ssb_ssb_write16,
485 .write32 = ssb_ssb_write32,
486 };
487
488 static int ssb_bus_register(struct ssb_bus *bus,
489 unsigned long baseaddr)
490 {
491 int err;
492
493 spin_lock_init(&bus->bar_lock);
494 INIT_LIST_HEAD(&bus->list);
495
496 ssb_get_boardtype(bus);
497 /* Powerup the bus */
498 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
499 if (err)
500 goto out;
501 ssb_buses_lock();
502 bus->busnumber = nr_buses;
503 /* Scan for devices (cores) */
504 err = ssb_bus_scan(bus, baseaddr);
505 if (err)
506 goto err_disable_xtal;
507
508 /* Init PCI-host device (if any) */
509 err = ssb_pci_init(bus);
510 if (err)
511 goto err_unmap;
512 /* Init PCMCIA-host device (if any) */
513 err = ssb_pcmcia_init(bus);
514 if (err)
515 goto err_pci_exit;
516
517 /* Initialize basic system devices (if available) */
518 ssb_chipcommon_init(&bus->chipco);
519 ssb_mipscore_init(&bus->mipscore);
520
521 /* Queue it for attach */
522 list_add_tail(&bus->list, &attach_queue);
523 if (!is_early_boot()) {
524 /* This is not early boot, so we must attach the bus now */
525 err = ssb_attach_queued_buses();
526 if (err)
527 goto err_dequeue;
528 }
529 nr_buses++;
530 ssb_buses_unlock();
531
532 out:
533 return err;
534
535 err_dequeue:
536 list_del(&bus->list);
537 /* err_pcmcia_exit: */
538 /* ssb_pcmcia_exit(bus); */
539 err_pci_exit:
540 ssb_pci_exit(bus);
541 err_unmap:
542 ssb_iounmap(bus);
543 err_disable_xtal:
544 ssb_buses_unlock();
545 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
546 return err;
547 }
548
549 #ifdef CONFIG_SSB_PCIHOST
550 int ssb_bus_pcibus_register(struct ssb_bus *bus,
551 struct pci_dev *host_pci)
552 {
553 int err;
554
555 bus->bustype = SSB_BUSTYPE_PCI;
556 bus->host_pci = host_pci;
557 bus->ops = &ssb_pci_ops;
558
559 err = ssb_bus_register(bus, 0);
560 if (!err) {
561 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
562 "PCI device %s\n", host_pci->dev.bus_id);
563 }
564
565 return err;
566 }
567 EXPORT_SYMBOL(ssb_bus_pcibus_register);
568 #endif /* CONFIG_SSB_PCIHOST */
569
570 #ifdef CONFIG_SSB_PCMCIAHOST
571 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
572 struct pcmcia_device *pcmcia_dev,
573 unsigned long baseaddr,
574 void (*fill_sprom)(struct ssb_sprom *sprom))
575 {
576 int err;
577
578 bus->bustype = SSB_BUSTYPE_PCMCIA;
579 bus->host_pcmcia = pcmcia_dev;
580 bus->ops = &ssb_pcmcia_ops;
581 fill_sprom(&bus->sprom);
582
583 err = ssb_bus_register(bus, baseaddr);
584 if (!err) {
585 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
586 "PCMCIA device %s\n", pcmcia_dev->devname);
587 }
588
589 return err;
590 }
591 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
592 #endif /* CONFIG_SSB_PCMCIAHOST */
593
594 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
595 unsigned long baseaddr,
596 void (*fill_sprom)(struct ssb_sprom *sprom))
597 {
598 int err;
599
600 bus->bustype = SSB_BUSTYPE_SSB;
601 bus->ops = &ssb_ssb_ops;
602 fill_sprom(&bus->sprom);
603
604 err = ssb_bus_register(bus, baseaddr);
605 if (!err) {
606 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
607 "address 0x%08lX\n", baseaddr);
608 }
609
610 return err;
611 }
612
613 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
614 {
615 drv->drv.name = drv->name;
616 drv->drv.bus = &ssb_bustype;
617 drv->drv.owner = owner;
618
619 return driver_register(&drv->drv);
620 }
621 EXPORT_SYMBOL(__ssb_driver_register);
622
623 void ssb_driver_unregister(struct ssb_driver *drv)
624 {
625 driver_unregister(&drv->drv);
626 }
627 EXPORT_SYMBOL(ssb_driver_unregister);
628
629 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
630 {
631 struct ssb_bus *bus = dev->bus;
632 struct ssb_device *ent;
633 int i;
634
635 for (i = 0; i < bus->nr_devices; i++) {
636 ent = &(bus->devices[i]);
637 if (ent->id.vendor != dev->id.vendor)
638 continue;
639 if (ent->id.coreid != dev->id.coreid)
640 continue;
641
642 ent->devtypedata = data;
643 }
644 }
645 EXPORT_SYMBOL(ssb_set_devtypedata);
646
647 static u32 clkfactor_f6_resolve(u32 v)
648 {
649 /* map the magic values */
650 switch (v) {
651 case SSB_CHIPCO_CLK_F6_2:
652 return 2;
653 case SSB_CHIPCO_CLK_F6_3:
654 return 3;
655 case SSB_CHIPCO_CLK_F6_4:
656 return 4;
657 case SSB_CHIPCO_CLK_F6_5:
658 return 5;
659 case SSB_CHIPCO_CLK_F6_6:
660 return 6;
661 case SSB_CHIPCO_CLK_F6_7:
662 return 7;
663 }
664 return 0;
665 }
666
667 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
668 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
669 {
670 u32 n1, n2, clock, m1, m2, m3, mc;
671
672 n1 = (n & SSB_CHIPCO_CLK_N1);
673 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
674
675 switch (plltype) {
676 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
677 if (m & SSB_CHIPCO_CLK_T6_MMASK)
678 return SSB_CHIPCO_CLK_T6_M0;
679 return SSB_CHIPCO_CLK_T6_M1;
680 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
681 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
682 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
683 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
684 n1 = clkfactor_f6_resolve(n1);
685 n2 += SSB_CHIPCO_CLK_F5_BIAS;
686 break;
687 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
688 n1 += SSB_CHIPCO_CLK_T2_BIAS;
689 n2 += SSB_CHIPCO_CLK_T2_BIAS;
690 assert((n1 >= 2) && (n1 <= 7));
691 assert((n2 >= 5) && (n2 <= 23));
692 break;
693 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
694 return 100000000;
695 default:
696 assert(0);
697 }
698
699 switch (plltype) {
700 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
701 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
702 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
703 break;
704 default:
705 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
706 }
707 if (!clock)
708 return 0;
709
710 m1 = (m & SSB_CHIPCO_CLK_M1);
711 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
712 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
713 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
714
715 switch (plltype) {
716 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
717 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
718 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
719 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
720 m1 = clkfactor_f6_resolve(m1);
721 if ((plltype == SSB_PLLTYPE_1) ||
722 (plltype == SSB_PLLTYPE_3))
723 m2 += SSB_CHIPCO_CLK_F5_BIAS;
724 else
725 m2 = clkfactor_f6_resolve(m2);
726 m3 = clkfactor_f6_resolve(m3);
727
728 switch (mc) {
729 case SSB_CHIPCO_CLK_MC_BYPASS:
730 return clock;
731 case SSB_CHIPCO_CLK_MC_M1:
732 return (clock / m1);
733 case SSB_CHIPCO_CLK_MC_M1M2:
734 return (clock / (m1 * m2));
735 case SSB_CHIPCO_CLK_MC_M1M2M3:
736 return (clock / (m1 * m2 * m3));
737 case SSB_CHIPCO_CLK_MC_M1M3:
738 return (clock / (m1 * m3));
739 }
740 return 0;
741 case SSB_PLLTYPE_2:
742 m1 += SSB_CHIPCO_CLK_T2_BIAS;
743 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
744 m3 += SSB_CHIPCO_CLK_T2_BIAS;
745 assert((m1 >= 2) && (m1 <= 7));
746 assert((m2 >= 3) && (m2 <= 10));
747 assert((m3 >= 2) && (m3 <= 7));
748
749 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
750 clock /= m1;
751 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
752 clock /= m2;
753 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
754 clock /= m3;
755 return clock;
756 default:
757 assert(0);
758 }
759 return 0;
760 }
761
762 /* Get the current speed the backplane is running at */
763 u32 ssb_clockspeed(struct ssb_bus *bus)
764 {
765 u32 rate;
766 u32 plltype;
767 u32 clkctl_n, clkctl_m;
768
769 //TODO if EXTIF: PLLTYPE == 1, read n from clockcontrol_n, m from clockcontrol_sb
770
771 if (bus->chipco.dev) {
772 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
773 &clkctl_n, &clkctl_m);
774 } else
775 return 0;
776
777 if (bus->chip_id == 0x5365) {
778 rate = 100000000;
779 } else {
780 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
781 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
782 rate /= 2;
783 }
784
785 return rate;
786 }
787 EXPORT_SYMBOL(ssb_clockspeed);
788
789 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
790 {
791 /* The REJECT bit changed position in TMSLOW between
792 * Backplane revisions. */
793 switch (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV) {
794 case SSB_IDLOW_SSBREV_22:
795 return SSB_TMSLOW_REJECT_22;
796 case SSB_IDLOW_SSBREV_23:
797 return SSB_TMSLOW_REJECT_23;
798 default:
799 assert(0);
800 }
801 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
802 }
803
804 int ssb_device_is_enabled(struct ssb_device *dev)
805 {
806 u32 val;
807 u32 reject;
808
809 reject = ssb_tmslow_reject_bitmask(dev);
810 val = ssb_read32(dev, SSB_TMSLOW);
811 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
812
813 return (val == SSB_TMSLOW_CLOCK);
814 }
815 EXPORT_SYMBOL(ssb_device_is_enabled);
816
817 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
818 {
819 u32 val;
820
821 ssb_device_disable(dev, core_specific_flags);
822 ssb_write32(dev, SSB_TMSLOW,
823 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
824 SSB_TMSLOW_FGC | core_specific_flags);
825 /* flush */
826 ssb_read32(dev, SSB_TMSLOW);
827 udelay(1);
828
829 /* Clear SERR if set. This is a hw bug workaround. */
830 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
831 ssb_write32(dev, SSB_TMSHIGH, 0);
832
833 val = ssb_read32(dev, SSB_IMSTATE);
834 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
835 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
836 ssb_write32(dev, SSB_IMSTATE, val);
837 }
838
839 ssb_write32(dev, SSB_TMSLOW,
840 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
841 core_specific_flags);
842 /* flush */
843 ssb_read32(dev, SSB_TMSLOW);
844 udelay(1);
845
846 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
847 core_specific_flags);
848 /* flush */
849 ssb_read32(dev, SSB_TMSLOW);
850 udelay(1);
851 }
852 EXPORT_SYMBOL(ssb_device_enable);
853
854 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
855 int timeout, int set)
856 {
857 int i;
858 u32 val;
859
860 for (i = 0; i < timeout; i++) {
861 val = ssb_read32(dev, reg);
862 if (set) {
863 if (val & bitmask)
864 return 0;
865 } else {
866 if (!(val & bitmask))
867 return 0;
868 }
869 udelay(10);
870 }
871 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
872 "register %04X to %s.\n",
873 bitmask, reg, (set ? "set" : "clear"));
874
875 return -ETIMEDOUT;
876 }
877
878 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
879 {
880 u32 reject;
881
882 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
883 return;
884
885 reject = ssb_tmslow_reject_bitmask(dev);
886 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
887 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
888 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
889 ssb_write32(dev, SSB_TMSLOW,
890 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
891 reject | SSB_TMSLOW_RESET |
892 core_specific_flags);
893 /* flush */
894 ssb_read32(dev, SSB_TMSLOW);
895 udelay(1);
896
897 ssb_write32(dev, SSB_TMSLOW,
898 reject | SSB_TMSLOW_RESET |
899 core_specific_flags);
900 /* flush */
901 ssb_read32(dev, SSB_TMSLOW);
902 udelay(1);
903 }
904 EXPORT_SYMBOL(ssb_device_disable);
905
906 u32 ssb_dma_translation(struct ssb_device *dev)
907 {
908 switch(dev->bus->bustype) {
909 case SSB_BUSTYPE_SSB:
910 return 0;
911 case SSB_BUSTYPE_PCI:
912 case SSB_BUSTYPE_PCMCIA:
913 return SSB_PCI_DMA;
914 }
915 return 0;
916 }
917 EXPORT_SYMBOL(ssb_dma_translation);
918
919 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
920 {
921 struct device *dev = ssb_dev->dev;
922
923 #ifdef CONFIG_SSB_PCIHOST
924 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI &&
925 !dma_supported(dev, mask))
926 return -EIO;
927 #endif
928 dev->coherent_dma_mask = mask;
929 dev->dma_mask = &dev->coherent_dma_mask;
930
931 return 0;
932 }
933 EXPORT_SYMBOL(ssb_dma_set_mask);
934
935 int ssb_bus_may_powerdown(struct ssb_bus *bus)
936 {
937 struct ssb_chipcommon *cc;
938 int err;
939
940 /* On buses where more than one core may be working
941 * at a time, we must not powerdown stuff if there are
942 * still cores that may want to run. */
943 if (bus->bustype == SSB_BUSTYPE_SSB)
944 return 0;
945
946 cc = &bus->chipco;
947 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
948 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
949 if (err)
950 goto error;
951
952 return 0;
953 error:
954 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
955 return err;
956 }
957 EXPORT_SYMBOL(ssb_bus_may_powerdown);
958
959 int ssb_bus_powerup(struct ssb_bus *bus, int dynamic_pctl)
960 {
961 struct ssb_chipcommon *cc;
962 int err;
963 enum ssb_clkmode mode;
964
965 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
966 if (err)
967 goto error;
968 cc = &bus->chipco;
969 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
970 ssb_chipco_set_clockmode(cc, mode);
971
972 return 0;
973 error:
974 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
975 return err;
976 }
977 EXPORT_SYMBOL(ssb_bus_powerup);
978
979 u32 ssb_admatch_base(u32 adm)
980 {
981 u32 base = 0;
982
983 switch (adm & SSB_ADM_TYPE) {
984 case SSB_ADM_TYPE0:
985 base = (adm & SSB_ADM_BASE0);
986 break;
987 case SSB_ADM_TYPE1:
988 assert(!(adm & SSB_ADM_NEG)); /* unsupported */
989 base = (adm & SSB_ADM_BASE1);
990 break;
991 case SSB_ADM_TYPE2:
992 assert(!(adm & SSB_ADM_NEG)); /* unsupported */
993 base = (adm & SSB_ADM_BASE2);
994 break;
995 default:
996 assert(0);
997 }
998
999 return base;
1000 }
1001 EXPORT_SYMBOL(ssb_admatch_base);
1002
1003 u32 ssb_admatch_size(u32 adm)
1004 {
1005 u32 size = 0;
1006
1007 switch (adm & SSB_ADM_TYPE) {
1008 case SSB_ADM_TYPE0:
1009 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1010 break;
1011 case SSB_ADM_TYPE1:
1012 assert(!(adm & SSB_ADM_NEG)); /* unsupported */
1013 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1014 break;
1015 case SSB_ADM_TYPE2:
1016 assert(!(adm & SSB_ADM_NEG)); /* unsupported */
1017 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1018 break;
1019 default:
1020 assert(0);
1021 }
1022 size = (1 << (size + 1));
1023
1024 return size;
1025 }
1026 EXPORT_SYMBOL(ssb_admatch_size);
1027
1028 static int __init ssb_modinit(void)
1029 {
1030 int err;
1031
1032 ssb_bustype.name = "ssb";
1033 err = bus_register(&ssb_bustype);
1034 if (err)
1035 return err;
1036
1037 /* Maybe we already registered some buses at early boot.
1038 * Check for this and attach them
1039 */
1040 ssb_buses_lock();
1041 err = ssb_attach_queued_buses();
1042 ssb_buses_unlock();
1043 if (err)
1044 bus_unregister(&ssb_bustype);
1045
1046 return err;
1047 }
1048 subsys_initcall(ssb_modinit);
1049
1050 static void __exit ssb_modexit(void)
1051 {
1052 bus_unregister(&ssb_bustype);
1053 }
1054 module_exit(ssb_modexit)