1ed3cbc1e5993dac3d97ce7b4d450d422dfb844c
[openwrt/openwrt.git] / target / linux / brcm47xx-2.6 / files / include / linux / ssb / ssb.h
1 #ifndef LINUX_SSB_H_
2 #define LINUX_SSB_H_
3 #ifdef __KERNEL__
4
5 #include <linux/device.h>
6 #include <linux/list.h>
7 #include <linux/types.h>
8 #include <linux/spinlock.h>
9 #ifdef CONFIG_SSB_PCIHOST
10 # include <linux/pci.h>
11 #endif
12
13 #include <linux/ssb/ssb_regs.h>
14
15
16 struct pcmcia_device;
17 struct ssb_bus;
18 struct ssb_driver;
19
20
21 struct ssb_sprom_r1 {
22 u16 pci_spid; /* Subsystem Product ID for PCI */
23 u16 pci_svid; /* Subsystem Vendor ID for PCI */
24 u16 pci_pid; /* Product ID for PCI */
25 u8 il0mac[6]; /* MAC address for 802.11b/g */
26 u8 et0mac[6]; /* MAC address for Ethernet */
27 u8 et1mac[6]; /* MAC address for 802.11a */
28 u8 et0phyaddr:5; /* MII address for enet0 */
29 u8 et1phyaddr:5; /* MII address for enet1 */
30 u8 et0mdcport:1; /* MDIO for enet0 */
31 u8 et1mdcport:1; /* MDIO for enet1 */
32 u8 board_rev; /* Board revision */
33 u8 country_code:4; /* Country Code */
34 u8 antenna_a:2; /* Antenna 0/1 available for A-PHY */
35 u8 antenna_bg:2; /* Antenna 0/1 available for B-PHY and G-PHY */
36 u16 pa0b0;
37 u16 pa0b1;
38 u16 pa0b2;
39 u16 pa1b0;
40 u16 pa1b1;
41 u16 pa1b2;
42 u8 gpio0; /* GPIO pin 0 */
43 u8 gpio1; /* GPIO pin 1 */
44 u8 gpio2; /* GPIO pin 2 */
45 u8 gpio3; /* GPIO pin 3 */
46 u16 maxpwr_a; /* A-PHY Power Amplifier Max Power (in dBm Q5.2) */
47 u16 maxpwr_bg; /* B/G-PHY Power Amplifier Max Power (in dBm Q5.2) */
48 u8 itssi_a; /* Idle TSSI Target for A-PHY */
49 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
50 u16 boardflags_lo; /* Boardflags (low 16 bits) */
51 u8 antenna_gain_a; /* A-PHY Antenna gain (in dBm Q5.2) */
52 u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */
53 u8 oem[8]; /* OEM string (rev 1 only) */
54 };
55
56 struct ssb_sprom_r2 {
57 u16 boardflags_hi; /* Boardflags (high 16 bits) */
58 u8 maxpwr_a_lo; /* A-PHY Max Power Low */
59 u8 maxpwr_a_hi; /* A-PHY Max Power High */
60 u16 pa1lob0; /* A-PHY PA Low Settings */
61 u16 pa1lob1; /* A-PHY PA Low Settings */
62 u16 pa1lob2; /* A-PHY PA Low Settings */
63 u16 pa1hib0; /* A-PHY PA High Settings */
64 u16 pa1hib1; /* A-PHY PA High Settings */
65 u16 pa1hib2; /* A-PHY PA High Settings */
66 u8 ofdm_pwr_off; /* OFDM Power Offset from CCK Level */
67 u8 country_str[2]; /* Two char Country Code */
68 };
69
70 struct ssb_sprom_r3 {
71 u32 ofdmapo; /* A-PHY OFDM Mid Power Offset */
72 u32 ofdmalpo; /* A-PHY OFDM Low Power Offset */
73 u32 ofdmahpo; /* A-PHY OFDM High Power Offset */
74 u8 gpioldc_on_cnt; /* GPIO LED Powersave Duty Cycle ON count */
75 u8 gpioldc_off_cnt; /* GPIO LED Powersave Duty Cycle OFF count */
76 u8 cckpo_1M:4; /* CCK Power Offset for Rate 1M */
77 u8 cckpo_2M:4; /* CCK Power Offset for Rate 2M */
78 u8 cckpo_55M:4; /* CCK Power Offset for Rate 5.5M */
79 u8 cckpo_11M:4; /* CCK Power Offset for Rate 11M */
80 u32 ofdmgpo; /* G-PHY OFDM Power Offset */
81 };
82
83 struct ssb_sprom_r4 {
84 /* TODO */
85 };
86
87 struct ssb_sprom {
88 u8 revision;
89 u8 crc;
90 /* The valid r# fields are selected by the "revision".
91 * Revision 3 and lower inherit from lower revisions.
92 */
93 union {
94 struct {
95 struct ssb_sprom_r1 r1;
96 struct ssb_sprom_r2 r2;
97 struct ssb_sprom_r3 r3;
98 };
99 struct ssb_sprom_r4 r4;
100 };
101 };
102
103
104 struct ssb_device;
105 /* Lowlevel read/write operations on the device MMIO.
106 * Internal, don't use that outside of ssb. */
107 struct ssb_bus_ops {
108 u16 (*read16)(struct ssb_device *dev, u16 offset);
109 u32 (*read32)(struct ssb_device *dev, u16 offset);
110 void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
111 void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
112 };
113
114
115 /* Core-ID values. */
116 #define SSB_DEV_CHIPCOMMON 0x800
117 #define SSB_DEV_ILINE20 0x801
118 #define SSB_DEV_SDRAM 0x803
119 #define SSB_DEV_PCI 0x804
120 #define SSB_DEV_MIPS 0x805
121 #define SSB_DEV_ETHERNET 0x806
122 #define SSB_DEV_V90 0x807
123 #define SSB_DEV_USB11_HOSTDEV 0x808
124 #define SSB_DEV_ADSL 0x809
125 #define SSB_DEV_ILINE100 0x80A
126 #define SSB_DEV_IPSEC 0x80B
127 #define SSB_DEV_PCMCIA 0x80D
128 #define SSB_DEV_INTERNAL_MEM 0x80E
129 #define SSB_DEV_MEMC_SDRAM 0x80F
130 #define SSB_DEV_EXTIF 0x811
131 #define SSB_DEV_80211 0x812
132 #define SSB_DEV_MIPS_3302 0x816
133 #define SSB_DEV_USB11_HOST 0x817
134 #define SSB_DEV_USB11_DEV 0x818
135 #define SSB_DEV_USB20_HOST 0x819
136 #define SSB_DEV_USB20_DEV 0x81A
137 #define SSB_DEV_SDIO_HOST 0x81B
138 #define SSB_DEV_ROBOSWITCH 0x81C
139 #define SSB_DEV_PARA_ATA 0x81D
140 #define SSB_DEV_SATA_XORDMA 0x81E
141 #define SSB_DEV_ETHERNET_GBIT 0x81F
142 #define SSB_DEV_PCIE 0x820
143 #define SSB_DEV_MIMO_PHY 0x821
144 #define SSB_DEV_SRAM_CTRLR 0x822
145 #define SSB_DEV_MINI_MACPHY 0x823
146 #define SSB_DEV_ARM_1176 0x824
147 #define SSB_DEV_ARM_7TDMI 0x825
148
149 /* Vendor-ID values */
150 #define SSB_VENDOR_BROADCOM 0x4243
151
152 struct ssb_device_id {
153 u16 vendor;
154 u16 coreid;
155 u8 revision;
156 };
157 #define SSB_DEVICE(_vendor, _coreid, _revision) \
158 { .vendor = _vendor, .coreid = _coreid, .revision = _revision, }
159 #define SSB_DEVTABLE_END \
160 { 0, },
161
162 #define SSB_ANY_VENDOR 0xFFFF
163 #define SSB_ANY_ID 0xFFFF
164 #define SSB_ANY_REV 0xFF
165
166 /* Some kernel subsystems poke with dev->drvdata, so we must use the
167 * following ugly workaround to get from struct device to struct ssb_device */
168 struct __ssb_dev_wrapper {
169 struct device dev;
170 struct ssb_device *sdev;
171 };
172
173 struct ssb_device {
174 /* Having a copy of the ops pointer in each dev struct
175 * is an optimization. */
176 const struct ssb_bus_ops *ops;
177
178 struct device *dev;
179 struct ssb_bus *bus;
180 struct ssb_device_id id;
181
182 u8 core_index;
183 unsigned int irq;
184
185 /* Internal-only stuff follows. */
186 void *drvdata; /* Per-device data */
187 void *devtypedata; /* Per-devicetype (eg 802.11) data */
188 };
189
190 /* Go from struct device to struct ssb_device. */
191 static inline
192 struct ssb_device * dev_to_ssb_dev(struct device *dev)
193 {
194 struct __ssb_dev_wrapper *wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
195 return wrap->sdev;
196 }
197
198 /* Device specific user data */
199 static inline
200 void ssb_set_drvdata(struct ssb_device *dev, void *data)
201 {
202 dev->drvdata = data;
203 }
204 static inline
205 void * ssb_get_drvdata(struct ssb_device *dev)
206 {
207 return dev->drvdata;
208 }
209
210 /* Devicetype specific user data. This is per device-type (not per device) */
211 void ssb_set_devtypedata(struct ssb_device *dev, void *data);
212 static inline
213 void * ssb_get_devtypedata(struct ssb_device *dev)
214 {
215 return dev->devtypedata;
216 }
217
218
219 struct ssb_driver {
220 const char *name;
221 const struct ssb_device_id *id_table;
222
223 int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
224 void (*remove)(struct ssb_device *dev);
225 int (*suspend)(struct ssb_device *dev, pm_message_t state);
226 int (*resume)(struct ssb_device *dev);
227 void (*shutdown)(struct ssb_device *dev);
228
229 struct device_driver drv;
230 };
231 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
232
233 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
234 static inline int ssb_driver_register(struct ssb_driver *drv)
235 {
236 return __ssb_driver_register(drv, THIS_MODULE);
237 }
238 extern void ssb_driver_unregister(struct ssb_driver *drv);
239
240
241
242
243 enum ssb_bustype {
244 SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
245 SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
246 SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
247 };
248
249 /* board_vendor */
250 #define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
251 #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
252 #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
253 /* board_type */
254 #define SSB_BOARD_BCM94306MP 0x0418
255 #define SSB_BOARD_BCM4309G 0x0421
256 #define SSB_BOARD_BCM4306CB 0x0417
257 #define SSB_BOARD_BCM4309MP 0x040C
258 #define SSB_BOARD_MP4318 0x044A
259 #define SSB_BOARD_BU4306 0x0416
260 #define SSB_BOARD_BU4309 0x040A
261 /* chip_package */
262 #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
263 #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
264 #define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
265
266 #include <linux/ssb/ssb_driver_chipcommon.h>
267 #include <linux/ssb/ssb_driver_mips.h>
268 #include <linux/ssb/ssb_driver_extif.h>
269 #include <linux/ssb/ssb_driver_pci.h>
270
271 struct ssb_bus {
272 /* The MMIO area. */
273 void __iomem *mmio;
274
275 const struct ssb_bus_ops *ops;
276
277 /* The core in the basic address register window. (PCI bus only) */
278 struct ssb_device *mapped_device;
279 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
280 u8 mapped_pcmcia_seg;
281 /* Lock for core and segment switching. */
282 spinlock_t bar_lock;
283
284 /* The bus this backplane is running on. */
285 enum ssb_bustype bustype;
286 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
287 struct pci_dev *host_pci;
288 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
289 struct pcmcia_device *host_pcmcia;
290
291 #ifdef CONFIG_SSB_PCIHOST
292 struct mutex pci_sprom_mutex;
293 #endif
294
295 /* ID information about the PCB. */
296 u16 board_vendor;
297 u16 board_type;
298 u16 board_rev;
299 /* ID information about the Chip. */
300 u16 chip_id;
301 u16 chip_rev;
302 u8 chip_package;
303
304 /* Contents of the SPROM.
305 * If there is no sprom (not on PCI-bus), this is emulated. */
306 struct ssb_sprom sprom;
307
308 /* List of devices (cores) on the backplane. */
309 struct ssb_device devices[SSB_MAX_NR_CORES];
310 u8 nr_devices;
311
312 /* Reference count. Number of suspended devices. */
313 u8 suspend_cnt;
314
315 /* Software ID number for this bus. */
316 int busnumber;
317
318 /* The ChipCommon device (if available). */
319 struct ssb_chipcommon chipco;
320 /* The PCI-core device (if available). */
321 struct ssb_pcicore pcicore;
322 /* The MIPS-core device (if available). */
323 struct ssb_mipscore mipscore;
324 /* The EXTif-core device (if available). */
325 struct ssb_extif extif;
326
327 /* Internal. */
328 struct list_head list;
329 };
330
331 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
332 unsigned long baseaddr,
333 void (*fill_sprom)(struct ssb_sprom *sprom));
334 #ifdef CONFIG_SSB_PCIHOST
335 extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
336 struct pci_dev *host_pci);
337 #endif /* CONFIG_SSB_PCIHOST */
338 #ifdef CONFIG_SSB_PCMCIAHOST
339 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
340 struct pcmcia_device *pcmcia_dev,
341 unsigned long baseaddr,
342 void (*fill_sprom)(struct ssb_sprom *sprom));
343 #endif /* CONFIG_SSB_PCMCIAHOST */
344
345 extern void ssb_bus_unregister(struct ssb_bus *bus);
346
347 extern u32 ssb_clockspeed(struct ssb_bus *bus);
348
349 int ssb_device_is_enabled(struct ssb_device *dev);
350 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
351 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
352
353
354 /* Device MMIO register read/write functions. */
355 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
356 {
357 return dev->ops->read16(dev, offset);
358 }
359 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
360 {
361 return dev->ops->read32(dev, offset);
362 }
363 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
364 {
365 dev->ops->write16(dev, offset, value);
366 }
367 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
368 {
369 dev->ops->write32(dev, offset, value);
370 }
371
372
373 /* Translation (routing) bits that need to be ORed to DMA
374 * addresses before they are given to a device. */
375 extern u32 ssb_dma_translation(struct ssb_device *dev);
376 #define SSB_DMA_TRANSLATION_MASK 0xC0000000
377 #define SSB_DMA_TRANSLATION_SHIFT 30
378
379 extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask);
380
381
382 #ifdef CONFIG_SSB_PCIHOST
383 /* PCI-host wrapper driver */
384 extern int ssb_pcihost_register(struct pci_driver *driver);
385 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
386 {
387 pci_unregister_driver(driver);
388 }
389 #endif /* CONFIG_SSB_PCIHOST */
390
391
392 /* Bus-Power handling functions. */
393 extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
394 extern int ssb_bus_powerup(struct ssb_bus *bus, int dynamic_pctl);
395
396
397 /* Various helper functions */
398 extern u32 ssb_admatch_base(u32 adm);
399 extern u32 ssb_admatch_size(u32 adm);
400
401
402 #endif /* __KERNEL__ */
403 #endif /* LINUX_SSB_H_ */