f13a13dc26093f37fd795ae0d706240f303b913f
[openwrt/openwrt.git] / target / linux / brcm63xx / patches-3.10 / 205-USB-fix-bcm63xx_udc.patch
1 From a864a5b3efe9dce1647172d105559a1b850cf4c9 Mon Sep 17 00:00:00 2001
2 From: Florian Fainelli <florian@openwrt.org>
3 Date: Tue, 14 Jan 2014 15:29:25 -0800
4 Subject: [PATCH] usb: gadget: bcm63xx_udc: fix build failure on DMA channel
5 code
6
7 Commit 3dc6475 ("bcm63xx_enet: add support Broadcom BCM6345 Ethernet")
8 changed the ENETDMA[CS] macros such that they are no longer macros, but
9 actual register offset definitions. The bcm63xx_udc driver was not
10 updated, and as a result, causes the following build error to pop up:
11
12 CC drivers/usb/gadget/u_ether.o
13 drivers/usb/gadget/bcm63xx_udc.c: In function 'iudma_write':
14 drivers/usb/gadget/bcm63xx_udc.c:642:24: error: called object '0' is not
15 a function
16 drivers/usb/gadget/bcm63xx_udc.c: In function 'iudma_reset_channel':
17 drivers/usb/gadget/bcm63xx_udc.c:698:46: error: called object '0' is not
18 a function
19 drivers/usb/gadget/bcm63xx_udc.c:700:49: error: called object '0' is not
20 a function
21
22 Fix this by updating usb_dmac_{read,write}l and usb_dmas_{read,write}l to
23 take an extra channel argument, and use the channel width
24 (ENETDMA_CHAN_WIDTH) to offset the register we want to access, hence
25 doing again what the macro implicitely did for us.
26
27 CC: Kevin Cernekee <cernekee@gmail.com>
28 CC: Jonas Gorski <jogo@openwrt.org>
29 CC: stable@vger.kernel.org
30 Signed-off-by: Florian Fainelli <florian@openwrt.org>
31 ---
32 Felipe,
33
34 This is against your branch as balbi/usb.git, and this fix should be applied to
35 stable 3.11 onwards.
36
37 Thanks!
38
39 drivers/usb/gadget/bcm63xx_udc.c | 58 ++++++++++++++++++++++------------------
40 1 file changed, 32 insertions(+), 26 deletions(-)
41
42 --- a/drivers/usb/gadget/bcm63xx_udc.c
43 +++ b/drivers/usb/gadget/bcm63xx_udc.c
44 @@ -362,24 +362,30 @@ static inline void usb_dma_writel(struct
45 bcm_writel(val, udc->iudma_regs + off);
46 }
47
48 -static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off)
49 +static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off, int chan)
50 {
51 - return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off);
52 + return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off +
53 + (ENETDMA_CHAN_WIDTH * chan));
54 }
55
56 -static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off)
57 +static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off,
58 + int chan)
59 {
60 - bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off);
61 + bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off +
62 + (ENETDMA_CHAN_WIDTH * chan));
63 }
64
65 -static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off)
66 +static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off, int chan)
67 {
68 - return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off);
69 + return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off +
70 + (ENETDMA_CHAN_WIDTH * chan));
71 }
72
73 -static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off)
74 +static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off,
75 + int chan)
76 {
77 - bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off);
78 + bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off +
79 + (ENETDMA_CHAN_WIDTH * chan));
80 }
81
82 static inline void set_clocks(struct bcm63xx_udc *udc, bool is_enabled)
83 @@ -639,7 +645,7 @@ static void iudma_write(struct bcm63xx_u
84 } while (!last_bd);
85
86 usb_dmac_writel(udc, ENETDMAC_CHANCFG_EN_MASK,
87 - ENETDMAC_CHANCFG_REG(iudma->ch_idx));
88 + ENETDMAC_CHANCFG_REG, iudma->ch_idx);
89 }
90
91 /**
92 @@ -695,9 +701,9 @@ static void iudma_reset_channel(struct b
93 bcm63xx_fifo_reset_ep(udc, max(0, iudma->ep_num));
94
95 /* stop DMA, then wait for the hardware to wrap up */
96 - usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG(ch_idx));
97 + usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG, ch_idx);
98
99 - while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)) &
100 + while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx) &
101 ENETDMAC_CHANCFG_EN_MASK) {
102 udelay(1);
103
104 @@ -714,10 +720,10 @@ static void iudma_reset_channel(struct b
105 dev_warn(udc->dev, "forcibly halting IUDMA channel %d\n",
106 ch_idx);
107 usb_dmac_writel(udc, ENETDMAC_CHANCFG_BUFHALT_MASK,
108 - ENETDMAC_CHANCFG_REG(ch_idx));
109 + ENETDMAC_CHANCFG_REG, ch_idx);
110 }
111 }
112 - usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG(ch_idx));
113 + usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG, ch_idx);
114
115 /* don't leave "live" HW-owned entries for the next guy to step on */
116 for (d = iudma->bd_ring; d <= iudma->end_bd; d++)
117 @@ -729,11 +735,11 @@ static void iudma_reset_channel(struct b
118
119 /* set up IRQs, UBUS burst size, and BD base for this channel */
120 usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK,
121 - ENETDMAC_IRMASK_REG(ch_idx));
122 - usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG(ch_idx));
123 + ENETDMAC_IRMASK_REG, ch_idx);
124 + usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG, ch_idx);
125
126 - usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG(ch_idx));
127 - usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG(ch_idx));
128 + usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG, ch_idx);
129 + usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG, ch_idx);
130 }
131
132 /**
133 @@ -2016,7 +2022,7 @@ static irqreturn_t bcm63xx_udc_data_isr(
134 spin_lock(&udc->lock);
135
136 usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK,
137 - ENETDMAC_IR_REG(iudma->ch_idx));
138 + ENETDMAC_IR_REG, iudma->ch_idx);
139 bep = iudma->bep;
140 rc = iudma_read(udc, iudma);
141
142 @@ -2156,18 +2162,18 @@ static int bcm63xx_iudma_dbg_show(struct
143 seq_printf(s, " [ep%d]:\n",
144 max_t(int, iudma_defaults[ch_idx].ep_num, 0));
145 seq_printf(s, " cfg: %08x; irqstat: %08x; irqmask: %08x; maxburst: %08x\n",
146 - usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)),
147 - usb_dmac_readl(udc, ENETDMAC_IR_REG(ch_idx)),
148 - usb_dmac_readl(udc, ENETDMAC_IRMASK_REG(ch_idx)),
149 - usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG(ch_idx)));
150 + usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx),
151 + usb_dmac_readl(udc, ENETDMAC_IR_REG, ch_idx),
152 + usb_dmac_readl(udc, ENETDMAC_IRMASK_REG, ch_idx),
153 + usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG, ch_idx));
154
155 - sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG(ch_idx));
156 - sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG(ch_idx));
157 + sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG, ch_idx);
158 + sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG, ch_idx);
159 seq_printf(s, " base: %08x; index: %04x_%04x; desc: %04x_%04x %08x\n",
160 - usb_dmas_readl(udc, ENETDMAS_RSTART_REG(ch_idx)),
161 + usb_dmas_readl(udc, ENETDMAS_RSTART_REG, ch_idx),
162 sram2 >> 16, sram2 & 0xffff,
163 sram3 >> 16, sram3 & 0xffff,
164 - usb_dmas_readl(udc, ENETDMAS_SRAM4_REG(ch_idx)));
165 + usb_dmas_readl(udc, ENETDMAS_SRAM4_REG, ch_idx));
166 seq_printf(s, " desc: %d/%d used", iudma->n_bds_used,
167 iudma->n_bds);
168