target/linux/brcm63xx/patches-3.6/041-BCM63XX-Add-register-definitions-for-USBD-depen.patch

   1 From 21bb8141c205ae48d331787debb6b272add90ac7 Mon Sep 17 00:00:00 2001
   2 From: Kevin Cernekee <cernekee@gmail.com>
   3 Date: Sat, 23 Jun 2012 04:14:54 +0000
   4 Subject: [PATCH 05/81] MIPS: BCM63XX: Add register definitions for USBD
   5  dependencies
   6
   7 The USB 2.0 device depends on some functionality in other blocks, such
   8 as GPIO and USBH.  Add those register definitions here.
   9
  10 Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
  11 ---
  12  arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  |    6 +++---
  13  arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    8 ++++++++
  14  2 files changed, 11 insertions(+), 3 deletions(-)
  15
  16 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
  17 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
  18 @@ -184,9 +184,9 @@ enum bcm63xx_regs_set {
  19  #define BCM_6328_SPI_BASE              (0xdeadbeef)
  20  #define BCM_6328_UDC0_BASE             (0xdeadbeef)
  21  #define BCM_6328_USBDMA_BASE           (0xdeadbeef)
  22 -#define BCM_6328_OHCI0_BASE            (0xdeadbeef)
  23 +#define BCM_6328_OHCI0_BASE            (0xb0002600)
  24  #define BCM_6328_OHCI_PRIV_BASE                (0xdeadbeef)
  25 -#define BCM_6328_USBH_PRIV_BASE                (0xdeadbeef)
  26 +#define BCM_6328_USBH_PRIV_BASE                (0xb0002700)
  27  #define BCM_6328_MPI_BASE              (0xdeadbeef)
  28  #define BCM_6328_PCMCIA_BASE           (0xdeadbeef)
  29  #define BCM_6328_PCIE_BASE             (0xb0e40000)
  30 @@ -199,7 +199,7 @@ enum bcm63xx_regs_set {
  31  #define BCM_6328_ENETDMAC_BASE         (0xb000da00)
  32  #define BCM_6328_ENETDMAS_BASE         (0xb000dc00)
  33  #define BCM_6328_ENETSW_BASE           (0xb0e00000)
  34 -#define BCM_6328_EHCI0_BASE            (0x10002500)
  35 +#define BCM_6328_EHCI0_BASE            (0xb0002500)
  36  #define BCM_6328_SDRAM_BASE            (0xdeadbeef)
  37  #define BCM_6328_MEMC_BASE             (0xdeadbeef)
  38  #define BCM_6328_DDR_BASE              (0xb0003000)
  39 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  40 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  41 @@ -543,6 +543,12 @@
  42  #define GPIO_MODE_6368_SPI_SSN5                (1 << 31)
  43
  44
  45 +#define GPIO_PINMUX_OTHR_REG           0x24
  46 +#define GPIO_PINMUX_OTHR_6328_USB_SHIFT        12
  47 +#define GPIO_PINMUX_OTHR_6328_USB_MASK (3 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
  48 +#define GPIO_PINMUX_OTHR_6328_USB_HOST (1 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
  49 +#define GPIO_PINMUX_OTHR_6328_USB_DEV  (2 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
  50 +
  51  #define GPIO_BASEMODE_6368_REG         0x38
  52  #define GPIO_BASEMODE_6368_UART2       0x1
  53  #define GPIO_BASEMODE_6368_GPIO                0x0
  54 @@ -770,6 +776,8 @@
  55  #define USBH_PRIV_SWAP_6358_REG                0x0
  56  #define USBH_PRIV_SWAP_6368_REG                0x1c
  57
  58 +#define USBH_PRIV_SWAP_USBD_SHIFT      6
  59 +#define USBH_PRIV_SWAP_USBD_MASK       (1 << USBH_PRIV_SWAP_USBD_SHIFT)
  60  #define USBH_PRIV_SWAP_EHCI_ENDN_SHIFT 4
  61  #define USBH_PRIV_SWAP_EHCI_ENDN_MASK  (1 << USBH_PRIV_SWAP_EHCI_ENDN_SHIFT)
  62  #define USBH_PRIV_SWAP_EHCI_DATA_SHIFT 3