target/linux/brcm63xx/patches-4.19/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch

   1 From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jogo@openwrt.org>
   3 Date: Sun, 8 Dec 2013 03:22:40 +0100
   4 Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
   5
   6 ---
   7  arch/mips/bcm63xx/reset.c                       | 3 ++-
   8  arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
   9  arch/mips/pci/pci-bcm63xx.c                     | 4 ++++
  10  3 files changed, 11 insertions(+), 1 deletion(-)
  11
  12 --- a/arch/mips/bcm63xx/reset.c
  13 +++ b/arch/mips/bcm63xx/reset.c
  14 @@ -137,7 +137,8 @@
  15  #define BCM63268_RESET_PCM     SOFTRESET_63268_PCM_MASK
  16  #define BCM63268_RESET_MPI     0
  17  #define BCM63268_RESET_PCIE    (SOFTRESET_63268_PCIE_MASK | \
  18 -                                SOFTRESET_63268_PCIE_CORE_MASK)
  19 +                                SOFTRESET_63268_PCIE_CORE_MASK | \
  20 +                                SOFTRESET_63268_PCIE_HARD_MASK)
  21  #define BCM63268_RESET_PCIE_EXT        SOFTRESET_63268_PCIE_EXT_MASK
  22
  23  /*
  24 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
  25 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
  26 @@ -46,6 +46,11 @@
  27  #define BCM_PCIE_MEM_END_PA_6328       (BCM_PCIE_MEM_BASE_PA_6328 +    \
  28                                         BCM_PCIE_MEM_SIZE_6328 - 1)
  29
  30 +#define BCM_PCIE_MEM_BASE_PA_63268     0x11000000
  31 +#define BCM_PCIE_MEM_SIZE_63268                (15 * 1024 * 1024)
  32 +#define BCM_PCIE_MEM_END_PA_63268      (BCM_PCIE_MEM_BASE_PA_63268 +   \
  33 +                                       BCM_PCIE_MEM_SIZE_63268 - 1)
  34 +
  35  /*
  36   * Internal registers are accessed through KSEG3
  37   */
  38 --- a/arch/mips/pci/pci-bcm63xx.c
  39 +++ b/arch/mips/pci/pci-bcm63xx.c
  40 @@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
  41         if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
  42                 bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
  43                 bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
  44 +       } else if (BCMCPU_IS_63268()) {
  45 +               bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
  46 +               bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
  47         }
  48
  49         switch (bcm63xx_get_cpu_id()) {
  50         case BCM6328_CPU_ID:
  51         case BCM6362_CPU_ID:
  52 +       case BCM63268_CPU_ID:
  53                 return bcm63xx_register_pcie();
  54         case BCM3368_CPU_ID:
  55         case BCM6348_CPU_ID: