target/linux/brcm63xx/patches-4.4/138-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch

   1 From eea6b96701d734095e2f823f3a82d9b063f553ae Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jonas.gorski@gmail.com>
   3 Date: Fri, 24 Jun 2016 22:17:20 +0200
   4 Subject: [PATCH 09/16] pinctrl: add a pincontrol driver for BCM6362
   5
   6 Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual
   7 GPIO pins to the LED controller, to be available by the integrated
   8 wifi, or other functions. It also supports overlay groups, of which
   9 only NAND is documented.
  10
  11 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  12 ---
  13  drivers/pinctrl/bcm63xx/Kconfig           |   7 +
  14  drivers/pinctrl/bcm63xx/Makefile          |   1 +
  15  drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c | 692 ++++++++++++++++++++++++++++++
  16  3 files changed, 700 insertions(+)
  17  create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
  18
  19 --- a/drivers/pinctrl/bcm63xx/Kconfig
  20 +++ b/drivers/pinctrl/bcm63xx/Kconfig
  21 @@ -23,3 +23,10 @@ config PINCTRL_BCM6358
  22         select PINCTRL_BCM63XX
  23         select GENERIC_PINCONF
  24         select MFD_SYSCON
  25 +
  26 +config PINCTRL_BCM6362
  27 +       bool "BCM6362 pincontrol driver" if COMPILE_TEST
  28 +       select PINMUX
  29 +       select PINCONF
  30 +       select PINCTRL_BCM63XX
  31 +       select GENERIC_PINCONF
  32 --- a/drivers/pinctrl/bcm63xx/Makefile
  33 +++ b/drivers/pinctrl/bcm63xx/Makefile
  34 @@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_BCM63XX)   += pinctrl
  35  obj-$(CONFIG_PINCTRL_BCM6328)  += pinctrl-bcm6328.o
  36  obj-$(CONFIG_PINCTRL_BCM6348)  += pinctrl-bcm6348.o
  37  obj-$(CONFIG_PINCTRL_BCM6358)  += pinctrl-bcm6358.o
  38 +obj-$(CONFIG_PINCTRL_BCM6362)  += pinctrl-bcm6362.o
  39 --- /dev/null
  40 +++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
  41 @@ -0,0 +1,692 @@
  42 +/*
  43 + * This file is subject to the terms and conditions of the GNU General Public
  44 + * License.  See the file "COPYING" in the main directory of this archive
  45 + * for more details.
  46 + *
  47 + * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
  48 + */
  49 +
  50 +#include <linux/kernel.h>
  51 +#include <linux/spinlock.h>
  52 +#include <linux/bitops.h>
  53 +#include <linux/gpio.h>
  54 +#include <linux/of.h>
  55 +#include <linux/of_gpio.h>
  56 +#include <linux/slab.h>
  57 +#include <linux/platform_device.h>
  58 +
  59 +#include <linux/pinctrl/pinconf.h>
  60 +#include <linux/pinctrl/pinconf-generic.h>
  61 +#include <linux/pinctrl/pinmux.h>
  62 +#include <linux/pinctrl/machine.h>
  63 +
  64 +#include "../core.h"
  65 +#include "../pinctrl-utils.h"
  66 +
  67 +#include "pinctrl-bcm63xx.h"
  68 +
  69 +#define BCM6362_NGPIO  48
  70 +
  71 +/* GPIO_BASEMODE register */
  72 +#define BASEMODE_NAND  BIT(2)
  73 +
  74 +enum bcm6362_pinctrl_reg {
  75 +       BCM6362_LEDCTRL,
  76 +       BCM6362_MODE,
  77 +       BCM6362_CTRL,
  78 +       BCM6362_BASEMODE,
  79 +};
  80 +
  81 +struct bcm6362_pingroup {
  82 +       const char *name;
  83 +       const unsigned * const pins;
  84 +       const unsigned num_pins;
  85 +};
  86 +
  87 +struct bcm6362_function {
  88 +       const char *name;
  89 +       const char * const *groups;
  90 +       const unsigned num_groups;
  91 +
  92 +       enum bcm6362_pinctrl_reg reg;
  93 +       u32 basemode_mask;
  94 +};
  95 +
  96 +struct bcm6362_pinctrl {
  97 +       struct pinctrl_dev *pctldev;
  98 +       struct pinctrl_desc desc;
  99 +
 100 +       void __iomem *led;
 101 +       void __iomem *mode;
 102 +       void __iomem *ctrl;
 103 +       void __iomem *basemode;
 104 +
 105 +       /* register access lock */
 106 +       spinlock_t lock;
 107 +
 108 +       struct gpio_chip gpio[2];
 109 +};
 110 +
 111 +#define BCM6362_PIN(a, b, mask)                        \
 112 +       {                                       \
 113 +               .number = a,                    \
 114 +               .name = b,                      \
 115 +               .drv_data = (void *)(mask),     \
 116 +       }
 117 +
 118 +static const struct pinctrl_pin_desc bcm6362_pins[] = {
 119 +       PINCTRL_PIN(0, "gpio0"),
 120 +       PINCTRL_PIN(1, "gpio1"),
 121 +       PINCTRL_PIN(2, "gpio2"),
 122 +       PINCTRL_PIN(3, "gpio3"),
 123 +       PINCTRL_PIN(4, "gpio4"),
 124 +       PINCTRL_PIN(5, "gpio5"),
 125 +       PINCTRL_PIN(6, "gpio6"),
 126 +       PINCTRL_PIN(7, "gpio7"),
 127 +       BCM6362_PIN(8, "gpio8", BASEMODE_NAND),
 128 +       PINCTRL_PIN(9, "gpio9"),
 129 +       PINCTRL_PIN(10, "gpio10"),
 130 +       PINCTRL_PIN(11, "gpio11"),
 131 +       BCM6362_PIN(12, "gpio12", BASEMODE_NAND),
 132 +       BCM6362_PIN(13, "gpio13", BASEMODE_NAND),
 133 +       BCM6362_PIN(14, "gpio14", BASEMODE_NAND),
 134 +       BCM6362_PIN(15, "gpio15", BASEMODE_NAND),
 135 +       BCM6362_PIN(16, "gpio16", BASEMODE_NAND),
 136 +       BCM6362_PIN(17, "gpio17", BASEMODE_NAND),
 137 +       BCM6362_PIN(18, "gpio18", BASEMODE_NAND),
 138 +       BCM6362_PIN(19, "gpio19", BASEMODE_NAND),
 139 +       BCM6362_PIN(20, "gpio20", BASEMODE_NAND),
 140 +       BCM6362_PIN(21, "gpio21", BASEMODE_NAND),
 141 +       BCM6362_PIN(22, "gpio22", BASEMODE_NAND),
 142 +       BCM6362_PIN(23, "gpio23", BASEMODE_NAND),
 143 +       PINCTRL_PIN(24, "gpio24"),
 144 +       PINCTRL_PIN(25, "gpio25"),
 145 +       PINCTRL_PIN(26, "gpio26"),
 146 +       BCM6362_PIN(27, "gpio27", BASEMODE_NAND),
 147 +       PINCTRL_PIN(28, "gpio28"),
 148 +       PINCTRL_PIN(29, "gpio29"),
 149 +       PINCTRL_PIN(30, "gpio30"),
 150 +       PINCTRL_PIN(31, "gpio31"),
 151 +       PINCTRL_PIN(32, "gpio32"),
 152 +       PINCTRL_PIN(33, "gpio33"),
 153 +       PINCTRL_PIN(34, "gpio34"),
 154 +       PINCTRL_PIN(35, "gpio35"),
 155 +       PINCTRL_PIN(36, "gpio36"),
 156 +       PINCTRL_PIN(37, "gpio37"),
 157 +       PINCTRL_PIN(38, "gpio38"),
 158 +       PINCTRL_PIN(39, "gpio39"),
 159 +       PINCTRL_PIN(40, "gpio40"),
 160 +       PINCTRL_PIN(41, "gpio41"),
 161 +       PINCTRL_PIN(42, "gpio42"),
 162 +       PINCTRL_PIN(43, "gpio43"),
 163 +       PINCTRL_PIN(44, "gpio44"),
 164 +       PINCTRL_PIN(45, "gpio45"),
 165 +       PINCTRL_PIN(46, "gpio46"),
 166 +       PINCTRL_PIN(47, "gpio47"),
 167 +};
 168 +
 169 +static unsigned gpio0_pins[] = { 0 };
 170 +static unsigned gpio1_pins[] = { 1 };
 171 +static unsigned gpio2_pins[] = { 2 };
 172 +static unsigned gpio3_pins[] = { 3 };
 173 +static unsigned gpio4_pins[] = { 4 };
 174 +static unsigned gpio5_pins[] = { 5 };
 175 +static unsigned gpio6_pins[] = { 6 };
 176 +static unsigned gpio7_pins[] = { 7 };
 177 +static unsigned gpio8_pins[] = { 8 };
 178 +static unsigned gpio9_pins[] = { 9 };
 179 +static unsigned gpio10_pins[] = { 10 };
 180 +static unsigned gpio11_pins[] = { 11 };
 181 +static unsigned gpio12_pins[] = { 12 };
 182 +static unsigned gpio13_pins[] = { 13 };
 183 +static unsigned gpio14_pins[] = { 14 };
 184 +static unsigned gpio15_pins[] = { 15 };
 185 +static unsigned gpio16_pins[] = { 16 };
 186 +static unsigned gpio17_pins[] = { 17 };
 187 +static unsigned gpio18_pins[] = { 18 };
 188 +static unsigned gpio19_pins[] = { 19 };
 189 +static unsigned gpio20_pins[] = { 20 };
 190 +static unsigned gpio21_pins[] = { 21 };
 191 +static unsigned gpio22_pins[] = { 22 };
 192 +static unsigned gpio23_pins[] = { 23 };
 193 +static unsigned gpio24_pins[] = { 24 };
 194 +static unsigned gpio25_pins[] = { 25 };
 195 +static unsigned gpio26_pins[] = { 26 };
 196 +static unsigned gpio27_pins[] = { 27 };
 197 +static unsigned gpio28_pins[] = { 28 };
 198 +static unsigned gpio29_pins[] = { 29 };
 199 +static unsigned gpio30_pins[] = { 30 };
 200 +static unsigned gpio31_pins[] = { 31 };
 201 +static unsigned gpio32_pins[] = { 32 };
 202 +static unsigned gpio33_pins[] = { 33 };
 203 +static unsigned gpio34_pins[] = { 34 };
 204 +static unsigned gpio35_pins[] = { 35 };
 205 +static unsigned gpio36_pins[] = { 36 };
 206 +static unsigned gpio37_pins[] = { 37 };
 207 +static unsigned gpio38_pins[] = { 38 };
 208 +static unsigned gpio39_pins[] = { 39 };
 209 +static unsigned gpio40_pins[] = { 40 };
 210 +static unsigned gpio41_pins[] = { 41 };
 211 +static unsigned gpio42_pins[] = { 42 };
 212 +static unsigned gpio43_pins[] = { 43 };
 213 +static unsigned gpio44_pins[] = { 44 };
 214 +static unsigned gpio45_pins[] = { 45 };
 215 +static unsigned gpio46_pins[] = { 46 };
 216 +static unsigned gpio47_pins[] = { 47 };
 217 +
 218 +static unsigned nand_grp_pins[] = {
 219 +       8, 12, 13, 14, 15, 16, 17,
 220 +       18, 19, 20, 21, 22, 23, 27,
 221 +};
 222 +
 223 +#define BCM6362_GROUP(n)                               \
 224 +       {                                               \
 225 +               .name = #n,                             \
 226 +               .pins = n##_pins,                       \
 227 +               .num_pins = ARRAY_SIZE(n##_pins),       \
 228 +       }
 229 +
 230 +static struct bcm6362_pingroup bcm6362_groups[] = {
 231 +       BCM6362_GROUP(gpio0),
 232 +       BCM6362_GROUP(gpio1),
 233 +       BCM6362_GROUP(gpio2),
 234 +       BCM6362_GROUP(gpio3),
 235 +       BCM6362_GROUP(gpio4),
 236 +       BCM6362_GROUP(gpio5),
 237 +       BCM6362_GROUP(gpio6),
 238 +       BCM6362_GROUP(gpio7),
 239 +       BCM6362_GROUP(gpio8),
 240 +       BCM6362_GROUP(gpio9),
 241 +       BCM6362_GROUP(gpio10),
 242 +       BCM6362_GROUP(gpio11),
 243 +       BCM6362_GROUP(gpio12),
 244 +       BCM6362_GROUP(gpio13),
 245 +       BCM6362_GROUP(gpio14),
 246 +       BCM6362_GROUP(gpio15),
 247 +       BCM6362_GROUP(gpio16),
 248 +       BCM6362_GROUP(gpio17),
 249 +       BCM6362_GROUP(gpio18),
 250 +       BCM6362_GROUP(gpio19),
 251 +       BCM6362_GROUP(gpio20),
 252 +       BCM6362_GROUP(gpio21),
 253 +       BCM6362_GROUP(gpio22),
 254 +       BCM6362_GROUP(gpio23),
 255 +       BCM6362_GROUP(gpio24),
 256 +       BCM6362_GROUP(gpio25),
 257 +       BCM6362_GROUP(gpio26),
 258 +       BCM6362_GROUP(gpio27),
 259 +       BCM6362_GROUP(gpio28),
 260 +       BCM6362_GROUP(gpio29),
 261 +       BCM6362_GROUP(gpio30),
 262 +       BCM6362_GROUP(gpio31),
 263 +       BCM6362_GROUP(gpio32),
 264 +       BCM6362_GROUP(gpio33),
 265 +       BCM6362_GROUP(gpio34),
 266 +       BCM6362_GROUP(gpio35),
 267 +       BCM6362_GROUP(gpio36),
 268 +       BCM6362_GROUP(gpio37),
 269 +       BCM6362_GROUP(gpio38),
 270 +       BCM6362_GROUP(gpio39),
 271 +       BCM6362_GROUP(gpio40),
 272 +       BCM6362_GROUP(gpio41),
 273 +       BCM6362_GROUP(gpio42),
 274 +       BCM6362_GROUP(gpio43),
 275 +       BCM6362_GROUP(gpio44),
 276 +       BCM6362_GROUP(gpio45),
 277 +       BCM6362_GROUP(gpio46),
 278 +       BCM6362_GROUP(gpio47),
 279 +       BCM6362_GROUP(nand_grp),
 280 +};
 281 +
 282 +static const char * const led_groups[] = {
 283 +       "gpio0",
 284 +       "gpio1",
 285 +       "gpio2",
 286 +       "gpio3",
 287 +       "gpio4",
 288 +       "gpio5",
 289 +       "gpio6",
 290 +       "gpio7",
 291 +       "gpio8",
 292 +       "gpio9",
 293 +       "gpio10",
 294 +       "gpio11",
 295 +       "gpio12",
 296 +       "gpio13",
 297 +       "gpio14",
 298 +       "gpio15",
 299 +       "gpio16",
 300 +       "gpio17",
 301 +       "gpio18",
 302 +       "gpio19",
 303 +       "gpio20",
 304 +       "gpio21",
 305 +       "gpio22",
 306 +       "gpio23",
 307 +};
 308 +
 309 +static const char * const usb_device_led_groups[] = {
 310 +       "gpio0",
 311 +};
 312 +
 313 +static const char * const sys_irq_groups[] = {
 314 +       "gpio1",
 315 +};
 316 +
 317 +static const char * const serial_led_clk_groups[] = {
 318 +       "gpio2",
 319 +};
 320 +
 321 +static const char * const serial_led_data_groups[] = {
 322 +       "gpio3",
 323 +};
 324 +
 325 +static const char * const robosw_led_data_groups[] = {
 326 +       "gpio4",
 327 +};
 328 +
 329 +static const char * const robosw_led_clk_groups[] = {
 330 +       "gpio5",
 331 +};
 332 +
 333 +static const char * const robosw_led0_groups[] = {
 334 +       "gpio6",
 335 +};
 336 +
 337 +static const char * const robosw_led1_groups[] = {
 338 +       "gpio7",
 339 +};
 340 +
 341 +static const char * const inet_led_groups[] = {
 342 +       "gpio8",
 343 +};
 344 +
 345 +static const char * const spi_cs2_groups[] = {
 346 +       "gpio9",
 347 +};
 348 +
 349 +static const char * const spi_cs3_groups[] = {
 350 +       "gpio10",
 351 +};
 352 +
 353 +static const char * const ntr_pulse_groups[] = {
 354 +       "gpio11",
 355 +};
 356 +
 357 +static const char * const uart1_scts_groups[] = {
 358 +       "gpio12",
 359 +};
 360 +
 361 +static const char * const uart1_srts_groups[] = {
 362 +       "gpio13",
 363 +};
 364 +
 365 +static const char * const uart1_sdin_groups[] = {
 366 +       "gpio14",
 367 +};
 368 +
 369 +static const char * const uart1_sdout_groups[] = {
 370 +       "gpio15",
 371 +};
 372 +
 373 +static const char * const adsl_spi_miso_groups[] = {
 374 +       "gpio16",
 375 +};
 376 +
 377 +static const char * const adsl_spi_mosi_groups[] = {
 378 +       "gpio17",
 379 +};
 380 +
 381 +static const char * const adsl_spi_clk_groups[] = {
 382 +       "gpio18",
 383 +};
 384 +
 385 +static const char * const adsl_spi_cs_groups[] = {
 386 +       "gpio19",
 387 +};
 388 +
 389 +static const char * const ephy0_led_groups[] = {
 390 +       "gpio20",
 391 +};
 392 +
 393 +static const char * const ephy1_led_groups[] = {
 394 +       "gpio21",
 395 +};
 396 +
 397 +static const char * const ephy2_led_groups[] = {
 398 +       "gpio22",
 399 +};
 400 +
 401 +static const char * const ephy3_led_groups[] = {
 402 +       "gpio23",
 403 +};
 404 +
 405 +static const char * const ext_irq0_groups[] = {
 406 +       "gpio24",
 407 +};
 408 +
 409 +static const char * const ext_irq1_groups[] = {
 410 +       "gpio25",
 411 +};
 412 +
 413 +static const char * const ext_irq2_groups[] = {
 414 +       "gpio26",
 415 +};
 416 +
 417 +static const char * const ext_irq3_groups[] = {
 418 +       "gpio27",
 419 +};
 420 +
 421 +static const char * const wifi_groups[] = {
 422 +       "gpio32",
 423 +       "gpio33",
 424 +       "gpio34",
 425 +       "gpio35",
 426 +       "gpio36",
 427 +       "gpio37",
 428 +       "gpio38",
 429 +       "gpio39",
 430 +       "gpio40",
 431 +       "gpio41",
 432 +       "gpio42",
 433 +       "gpio43",
 434 +       "gpio44",
 435 +       "gpio45",
 436 +       "gpio46",
 437 +       "gpio47",
 438 +};
 439 +
 440 +static const char * const nand_groups[] = {
 441 +       "nand_grp",
 442 +};
 443 +
 444 +#define BCM6362_LED_FUN(n)                             \
 445 +       {                                               \
 446 +               .name = #n,                             \
 447 +               .groups = n##_groups,                   \
 448 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 449 +               .reg = BCM6362_LEDCTRL,                 \
 450 +       }
 451 +
 452 +#define BCM6362_MODE_FUN(n)                            \
 453 +       {                                               \
 454 +               .name = #n,                             \
 455 +               .groups = n##_groups,                   \
 456 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 457 +               .reg = BCM6362_MODE,                    \
 458 +       }
 459 +
 460 +#define BCM6362_CTRL_FUN(n)                            \
 461 +       {                                               \
 462 +               .name = #n,                             \
 463 +               .groups = n##_groups,                   \
 464 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 465 +               .reg = BCM6362_CTRL,                    \
 466 +       }
 467 +
 468 +#define BCM6362_BASEMODE_FUN(n, mask)                  \
 469 +       {                                               \
 470 +               .name = #n,                             \
 471 +               .groups = n##_groups,                   \
 472 +               .num_groups = ARRAY_SIZE(n##_groups),   \
 473 +               .reg = BCM6362_BASEMODE,                \
 474 +               .basemode_mask = (mask),                \
 475 +       }
 476 +
 477 +static const struct bcm6362_function bcm6362_funcs[] = {
 478 +       BCM6362_LED_FUN(led),
 479 +       BCM6362_MODE_FUN(usb_device_led),
 480 +       BCM6362_MODE_FUN(sys_irq),
 481 +       BCM6362_MODE_FUN(serial_led_clk),
 482 +       BCM6362_MODE_FUN(serial_led_data),
 483 +       BCM6362_MODE_FUN(robosw_led_data),
 484 +       BCM6362_MODE_FUN(robosw_led_clk),
 485 +       BCM6362_MODE_FUN(robosw_led0),
 486 +       BCM6362_MODE_FUN(robosw_led1),
 487 +       BCM6362_MODE_FUN(inet_led),
 488 +       BCM6362_MODE_FUN(spi_cs2),
 489 +       BCM6362_MODE_FUN(spi_cs3),
 490 +       BCM6362_MODE_FUN(ntr_pulse),
 491 +       BCM6362_MODE_FUN(uart1_scts),
 492 +       BCM6362_MODE_FUN(uart1_srts),
 493 +       BCM6362_MODE_FUN(uart1_sdin),
 494 +       BCM6362_MODE_FUN(uart1_sdout),
 495 +       BCM6362_MODE_FUN(adsl_spi_miso),
 496 +       BCM6362_MODE_FUN(adsl_spi_mosi),
 497 +       BCM6362_MODE_FUN(adsl_spi_clk),
 498 +       BCM6362_MODE_FUN(adsl_spi_cs),
 499 +       BCM6362_MODE_FUN(ephy0_led),
 500 +       BCM6362_MODE_FUN(ephy1_led),
 501 +       BCM6362_MODE_FUN(ephy2_led),
 502 +       BCM6362_MODE_FUN(ephy3_led),
 503 +       BCM6362_MODE_FUN(ext_irq0),
 504 +       BCM6362_MODE_FUN(ext_irq1),
 505 +       BCM6362_MODE_FUN(ext_irq2),
 506 +       BCM6362_MODE_FUN(ext_irq3),
 507 +       BCM6362_CTRL_FUN(wifi),
 508 +       BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND),
 509 +};
 510 +
 511 +static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
 512 +{
 513 +       return ARRAY_SIZE(bcm6362_groups);
 514 +}
 515 +
 516 +static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
 517 +                                                 unsigned group)
 518 +{
 519 +       return bcm6362_groups[group].name;
 520 +}
 521 +
 522 +static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
 523 +                                         unsigned group, const unsigned **pins,
 524 +                                         unsigned *num_pins)
 525 +{
 526 +       *pins = bcm6362_groups[group].pins;
 527 +       *num_pins = bcm6362_groups[group].num_pins;
 528 +
 529 +       return 0;
 530 +}
 531 +
 532 +static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
 533 +{
 534 +       return ARRAY_SIZE(bcm6362_funcs);
 535 +}
 536 +
 537 +static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 538 +                                                unsigned selector)
 539 +{
 540 +       return bcm6362_funcs[selector].name;
 541 +}
 542 +
 543 +static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev,
 544 +                                     unsigned selector,
 545 +                                     const char * const **groups,
 546 +                                     unsigned * const num_groups)
 547 +{
 548 +       *groups = bcm6362_funcs[selector].groups;
 549 +       *num_groups = bcm6362_funcs[selector].num_groups;
 550 +
 551 +       return 0;
 552 +}
 553 +
 554 +static void bcm6362_rmw_mux(struct bcm6362_pinctrl *pctl, void __iomem *reg,
 555 +                           u32 mask, u32 val)
 556 +{
 557 +       unsigned long flags;
 558 +       u32 tmp;
 559 +
 560 +       spin_lock_irqsave(&pctl->lock, flags);
 561 +       tmp = __raw_readl(reg);
 562 +       tmp &= ~mask;
 563 +       tmp |= val & mask;
 564 +       __raw_writel(tmp, reg);
 565 +
 566 +       spin_unlock_irqrestore(&pctl->lock, flags);
 567 +}
 568 +
 569 +static void bcm6362_set_gpio(struct bcm6362_pinctrl *pctl, unsigned pin)
 570 +{
 571 +       const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin];
 572 +       u32 mask = BIT(pin % 32);
 573 +
 574 +       if (desc->drv_data)
 575 +               bcm6362_rmw_mux(pctl, pctl->basemode, (u32)desc->drv_data, 0);
 576 +
 577 +       if (pin < 32) {
 578 +               /* base mode 0 => gpio 1 => mux function */
 579 +               bcm6362_rmw_mux(pctl, pctl->mode, mask, 0);
 580 +
 581 +               /* pins 0-23 might be muxed to led */
 582 +               if (pin < 24)
 583 +                       bcm6362_rmw_mux(pctl, pctl->led, mask, 0);
 584 +       } else {
 585 +               /* ctrl reg 0 => wifi function 1 => gpio */
 586 +               bcm6362_rmw_mux(pctl, pctl->ctrl, mask, mask);
 587 +       }
 588 +}
 589 +
 590 +static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 591 +                                  unsigned selector, unsigned group)
 592 +{
 593 +       struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 594 +       const struct bcm6362_pingroup *grp = &bcm6362_groups[group];
 595 +       const struct bcm6362_function *f = &bcm6362_funcs[selector];
 596 +       unsigned i;
 597 +       void __iomem *reg;
 598 +       u32 val, mask;
 599 +
 600 +       for (i = 0; i < grp->num_pins; i++)
 601 +               bcm6362_set_gpio(pctl, grp->pins[i]);
 602 +
 603 +       switch (f->reg) {
 604 +       case BCM6362_LEDCTRL:
 605 +               reg = pctl->led;
 606 +               mask = BIT(grp->pins[0]);
 607 +               val = BIT(grp->pins[0]);
 608 +               break;
 609 +       case BCM6362_MODE:
 610 +               reg = pctl->ctrl;
 611 +               mask = BIT(grp->pins[0]);
 612 +               val = BIT(grp->pins[0]);
 613 +               break;
 614 +       case BCM6362_CTRL:
 615 +               reg = pctl->ctrl;
 616 +               mask = BIT(grp->pins[0]);
 617 +               val = 0;
 618 +               break;
 619 +       case BCM6362_BASEMODE:
 620 +               reg = pctl->basemode;
 621 +               mask = f->basemode_mask;
 622 +               val = f->basemode_mask;
 623 +               break;
 624 +       default:
 625 +               WARN_ON(1);
 626 +               return -EINVAL;
 627 +       }
 628 +
 629 +       bcm6362_rmw_mux(pctl, reg, mask, val);
 630 +
 631 +       return 0;
 632 +}
 633 +
 634 +static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev,
 635 +                                      struct pinctrl_gpio_range *range,
 636 +                                      unsigned offset)
 637 +{
 638 +       struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
 639 +
 640 +       /* disable all functions using this pin */
 641 +       bcm6362_set_gpio(pctl, offset);
 642 +
 643 +       return 0;
 644 +}
 645 +
 646 +static struct pinctrl_ops bcm6362_pctl_ops = {
 647 +       .get_groups_count       = bcm6362_pinctrl_get_group_count,
 648 +       .get_group_name         = bcm6362_pinctrl_get_group_name,
 649 +       .get_group_pins         = bcm6362_pinctrl_get_group_pins,
 650 +#ifdef CONFIG_OF
 651 +       .dt_node_to_map         = pinconf_generic_dt_node_to_map_pin,
 652 +       .dt_free_map            = pinctrl_utils_free_map,
 653 +#endif
 654 +};
 655 +
 656 +static struct pinmux_ops bcm6362_pmx_ops = {
 657 +       .get_functions_count    = bcm6362_pinctrl_get_func_count,
 658 +       .get_function_name      = bcm6362_pinctrl_get_func_name,
 659 +       .get_function_groups    = bcm6362_pinctrl_get_groups,
 660 +       .set_mux                = bcm6362_pinctrl_set_mux,
 661 +       .gpio_request_enable    = bcm6362_gpio_request_enable,
 662 +       .strict                 = true,
 663 +};
 664 +
 665 +static int bcm6362_pinctrl_probe(struct platform_device *pdev)
 666 +{
 667 +       struct bcm6362_pinctrl *pctl;
 668 +       struct resource *res;
 669 +       void __iomem *led, *mode, *ctrl, *basemode;
 670 +
 671 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
 672 +       led = devm_ioremap_resource(&pdev->dev, res);
 673 +       if (IS_ERR(led))
 674 +               return PTR_ERR(led);
 675 +
 676 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
 677 +       mode = devm_ioremap_resource(&pdev->dev, res);
 678 +       if (IS_ERR(mode))
 679 +               return PTR_ERR(mode);
 680 +
 681 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
 682 +       ctrl = devm_ioremap_resource(&pdev->dev, res);
 683 +       if (IS_ERR(ctrl))
 684 +               return PTR_ERR(ctrl);
 685 +
 686 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
 687 +       basemode = devm_ioremap_resource(&pdev->dev, res);
 688 +       if (IS_ERR(basemode))
 689 +               return PTR_ERR(basemode);
 690 +
 691 +       pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
 692 +       if (!pctl)
 693 +               return -ENOMEM;
 694 +
 695 +       spin_lock_init(&pctl->lock);
 696 +
 697 +       pctl->led = led;
 698 +       pctl->mode = mode;
 699 +       pctl->ctrl = ctrl;
 700 +       pctl->basemode = basemode;
 701 +
 702 +       pctl->desc.name = dev_name(&pdev->dev);
 703 +       pctl->desc.owner = THIS_MODULE;
 704 +       pctl->desc.pctlops = &bcm6362_pctl_ops;
 705 +       pctl->desc.pmxops = &bcm6362_pmx_ops;
 706 +
 707 +       pctl->desc.npins = ARRAY_SIZE(bcm6362_pins);
 708 +       pctl->desc.pins = bcm6362_pins;
 709 +
 710 +       platform_set_drvdata(pdev, pctl);
 711 +
 712 +       pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
 713 +                                                pctl->gpio, BCM6362_NGPIO);
 714 +       if (IS_ERR(pctl->pctldev))
 715 +               return PTR_ERR(pctl->pctldev);
 716 +
 717 +       return 0;
 718 +}
 719 +
 720 +static const struct of_device_id bcm6362_pinctrl_match[] = {
 721 +       { .compatible = "brcm,bcm6362-pinctrl", },
 722 +       { },
 723 +};
 724 +
 725 +static struct platform_driver bcm6362_pinctrl_driver = {
 726 +       .probe = bcm6362_pinctrl_probe,
 727 +       .driver = {
 728 +               .name = "bcm6362-pinctrl",
 729 +               .of_match_table = bcm6362_pinctrl_match,
 730 +       },
 731 +};
 732 +
 733 +builtin_platform_driver(bcm6362_pinctrl_driver);