bcm53xx: drop linux 4.4 and 4.9 support
[openwrt/openwrt.git] / target / linux / brcm63xx / patches-4.4 / 141-Documentation-add-BCM63268-pincontroller-binding-doc.patch
1 From 28cc80e4ada5d73d5305fd268297825cd8d01936 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Wed, 27 Jul 2016 11:37:08 +0200
4 Subject: [PATCH 12/16] Documentation: add BCM63268 pincontroller binding
5 documentation
6
7 Add binding documentation for the pincontrol core found in the BCM63268
8 family SoCs.
9
10 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
11 ---
12 .../bindings/pinctrl/brcm,bcm63268-pinctrl.txt | 88 ++++++++++++++++++++++
13 1 file changed, 88 insertions(+)
14 create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
15
16 --- /dev/null
17 +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
18 @@ -0,0 +1,88 @@
19 +* Broadcom BCM63268 pin controller
20 +
21 +Required properties:
22 +- compatible: Must be "brcm,bcm6362-pinctrl".
23 +- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
24 +- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
25 +- gpio-controller: Identifies this node as a GPIO controller.
26 +- #gpio-cells: Must be <2>.
27 +
28 +Example:
29 +
30 +pinctrl: pin-controller@100000c0 {
31 + compatible = "brcm,bcm63268-pinctrl";
32 + reg = <0x100000c0 0x8>,
33 + <0x100000c8 0x8>,
34 + <0x100000d0 0x4>,
35 + <0x100000d8 0x4>,
36 + <0x100000dc 0x4>,
37 + <0x100000f8 0x4>;
38 + reg-names = "dirout", "dat", "led", "mode",
39 + "ctrl", "basemode";
40 +
41 + gpio-controller;
42 + #gpio-cells = <2>;
43 +};
44 +
45 +Available pins/groups and functions:
46 +
47 +name pins functions
48 +-----------------------------------------------------------
49 +gpio0 0 led, serial_led_clk
50 +gpio1 1 led, serial_led_data
51 +gpio2 2 led,
52 +gpio3 3 led,
53 +gpio4 4 led,
54 +gpio5 5 led,
55 +gpio6 6 led,
56 +gpio7 7 led,
57 +gpio8 8 led, hsspi_cs6
58 +gpio9 9 led, hsspi_cs7
59 +gpio10 10 led, uart1_scts
60 +gpio11 11 led, uart1_srts
61 +gpio12 12 led, uart1_sdin
62 +gpio13 13 led, uart1_sdout
63 +gpio14 14 led, ntr_pulse_in
64 +gpio15 15 led, dsl_ntr_pulse_out
65 +gpio16 16 led, hsspi_cs4
66 +gpio17 17 led, hsspi_cs5
67 +gpio18 18 led, adsl_spi_miso
68 +gpio19 19 led, adsl_spi_mosi
69 +gpio20 20 led,
70 +gpio21 21 led,
71 +gpio22 22 led, vreg_clk
72 +gpio23 23 led, pcie_clkreq_b
73 +gpio24 24 uart1_scts
74 +gpio25 25 uart1_srts
75 +gpio26 26 uart1_sdin
76 +gpio27 27 uart1_sdout
77 +gpio28 28 ntr_pulse_in
78 +gpio29 29 dsl_ntr_pulse_out
79 +gpio30 30 switch_led_clk
80 +gpio31 31 switch_led_data
81 +gpio32 32 wifi
82 +gpio33 33 wifi
83 +gpio34 34 wifi
84 +gpio35 35 wifi
85 +gpio36 36 wifi
86 +gpio37 37 wifi
87 +gpio38 38 wifi
88 +gpio39 39 wifi
89 +gpio40 40 wifi
90 +gpio41 41 wifi
91 +gpio42 42 wifi
92 +gpio43 43 wifi
93 +gpio44 44 wifi
94 +gpio45 45 wifi
95 +gpio46 46 wifi
96 +gpio47 47 wifi
97 +gpio48 48 wifi
98 +gpio49 49 wifi
99 +gpio50 50 wifi
100 +gpio51 51 wifi
101 +nand_grp 2-7,24-31 nand
102 +dect_pd_grp 8-9 dect_pd
103 +vdsl_phy0_grp 10-11 vdsl_phy0
104 +vdsl_phy1_grp 12-13 vdsl_phy1
105 +vdsl_phy2_grp 24-25 vdsl_phy2
106 +vdsl_phy3_grp 26-27 vdsl_phy3