upgrade to 2.6.39
[openwrt/openwrt.git] / target / linux / cns3xxx / patches / 103-cns3xxx_l2cache.patch
1 --- a/arch/arm/mach-cns3xxx/core.c
2 +++ b/arch/arm/mach-cns3xxx/core.c
3 @@ -15,6 +15,7 @@
4 #include <asm/mach/map.h>
5 #include <asm/mach/time.h>
6 #include <asm/mach/irq.h>
7 +#include <asm/hardware/cache-l2x0.h>
8 #include <asm/hardware/gic.h>
9 #include <asm/smp_twd.h>
10 #include <mach/cns3xxx.h>
11 @@ -71,15 +72,29 @@ static struct map_desc cns3xxx_io_desc[]
12 .pfn = __phys_to_pfn(CNS3XXX_SSP_BASE),
13 .length = SZ_4K,
14 .type = MT_DEVICE,
15 + }, {
16 + .virtual = CNS3XXX_L2C_BASE_VIRT,
17 + .pfn = __phys_to_pfn(CNS3XXX_L2C_BASE),
18 + .length = SZ_4K,
19 + .type = MT_DEVICE,
20 },
21 };
22
23 void __init cns3xxx_map_io(void)
24 {
25 + iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc));
26 +#ifdef CONFIG_CACHE_L2X0
27 + void __iomem *l2x0_base = (void __iomem *) CNS3XXX_L2C_BASE_VIRT;
28 +
29 + /* set RAM latencies to 1 cycle for this core tile. */
30 + writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
31 + writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
32 +
33 + l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
34 +#endif
35 #ifdef CONFIG_LOCAL_TIMERS
36 twd_base = (void __iomem *) CNS3XXX_TC11MP_TWD_BASE_VIRT;
37 #endif
38 - iotable_init(cns3xxx_io_desc, ARRAY_SIZE(cns3xxx_io_desc));
39 }
40
41 /* used by entry-macro.S */
42 --- a/arch/arm/mm/Kconfig
43 +++ b/arch/arm/mm/Kconfig
44 @@ -821,7 +821,7 @@ config CACHE_L2X0
45 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
46 REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \
47 ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
48 - ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE
49 + ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || ARCH_CNS3XXX
50 default y
51 select OUTER_CACHE
52 select OUTER_CACHE_SYNC
53 @@ -866,7 +866,7 @@ config ARM_L1_CACHE_SHIFT
54 config ARM_DMA_MEM_BUFFERABLE
55 bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K) && !CPU_V7
56 depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \
57 - MACH_REALVIEW_PB11MP)
58 + MACH_REALVIEW_PB11MP || ARCH_CNS3XXX)
59 default y if CPU_V6 || CPU_V6K || CPU_V7
60 help
61 Historically, the kernel has used strongly ordered mappings to