d13554e535a35cd973b0accce7d2ebef5881712c
[openwrt/openwrt.git] / target / linux / gemini / patches-3.18 / 130-usb-ehci-fot2g.patch
1 --- a/arch/arm/mach-gemini/devices.c
2 +++ b/arch/arm/mach-gemini/devices.c
3 @@ -188,3 +188,64 @@ int platform_register_ethernet(struct ge
4
5 return platform_device_register(&ethernet_device);
6 }
7 +
8 +static struct resource usb0_resources[] = {
9 + {
10 + .start = GEMINI_USB0_BASE,
11 + .end = GEMINI_USB0_BASE + 0xfff,
12 + .flags = IORESOURCE_MEM,
13 + },
14 + {
15 + .start = IRQ_USB0,
16 + .end = IRQ_USB0,
17 + .flags = IORESOURCE_IRQ,
18 + },
19 +};
20 +
21 +static struct resource usb1_resources[] = {
22 + {
23 + .start = GEMINI_USB1_BASE,
24 + .end = GEMINI_USB1_BASE + 0xfff,
25 + .flags = IORESOURCE_MEM,
26 + },
27 + {
28 + .start = IRQ_USB1,
29 + .end = IRQ_USB1,
30 + .flags = IORESOURCE_IRQ,
31 + },
32 +};
33 +
34 +static u64 usb0_dmamask = 0xffffffffUL;
35 +static u64 usb1_dmamask = 0xffffffffUL;
36 +
37 +static struct platform_device usb_device[] = {
38 + {
39 + .name = "ehci-fotg2",
40 + .id = 0,
41 + .dev = {
42 + .dma_mask = &usb0_dmamask,
43 + .coherent_dma_mask = 0xffffffff,
44 + },
45 + .num_resources = ARRAY_SIZE(usb0_resources),
46 + .resource = usb0_resources,
47 + },
48 + {
49 + .name = "ehci-fotg2",
50 + .id = 1,
51 + .dev = {
52 + .dma_mask = &usb1_dmamask,
53 + .coherent_dma_mask = 0xffffffff,
54 + },
55 + .num_resources = ARRAY_SIZE(usb1_resources),
56 + .resource = usb1_resources,
57 + },
58 +};
59 +
60 +int __init platform_register_usb(unsigned int id)
61 +{
62 + if (id > 1)
63 + return -EINVAL;
64 +
65 + return platform_device_register(&usb_device[id]);
66 +}
67 +
68 --- a/arch/arm/mach-gemini/common.h
69 +++ b/arch/arm/mach-gemini/common.h
70 @@ -28,6 +28,7 @@ extern int platform_register_pflash(unsi
71 unsigned int nr_parts);
72 extern int platform_register_watchdog(void);
73 extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
74 +extern int platform_register_usb(unsigned int id);
75
76 extern void gemini_restart(enum reboot_mode mode, const char *cmd);
77
78 --- a/drivers/usb/host/ehci-hcd.c
79 +++ b/drivers/usb/host/ehci-hcd.c
80 @@ -346,11 +346,13 @@ static void ehci_silence_controller(stru
81 ehci->rh_state = EHCI_RH_HALTED;
82 ehci_turn_off_all_ports(ehci);
83
84 +#ifndef CONFIG_ARCH_GEMINI
85 /* make BIOS/etc use companion controller during reboot */
86 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
87
88 /* unblock posted writes */
89 ehci_readl(ehci, &ehci->regs->configured_flag);
90 +#endif
91 spin_unlock_irq(&ehci->lock);
92 }
93
94 @@ -602,7 +604,9 @@ static int ehci_run (struct usb_hcd *hcd
95 // Philips, Intel, and maybe others need CMD_RUN before the
96 // root hub will detect new devices (why?); NEC doesn't
97 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
98 +#ifndef CONFIG_ARCH_GEMINI
99 ehci->command |= CMD_RUN;
100 +#endif
101 ehci_writel(ehci, ehci->command, &ehci->regs->command);
102 dbg_cmd (ehci, "init", ehci->command);
103
104 @@ -622,9 +626,11 @@ static int ehci_run (struct usb_hcd *hcd
105 */
106 down_write(&ehci_cf_port_reset_rwsem);
107 ehci->rh_state = EHCI_RH_RUNNING;
108 +#ifndef CONFIG_ARCH_GEMINI
109 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
110 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
111 msleep(5);
112 +#endif
113 up_write(&ehci_cf_port_reset_rwsem);
114 ehci->last_periodic_enable = ktime_get_real();
115
116 @@ -762,9 +768,10 @@ static irqreturn_t ehci_irq (struct usb_
117 pcd_status = status;
118
119 /* resume root hub? */
120 +#ifndef CONFIG_ARCH_GEMINI
121 if (ehci->rh_state == EHCI_RH_SUSPENDED)
122 usb_hcd_resume_root_hub(hcd);
123 -
124 +#endif
125 /* get per-port change detect bits */
126 if (ehci->has_ppcd)
127 ppcd = status >> 16;
128 @@ -1243,6 +1250,11 @@ MODULE_DESCRIPTION(DRIVER_DESC);
129 MODULE_AUTHOR (DRIVER_AUTHOR);
130 MODULE_LICENSE ("GPL");
131
132 +#ifdef CONFIG_ARCH_GEMINI
133 +#include "ehci-fotg2.c"
134 +#define PLATFORM_DRIVER ehci_fotg2_driver
135 +#endif
136 +
137 #ifdef CONFIG_USB_EHCI_FSL
138 #include "ehci-fsl.c"
139 #define PLATFORM_DRIVER ehci_fsl_driver
140 --- a/drivers/usb/host/ehci-timer.c
141 +++ b/drivers/usb/host/ehci-timer.c
142 @@ -208,7 +208,9 @@ static void ehci_handle_controller_death
143
144 /* Clean up the mess */
145 ehci->rh_state = EHCI_RH_HALTED;
146 +#ifndef CONFIG_ARCH_GEMINI
147 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
148 +#endif
149 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
150 ehci_work(ehci);
151 end_unlink_async(ehci);
152 --- a/drivers/usb/host/ehci.h
153 +++ b/drivers/usb/host/ehci.h
154 @@ -656,7 +656,12 @@ static inline unsigned int
155 ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
156 {
157 if (ehci_is_TDI(ehci)) {
158 - switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
159 +#ifdef CONFIG_ARCH_GEMINI
160 + portsc = readl(ehci_to_hcd(ehci)->regs + 0x80);
161 + switch ((portsc>>22)&3) {
162 +#else
163 + switch ((portsc>>26)&3) {
164 +#endif
165 case 0:
166 return 0;
167 case 1:
168 --- a/drivers/usb/host/ehci-hub.c
169 +++ b/drivers/usb/host/ehci-hub.c
170 @@ -1075,6 +1075,11 @@ int ehci_hub_control(
171 /* see what we found out */
172 temp = check_reset_complete (ehci, wIndex, status_reg,
173 ehci_readl(ehci, status_reg));
174 +#ifdef CONFIG_ARCH_GEMINI
175 + /* restart schedule */
176 + ehci->command |= CMD_RUN;
177 + ehci_writel(ehci, ehci->command, &ehci->regs->command);
178 +#endif
179 }
180
181 /* transfer dedicated ports to the companion hc */
182 --- a/include/linux/usb/ehci_def.h
183 +++ b/include/linux/usb/ehci_def.h
184 @@ -110,8 +110,13 @@ struct ehci_regs {
185 u32 frame_list; /* points to periodic list */
186 /* ASYNCLISTADDR: offset 0x18 */
187 u32 async_next; /* address of next async queue head */
188 -
189 +#ifndef CONFIG_ARCH_GEMINI
190 u32 reserved1[2];
191 +#else
192 + u32 reserved1;
193 + /* PORTSC: offset 0x20 for Faraday OTG */
194 + u32 port_status[1];
195 +#endif
196
197 /* TXFILLTUNING: offset 0x24 */
198 u32 txfill_tuning; /* TX FIFO Tuning register */
199 @@ -123,8 +128,11 @@ struct ehci_regs {
200 u32 configured_flag;
201 #define FLAG_CF (1<<0) /* true: we'll support "high speed" */
202
203 +#ifndef CONFIG_ARCH_GEMINI
204 /* PORTSC: offset 0x44 */
205 u32 port_status[0]; /* up to N_PORTS */
206 +#endif
207 +
208 /* EHCI 1.1 addendum */
209 #define PORTSC_SUSPEND_STS_ACK 0
210 #define PORTSC_SUSPEND_STS_NYET 1