2192ad69bad0ef8aa88cb9fe5b0dbbafea079dea
[openwrt/openwrt.git] / target / linux / gemini / patches / 130-usb-ehci-add-fot2g-driver.patch
1 --- a/drivers/usb/host/ehci-hcd.c
2 +++ b/drivers/usb/host/ehci-hcd.c
3 @@ -352,11 +352,13 @@ static void ehci_silence_controller(stru
4 ehci->rh_state = EHCI_RH_HALTED;
5 ehci_turn_off_all_ports(ehci);
6
7 +#ifndef CONFIG_ARCH_GEMINI
8 /* make BIOS/etc use companion controller during reboot */
9 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
10
11 /* unblock posted writes */
12 ehci_readl(ehci, &ehci->regs->configured_flag);
13 +#endif
14 spin_unlock_irq(&ehci->lock);
15 }
16
17 @@ -608,7 +610,9 @@ static int ehci_run (struct usb_hcd *hcd
18 // Philips, Intel, and maybe others need CMD_RUN before the
19 // root hub will detect new devices (why?); NEC doesn't
20 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
21 +#ifndef CONFIG_ARCH_GEMINI
22 ehci->command |= CMD_RUN;
23 +#endif
24 ehci_writel(ehci, ehci->command, &ehci->regs->command);
25 dbg_cmd (ehci, "init", ehci->command);
26
27 @@ -628,9 +632,11 @@ static int ehci_run (struct usb_hcd *hcd
28 */
29 down_write(&ehci_cf_port_reset_rwsem);
30 ehci->rh_state = EHCI_RH_RUNNING;
31 +#ifndef CONFIG_ARCH_GEMINI
32 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
33 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
34 msleep(5);
35 +#endif
36 up_write(&ehci_cf_port_reset_rwsem);
37 ehci->last_periodic_enable = ktime_get_real();
38
39 @@ -768,9 +774,10 @@ static irqreturn_t ehci_irq (struct usb_
40 pcd_status = status;
41
42 /* resume root hub? */
43 +#ifndef CONFIG_ARCH_GEMINI
44 if (ehci->rh_state == EHCI_RH_SUSPENDED)
45 usb_hcd_resume_root_hub(hcd);
46 -
47 +#endif
48 /* get per-port change detect bits */
49 if (ehci->has_ppcd)
50 ppcd = status >> 16;
51 @@ -1296,6 +1303,11 @@ MODULE_LICENSE ("GPL");
52 #define PLATFORM_DRIVER ehci_hcd_sead3_driver
53 #endif
54
55 +#ifdef CONFIG_ARCH_GEMINI
56 +#include "ehci-fotg2.c"
57 +#define PLATFORM_DRIVER ehci_fotg2_driver
58 +#endif
59 +
60 static int __init ehci_hcd_init(void)
61 {
62 int retval = 0;
63 --- a/drivers/usb/host/ehci-timer.c
64 +++ b/drivers/usb/host/ehci-timer.c
65 @@ -208,7 +208,9 @@ static void ehci_handle_controller_death
66
67 /* Clean up the mess */
68 ehci->rh_state = EHCI_RH_HALTED;
69 +#ifndef CONFIG_ARCH_GEMINI
70 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
71 +#endif
72 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
73 ehci_work(ehci);
74 end_unlink_async(ehci);
75 --- a/drivers/usb/host/ehci.h
76 +++ b/drivers/usb/host/ehci.h
77 @@ -657,7 +657,12 @@ static inline unsigned int
78 ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
79 {
80 if (ehci_is_TDI(ehci)) {
81 - switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
82 +#ifdef CONFIG_ARCH_GEMINI
83 + portsc = readl(ehci_to_hcd(ehci)->regs + 0x80);
84 + switch ((portsc>>22)&3) {
85 +#else
86 + switch ((portsc>>26)&3) {
87 +#endif
88 case 0:
89 return 0;
90 case 1:
91 --- a/drivers/usb/host/ehci-hub.c
92 +++ b/drivers/usb/host/ehci-hub.c
93 @@ -1076,6 +1076,11 @@ int ehci_hub_control(
94 /* see what we found out */
95 temp = check_reset_complete (ehci, wIndex, status_reg,
96 ehci_readl(ehci, status_reg));
97 +#ifdef CONFIG_ARCH_GEMINI
98 + /* restart schedule */
99 + ehci->command |= CMD_RUN;
100 + ehci_writel(ehci, ehci->command, &ehci->regs->command);
101 +#endif
102 }
103
104 /* transfer dedicated ports to the companion hc */
105 --- a/include/linux/usb/ehci_def.h
106 +++ b/include/linux/usb/ehci_def.h
107 @@ -112,8 +112,13 @@ struct ehci_regs {
108 u32 frame_list; /* points to periodic list */
109 /* ASYNCLISTADDR: offset 0x18 */
110 u32 async_next; /* address of next async queue head */
111 -
112 +#ifndef CONFIG_ARCH_GEMINI
113 u32 reserved1[2];
114 +#else
115 + u32 reserved1;
116 + /* PORTSC: offset 0x20 for Faraday OTG */
117 + u32 port_status[1];
118 +#endif
119
120 /* TXFILLTUNING: offset 0x24 */
121 u32 txfill_tuning; /* TX FIFO Tuning register */
122 @@ -125,8 +130,11 @@ struct ehci_regs {
123 u32 configured_flag;
124 #define FLAG_CF (1<<0) /* true: we'll support "high speed" */
125
126 +#ifndef CONFIG_ARCH_GEMINI
127 /* PORTSC: offset 0x44 */
128 u32 port_status[0]; /* up to N_PORTS */
129 +#endif
130 +
131 /* EHCI 1.1 addendum */
132 #define PORTSC_SUSPEND_STS_ACK 0
133 #define PORTSC_SUSPEND_STS_NYET 1