target/linux/generic-2.4/files/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/mvCtrlEnvAddrDec.c

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  63 *******************************************************************************/
  64
  65 /*******************************************************************************
  66 * mvCtrlEnvAddrDec.h - Marvell controller address decode library
  67 *
  68 * DESCRIPTION:
  69 *
  70 * DEPENDENCIES:
  71 *       None.
  72 *
  73 *******************************************************************************/
  74
  75 /* includes */
  76 #include "ctrlEnv/mvCtrlEnvAddrDec.h"
  77 #include "ctrlEnv/sys/mvAhbToMbusRegs.h"
  78 #include "ddr2/mvDramIfRegs.h"
  79 #include "pex/mvPexRegs.h"
  80
  81 #define MV_DEBUG
  82
  83 /* defines  */
  84 #ifdef MV_DEBUG
  85         #define DB(x)   x
  86 #else
  87         #define DB(x)
  88 #endif
  89
  90 /* Default Attributes array */
  91 MV_TARGET_ATTRIB        mvTargetDefaultsArray[] = TARGETS_DEF_ARRAY;
  92 extern MV_TARGET        *sampleAtResetTargetArray;
  93 /* Dram\AHBToMbus\PEX share regsiter */
  94
  95 #define CTRL_DEC_BASE_OFFS              16
  96 #define CTRL_DEC_BASE_MASK              (0xffff << CTRL_DEC_BASE_OFFS)
  97 #define CTRL_DEC_BASE_ALIGNMENT 0x10000
  98
  99 #define CTRL_DEC_SIZE_OFFS              16
 100 #define CTRL_DEC_SIZE_MASK              (0xffff << CTRL_DEC_SIZE_OFFS)
 101 #define CTRL_DEC_SIZE_ALIGNMENT 0x10000
 102
 103 #define CTRL_DEC_WIN_EN                 BIT0
 104
 105
 106
 107 /*******************************************************************************
 108 * mvCtrlAddrDecToReg - Get address decode register format values
 109 *
 110 * DESCRIPTION:
 111 *
 112 * INPUT:
 113 *
 114 * OUTPUT:
 115 *
 116 * RETURN:
 117 *
 118 *******************************************************************************/
 119 MV_STATUS mvCtrlAddrDecToReg(MV_ADDR_WIN *pAddrDecWin, MV_DEC_REGS *pAddrDecRegs)
 120 {
 121
 122         MV_U32 baseToReg=0 , sizeToReg=0;
 123
 124         /* BaseLow[31:16] => base register [31:16]              */
 125         baseToReg = pAddrDecWin->baseLow & CTRL_DEC_BASE_MASK;
 126
 127         /* Write to address decode Base Address Register                  */
 128         pAddrDecRegs->baseReg &= ~CTRL_DEC_BASE_MASK;
 129         pAddrDecRegs->baseReg |= baseToReg;
 130
 131         /* Get size register value according to window size                                             */
 132         sizeToReg = ctrlSizeToReg(pAddrDecWin->size, CTRL_DEC_SIZE_ALIGNMENT);
 133
 134         /* Size parameter validity check.                                   */
 135         if (-1 == sizeToReg)
 136         {
 137                 return MV_BAD_PARAM;
 138         }
 139
 140         /* set size */
 141         pAddrDecRegs->sizeReg &= ~CTRL_DEC_SIZE_MASK;
 142         pAddrDecRegs->sizeReg |= (sizeToReg << CTRL_DEC_SIZE_OFFS);
 143
 144
 145         return MV_OK;
 146
 147 }
 148
 149 /*******************************************************************************
 150 * mvCtrlRegToAddrDec - Extract address decode struct from registers.
 151 *
 152 * DESCRIPTION:
 153 *       This function extract address decode struct from address decode
 154 *       registers given as parameters.
 155 *
 156 * INPUT:
 157 *       pAddrDecRegs - Address decode register struct.
 158 *
 159 * OUTPUT:
 160 *       pAddrDecWin - Target window data structure.
 161 *
 162 * RETURN:
 163 *               MV_BAD_PARAM if address decode registers data is invalid.
 164 *
 165 *******************************************************************************/
 166 MV_STATUS mvCtrlRegToAddrDec(MV_DEC_REGS *pAddrDecRegs, MV_ADDR_WIN *pAddrDecWin)
 167 {
 168         MV_U32 sizeRegVal;
 169
 170         sizeRegVal = (pAddrDecRegs->sizeReg & CTRL_DEC_SIZE_MASK) >>
 171                                         CTRL_DEC_SIZE_OFFS;
 172
 173         pAddrDecWin->size = ctrlRegToSize(sizeRegVal, CTRL_DEC_SIZE_ALIGNMENT);
 174
 175
 176         /* Extract base address                                         */
 177         /* Base register [31:16] ==> baseLow[31:16]             */
 178         pAddrDecWin->baseLow = pAddrDecRegs->baseReg & CTRL_DEC_BASE_MASK;
 179
 180         pAddrDecWin->baseHigh =  0;
 181
 182         return MV_OK;
 183
 184 }
 185
 186 /*******************************************************************************
 187 * mvCtrlAttribGet -
 188 *
 189 * DESCRIPTION:
 190 *
 191 * INPUT:
 192 *
 193 * OUTPUT:
 194 *
 195 * RETURN:
 196 *
 197 *******************************************************************************/
 198
 199 MV_STATUS mvCtrlAttribGet(MV_TARGET target,
 200                                                   MV_TARGET_ATTRIB *targetAttrib)
 201 {
 202
 203         targetAttrib->attrib = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].attrib;
 204         targetAttrib->targetId = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].targetId;
 205
 206         return MV_OK;
 207
 208 }
 209
 210 /*******************************************************************************
 211 * mvCtrlGetAttrib -
 212 *
 213 * DESCRIPTION:
 214 *
 215 * INPUT:
 216 *
 217 * OUTPUT:
 218 *
 219 * RETURN:
 220 *
 221 *******************************************************************************/
 222 MV_TARGET mvCtrlTargetGet(MV_TARGET_ATTRIB *targetAttrib)
 223 {
 224         MV_TARGET target;
 225         MV_TARGET x;
 226         for (target = SDRAM_CS0; target < MAX_TARGETS ; target ++)
 227         {
 228                 x = MV_CHANGE_BOOT_CS(target);
 229                 if ((mvTargetDefaultsArray[x].attrib == targetAttrib->attrib) &&
 230                         (mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(target)].targetId == targetAttrib->targetId))
 231                 {
 232                         /* found it */
 233                         break;
 234                 }
 235         }
 236
 237         return target;
 238 }
 239
 240 MV_STATUS mvCtrlAddrDecToParams(MV_DEC_WIN *pAddrDecWin,
 241                                 MV_DEC_WIN_PARAMS *pWinParam)
 242 {
 243         MV_U32 baseToReg=0, sizeToReg=0;
 244
 245         /* BaseLow[31:16] => base register [31:16]              */
 246         baseToReg = pAddrDecWin->addrWin.baseLow & CTRL_DEC_BASE_MASK;
 247
 248         /* Write to address decode Base Address Register                  */
 249         pWinParam->baseAddr &= ~CTRL_DEC_BASE_MASK;
 250         pWinParam->baseAddr |= baseToReg;
 251
 252         /* Get size register value according to window size                                             */
 253         sizeToReg = ctrlSizeToReg(pAddrDecWin->addrWin.size, CTRL_DEC_SIZE_ALIGNMENT);
 254
 255         /* Size parameter validity check.                                   */
 256         if (-1 == sizeToReg)
 257         {
 258         mvOsPrintf("mvCtrlAddrDecToParams: ERR. ctrlSizeToReg failed.\n");
 259                 return MV_BAD_PARAM;
 260         }
 261     pWinParam->size = sizeToReg;
 262
 263     pWinParam->attrib   = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(pAddrDecWin->target)].attrib;
 264     pWinParam->targetId = mvTargetDefaultsArray[MV_CHANGE_BOOT_CS(pAddrDecWin->target)].targetId;
 265
 266     return MV_OK;
 267 }
 268
 269 MV_STATUS mvCtrlParamsToAddrDec(MV_DEC_WIN_PARAMS *pWinParam,
 270                                 MV_DEC_WIN *pAddrDecWin)
 271 {
 272     MV_TARGET_ATTRIB    targetAttrib;
 273
 274     pAddrDecWin->addrWin.baseLow = pWinParam->baseAddr;
 275
 276         /* Upper 32bit address base is supported under PCI High Address remap */
 277         pAddrDecWin->addrWin.baseHigh = 0;
 278
 279         /* Prepare sizeReg to ctrlRegToSize function */
 280     pAddrDecWin->addrWin.size = ctrlRegToSize(pWinParam->size, CTRL_DEC_SIZE_ALIGNMENT);
 281
 282         if (-1 == pAddrDecWin->addrWin.size)
 283         {
 284                 DB(mvOsPrintf("mvCtrlParamsToAddrDec: ERR. ctrlRegToSize failed.\n"));
 285                 return MV_BAD_PARAM;
 286         }
 287     targetAttrib.targetId = pWinParam->targetId;
 288     targetAttrib.attrib = pWinParam->attrib;
 289
 290     pAddrDecWin->target = mvCtrlTargetGet(&targetAttrib);
 291
 292     return MV_OK;
 293 }
 294
 295
 296