remove linux 2.4 specific build system code
[openwrt/openwrt.git] / target / linux / generic-2.6 / files / crypto / ocf / kirkwood / mvHal / kw_family / boardEnv / mvBoardEnvSpec.c
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63 *******************************************************************************/
64 #include "mvCommon.h"
65 #include "mvBoardEnvLib.h"
66 #include "mvBoardEnvSpec.h"
67 #include "twsi/mvTwsi.h"
68
69 #define DB_88F6281A_BOARD_PCI_IF_NUM 0x0
70 #define DB_88F6281A_BOARD_TWSI_DEF_NUM 0x7
71 #define DB_88F6281A_BOARD_MAC_INFO_NUM 0x2
72 #define DB_88F6281A_BOARD_GPP_INFO_NUM 0x3
73 #define DB_88F6281A_BOARD_MPP_CONFIG_NUM 0x1
74 #define DB_88F6281A_BOARD_MPP_GROUP_TYPE_NUM 0x1
75 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
76 #define DB_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x1
77 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
78 #define DB_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x2
79 #else
80 #define DB_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x1
81 #endif
82 #define DB_88F6281A_BOARD_DEBUG_LED_NUM 0x0
83
84
85 MV_BOARD_TWSI_INFO db88f6281AInfoBoardTwsiDev[] =
86 /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */
87 {
88 {BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT},
89 {BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT},
90 {BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT},
91 {BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT},
92 {BOARD_DEV_TWSI_SATR, 0x4D, ADDR7_BIT},
93 {BOARD_DEV_TWSI_SATR, 0x4E, ADDR7_BIT},
94 {BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT}
95 };
96
97 MV_BOARD_MAC_INFO db88f6281AInfoBoardMacInfo[] =
98 /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */
99 {
100 {BOARD_MAC_SPEED_AUTO, 0x8},
101 {BOARD_MAC_SPEED_AUTO, 0x9}
102 };
103
104 MV_BOARD_MPP_TYPE_INFO db88f6281AInfoBoardMppTypeInfo[] =
105 /* {{MV_BOARD_MPP_TYPE_CLASS boardMppGroup1,
106 MV_BOARD_MPP_TYPE_CLASS boardMppGroup2}} */
107 {{MV_BOARD_AUTO, MV_BOARD_AUTO}
108 };
109
110 MV_BOARD_GPP_INFO db88f6281AInfoBoardGppInfo[] =
111 /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */
112 {
113 {BOARD_GPP_TSU_DIRCTION, 33}
114 /*muxed with TDM/Audio module via IOexpender
115 {BOARD_GPP_SDIO_DETECT, 38},
116 {BOARD_GPP_USB_VBUS, 49}*/
117 };
118
119 MV_DEV_CS_INFO db88f6281AInfoBoardDeCsInfo[] =
120 /*{deviceCS, params, devType, devWidth}*/
121 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
122 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */
123 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
124 {
125 {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */
126 {1, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */
127 };
128 #else
129 {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */
130 #endif
131
132 MV_BOARD_MPP_INFO db88f6281AInfoBoardMppConfigValue[] =
133 {{{
134 DB_88F6281A_MPP0_7,
135 DB_88F6281A_MPP8_15,
136 DB_88F6281A_MPP16_23,
137 DB_88F6281A_MPP24_31,
138 DB_88F6281A_MPP32_39,
139 DB_88F6281A_MPP40_47,
140 DB_88F6281A_MPP48_55
141 }}};
142
143
144 MV_BOARD_INFO db88f6281AInfo = {
145 "DB-88F6281A-BP", /* boardName[MAX_BOARD_NAME_LEN] */
146 DB_88F6281A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */
147 db88f6281AInfoBoardMppTypeInfo,
148 DB_88F6281A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
149 db88f6281AInfoBoardMppConfigValue,
150 0, /* intsGppMaskLow */
151 0, /* intsGppMaskHigh */
152 DB_88F6281A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
153 db88f6281AInfoBoardDeCsInfo,
154 DB_88F6281A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
155 db88f6281AInfoBoardTwsiDev,
156 DB_88F6281A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
157 db88f6281AInfoBoardMacInfo,
158 DB_88F6281A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
159 db88f6281AInfoBoardGppInfo,
160 DB_88F6281A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
161 NULL,
162 0, /* ledsPolarity */
163 DB_88F6281A_OE_LOW, /* gppOutEnLow */
164 DB_88F6281A_OE_HIGH, /* gppOutEnHigh */
165 DB_88F6281A_OE_VAL_LOW, /* gppOutValLow */
166 DB_88F6281A_OE_VAL_HIGH, /* gppOutValHigh */
167 0, /* gppPolarityValLow */
168 BIT6, /* gppPolarityValHigh */
169 NULL /* pSwitchInfo */
170 };
171
172
173 #define RD_88F6281A_BOARD_PCI_IF_NUM 0x0
174 #define RD_88F6281A_BOARD_TWSI_DEF_NUM 0x2
175 #define RD_88F6281A_BOARD_MAC_INFO_NUM 0x2
176 #define RD_88F6281A_BOARD_GPP_INFO_NUM 0x5
177 #define RD_88F6281A_BOARD_MPP_GROUP_TYPE_NUM 0x1
178 #define RD_88F6281A_BOARD_MPP_CONFIG_NUM 0x1
179 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
180 #define RD_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x1
181 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
182 #define RD_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x2
183 #else
184 #define RD_88F6281A_BOARD_DEVICE_CONFIG_NUM 0x1
185 #endif
186 #define RD_88F6281A_BOARD_DEBUG_LED_NUM 0x0
187
188 MV_BOARD_MAC_INFO rd88f6281AInfoBoardMacInfo[] =
189 /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */
190 {{BOARD_MAC_SPEED_1000M, 0xa},
191 {BOARD_MAC_SPEED_AUTO, 0xb}
192 };
193
194 MV_BOARD_SWITCH_INFO rd88f6281AInfoBoardSwitchInfo[] =
195 /* MV_32 linkStatusIrq, {MV_32 qdPort0, MV_32 qdPort1, MV_32 qdPort2, MV_32 qdPort3, MV_32 qdPort4},
196 MV_32 qdCpuPort, MV_32 smiScanMode, MV_32 switchOnPort} */
197 {{38, {0, 1, 2, 3, -1}, 5, 2, 0},
198 {-1, {-1}, -1, -1, -1}};
199
200 MV_BOARD_TWSI_INFO rd88f6281AInfoBoardTwsiDev[] =
201 /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */
202 {
203 {BOARD_DEV_TWSI_EXP, 0xFF, ADDR7_BIT}, /* dummy entry to align with modules indexes */
204 {BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT}
205 };
206
207 MV_BOARD_MPP_TYPE_INFO rd88f6281AInfoBoardMppTypeInfo[] =
208 {{MV_BOARD_RGMII, MV_BOARD_TDM}
209 };
210
211 MV_DEV_CS_INFO rd88f6281AInfoBoardDeCsInfo[] =
212 /*{deviceCS, params, devType, devWidth}*/
213 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
214 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */
215 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
216 {
217 {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */
218 {1, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */
219 };
220 #else
221 {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */
222 #endif
223
224 MV_BOARD_GPP_INFO rd88f6281AInfoBoardGppInfo[] =
225 /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */
226 {{BOARD_GPP_SDIO_DETECT, 28},
227 {BOARD_GPP_USB_OC, 29},
228 {BOARD_GPP_WPS_BUTTON, 35},
229 {BOARD_GPP_MV_SWITCH, 38},
230 {BOARD_GPP_USB_VBUS, 49}
231 };
232
233 MV_BOARD_MPP_INFO rd88f6281AInfoBoardMppConfigValue[] =
234 {{{
235 RD_88F6281A_MPP0_7,
236 RD_88F6281A_MPP8_15,
237 RD_88F6281A_MPP16_23,
238 RD_88F6281A_MPP24_31,
239 RD_88F6281A_MPP32_39,
240 RD_88F6281A_MPP40_47,
241 RD_88F6281A_MPP48_55
242 }}};
243
244 MV_BOARD_INFO rd88f6281AInfo = {
245 "RD-88F6281A", /* boardName[MAX_BOARD_NAME_LEN] */
246 RD_88F6281A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */
247 rd88f6281AInfoBoardMppTypeInfo,
248 RD_88F6281A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
249 rd88f6281AInfoBoardMppConfigValue,
250 0, /* intsGppMaskLow */
251 (1 << 3), /* intsGppMaskHigh */
252 RD_88F6281A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
253 rd88f6281AInfoBoardDeCsInfo,
254 RD_88F6281A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
255 rd88f6281AInfoBoardTwsiDev,
256 RD_88F6281A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
257 rd88f6281AInfoBoardMacInfo,
258 RD_88F6281A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
259 rd88f6281AInfoBoardGppInfo,
260 RD_88F6281A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
261 NULL,
262 0, /* ledsPolarity */
263 RD_88F6281A_OE_LOW, /* gppOutEnLow */
264 RD_88F6281A_OE_HIGH, /* gppOutEnHigh */
265 RD_88F6281A_OE_VAL_LOW, /* gppOutValLow */
266 RD_88F6281A_OE_VAL_HIGH, /* gppOutValHigh */
267 0, /* gppPolarityValLow */
268 BIT6, /* gppPolarityValHigh */
269 rd88f6281AInfoBoardSwitchInfo /* pSwitchInfo */
270 };
271
272
273 #define DB_88F6192A_BOARD_PCI_IF_NUM 0x0
274 #define DB_88F6192A_BOARD_TWSI_DEF_NUM 0x7
275 #define DB_88F6192A_BOARD_MAC_INFO_NUM 0x2
276 #define DB_88F6192A_BOARD_GPP_INFO_NUM 0x3
277 #define DB_88F6192A_BOARD_MPP_GROUP_TYPE_NUM 0x1
278 #define DB_88F6192A_BOARD_MPP_CONFIG_NUM 0x1
279 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
280 #define DB_88F6192A_BOARD_DEVICE_CONFIG_NUM 0x1
281 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
282 #define DB_88F6192A_BOARD_DEVICE_CONFIG_NUM 0x2
283 #else
284 #define DB_88F6192A_BOARD_DEVICE_CONFIG_NUM 0x1
285 #endif
286 #define DB_88F6192A_BOARD_DEBUG_LED_NUM 0x0
287
288 MV_BOARD_TWSI_INFO db88f6192AInfoBoardTwsiDev[] =
289 /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */
290 {
291 {BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT},
292 {BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT},
293 {BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT},
294 {BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT},
295 {BOARD_DEV_TWSI_SATR, 0x4D, ADDR7_BIT},
296 {BOARD_DEV_TWSI_SATR, 0x4E, ADDR7_BIT},
297 {BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT}
298 };
299
300 MV_BOARD_MAC_INFO db88f6192AInfoBoardMacInfo[] =
301 /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */
302 {
303 {BOARD_MAC_SPEED_AUTO, 0x8},
304 {BOARD_MAC_SPEED_AUTO, 0x9}
305 };
306
307 MV_BOARD_MPP_TYPE_INFO db88f6192AInfoBoardMppTypeInfo[] =
308 /* {{MV_BOARD_MPP_TYPE_CLASS boardMppGroup1,
309 MV_BOARD_MPP_TYPE_CLASS boardMppGroup2}} */
310 {{MV_BOARD_AUTO, MV_BOARD_OTHER}
311 };
312
313 MV_DEV_CS_INFO db88f6192AInfoBoardDeCsInfo[] =
314 /*{deviceCS, params, devType, devWidth}*/
315 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
316 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */
317 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
318 {
319 {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */
320 {1, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */
321 };
322 #else
323 {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */
324 #endif
325
326 MV_BOARD_GPP_INFO db88f6192AInfoBoardGppInfo[] =
327 /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */
328 {
329 {BOARD_GPP_SDIO_WP, 20},
330 {BOARD_GPP_USB_VBUS, 22},
331 {BOARD_GPP_SDIO_DETECT, 23},
332 };
333
334 MV_BOARD_MPP_INFO db88f6192AInfoBoardMppConfigValue[] =
335 {{{
336 DB_88F6192A_MPP0_7,
337 DB_88F6192A_MPP8_15,
338 DB_88F6192A_MPP16_23,
339 DB_88F6192A_MPP24_31,
340 DB_88F6192A_MPP32_35
341 }}};
342
343 MV_BOARD_INFO db88f6192AInfo = {
344 "DB-88F6192A-BP", /* boardName[MAX_BOARD_NAME_LEN] */
345 DB_88F6192A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */
346 db88f6192AInfoBoardMppTypeInfo,
347 DB_88F6192A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
348 db88f6192AInfoBoardMppConfigValue,
349 0, /* intsGppMaskLow */
350 (1 << 3), /* intsGppMaskHigh */
351 DB_88F6192A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
352 db88f6192AInfoBoardDeCsInfo,
353 DB_88F6192A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
354 db88f6192AInfoBoardTwsiDev,
355 DB_88F6192A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
356 db88f6192AInfoBoardMacInfo,
357 DB_88F6192A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
358 db88f6192AInfoBoardGppInfo,
359 DB_88F6192A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
360 NULL,
361 0, /* ledsPolarity */
362 DB_88F6192A_OE_LOW, /* gppOutEnLow */
363 DB_88F6192A_OE_HIGH, /* gppOutEnHigh */
364 DB_88F6192A_OE_VAL_LOW, /* gppOutValLow */
365 DB_88F6192A_OE_VAL_HIGH, /* gppOutValHigh */
366 0, /* gppPolarityValLow */
367 0, /* gppPolarityValHigh */
368 NULL /* pSwitchInfo */
369 };
370
371 #define DB_88F6190A_BOARD_MAC_INFO_NUM 0x1
372
373 MV_BOARD_INFO db88f6190AInfo = {
374 "DB-88F6190A-BP", /* boardName[MAX_BOARD_NAME_LEN] */
375 DB_88F6192A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */
376 db88f6192AInfoBoardMppTypeInfo,
377 DB_88F6192A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
378 db88f6192AInfoBoardMppConfigValue,
379 0, /* intsGppMaskLow */
380 (1 << 3), /* intsGppMaskHigh */
381 DB_88F6192A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
382 db88f6192AInfoBoardDeCsInfo,
383 DB_88F6192A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
384 db88f6192AInfoBoardTwsiDev,
385 DB_88F6190A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
386 db88f6192AInfoBoardMacInfo,
387 DB_88F6192A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
388 db88f6192AInfoBoardGppInfo,
389 DB_88F6192A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
390 NULL,
391 0, /* ledsPolarity */
392 DB_88F6192A_OE_LOW, /* gppOutEnLow */
393 DB_88F6192A_OE_HIGH, /* gppOutEnHigh */
394 DB_88F6192A_OE_VAL_LOW, /* gppOutValLow */
395 DB_88F6192A_OE_VAL_HIGH, /* gppOutValHigh */
396 0, /* gppPolarityValLow */
397 0, /* gppPolarityValHigh */
398 NULL /* pSwitchInfo */
399 };
400
401 #define RD_88F6192A_BOARD_PCI_IF_NUM 0x0
402 #define RD_88F6192A_BOARD_TWSI_DEF_NUM 0x0
403 #define RD_88F6192A_BOARD_MAC_INFO_NUM 0x1
404 #define RD_88F6192A_BOARD_GPP_INFO_NUM 0xE
405 #define RD_88F6192A_BOARD_MPP_GROUP_TYPE_NUM 0x1
406 #define RD_88F6192A_BOARD_MPP_CONFIG_NUM 0x1
407 #define RD_88F6192A_BOARD_DEVICE_CONFIG_NUM 0x1
408 #define RD_88F6192A_BOARD_DEBUG_LED_NUM 0x3
409
410 MV_U8 rd88f6192AInfoBoardDebugLedIf[] =
411 {17, 28, 29};
412
413 MV_BOARD_MAC_INFO rd88f6192AInfoBoardMacInfo[] =
414 /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */
415 {{BOARD_MAC_SPEED_AUTO, 0x8}
416 };
417
418 MV_BOARD_MPP_TYPE_INFO rd88f6192AInfoBoardMppTypeInfo[] =
419 /* {{MV_BOARD_MPP_TYPE_CLASS boardMppGroup1,
420 MV_BOARD_MPP_TYPE_CLASS boardMppGroup2}} */
421 {{MV_BOARD_OTHER, MV_BOARD_OTHER}
422 };
423
424 MV_DEV_CS_INFO rd88f6192AInfoBoardDeCsInfo[] =
425 /*{deviceCS, params, devType, devWidth}*/
426 {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */
427
428 MV_BOARD_GPP_INFO rd88f6192AInfoBoardGppInfo[] =
429 /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */
430 {
431 {BOARD_GPP_USB_VBUS_EN, 10},
432 {BOARD_GPP_USB_HOST_DEVICE, 11},
433 {BOARD_GPP_RESET, 14},
434 {BOARD_GPP_POWER_ON_LED, 15},
435 {BOARD_GPP_HDD_POWER, 16},
436 {BOARD_GPP_WPS_BUTTON, 24},
437 {BOARD_GPP_TS_BUTTON_C, 25},
438 {BOARD_GPP_USB_VBUS, 26},
439 {BOARD_GPP_USB_OC, 27},
440 {BOARD_GPP_TS_BUTTON_U, 30},
441 {BOARD_GPP_TS_BUTTON_R, 31},
442 {BOARD_GPP_TS_BUTTON_L, 32},
443 {BOARD_GPP_TS_BUTTON_D, 34},
444 {BOARD_GPP_FAN_POWER, 35}
445 };
446
447 MV_BOARD_MPP_INFO rd88f6192AInfoBoardMppConfigValue[] =
448 {{{
449 RD_88F6192A_MPP0_7,
450 RD_88F6192A_MPP8_15,
451 RD_88F6192A_MPP16_23,
452 RD_88F6192A_MPP24_31,
453 RD_88F6192A_MPP32_35
454 }}};
455
456 MV_BOARD_INFO rd88f6192AInfo = {
457 "RD-88F6192A-NAS", /* boardName[MAX_BOARD_NAME_LEN] */
458 RD_88F6192A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */
459 rd88f6192AInfoBoardMppTypeInfo,
460 RD_88F6192A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
461 rd88f6192AInfoBoardMppConfigValue,
462 0, /* intsGppMaskLow */
463 (1 << 3), /* intsGppMaskHigh */
464 RD_88F6192A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
465 rd88f6192AInfoBoardDeCsInfo,
466 RD_88F6192A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
467 NULL,
468 RD_88F6192A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
469 rd88f6192AInfoBoardMacInfo,
470 RD_88F6192A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
471 rd88f6192AInfoBoardGppInfo,
472 RD_88F6192A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
473 rd88f6192AInfoBoardDebugLedIf,
474 0, /* ledsPolarity */
475 RD_88F6192A_OE_LOW, /* gppOutEnLow */
476 RD_88F6192A_OE_HIGH, /* gppOutEnHigh */
477 RD_88F6192A_OE_VAL_LOW, /* gppOutValLow */
478 RD_88F6192A_OE_VAL_HIGH, /* gppOutValHigh */
479 0, /* gppPolarityValLow */
480 0, /* gppPolarityValHigh */
481 NULL /* pSwitchInfo */
482 };
483
484 MV_BOARD_INFO rd88f6190AInfo = {
485 "RD-88F6190A-NAS", /* boardName[MAX_BOARD_NAME_LEN] */
486 RD_88F6192A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */
487 rd88f6192AInfoBoardMppTypeInfo,
488 RD_88F6192A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
489 rd88f6192AInfoBoardMppConfigValue,
490 0, /* intsGppMaskLow */
491 (1 << 3), /* intsGppMaskHigh */
492 RD_88F6192A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
493 rd88f6192AInfoBoardDeCsInfo,
494 RD_88F6192A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
495 NULL,
496 RD_88F6192A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
497 rd88f6192AInfoBoardMacInfo,
498 RD_88F6192A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
499 rd88f6192AInfoBoardGppInfo,
500 RD_88F6192A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
501 rd88f6192AInfoBoardDebugLedIf,
502 0, /* ledsPolarity */
503 RD_88F6192A_OE_LOW, /* gppOutEnLow */
504 RD_88F6192A_OE_HIGH, /* gppOutEnHigh */
505 RD_88F6192A_OE_VAL_LOW, /* gppOutValLow */
506 RD_88F6192A_OE_VAL_HIGH, /* gppOutValHigh */
507 0, /* gppPolarityValLow */
508 0, /* gppPolarityValHigh */
509 NULL /* pSwitchInfo */
510 };
511
512 #define DB_88F6180A_BOARD_PCI_IF_NUM 0x0
513 #define DB_88F6180A_BOARD_TWSI_DEF_NUM 0x5
514 #define DB_88F6180A_BOARD_MAC_INFO_NUM 0x1
515 #define DB_88F6180A_BOARD_GPP_INFO_NUM 0x0
516 #define DB_88F6180A_BOARD_MPP_GROUP_TYPE_NUM 0x2
517 #define DB_88F6180A_BOARD_MPP_CONFIG_NUM 0x1
518 #define DB_88F6180A_BOARD_DEVICE_CONFIG_NUM 0x1
519 #define DB_88F6180A_BOARD_DEBUG_LED_NUM 0x0
520
521 MV_BOARD_TWSI_INFO db88f6180AInfoBoardTwsiDev[] =
522 /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */
523 {
524 {BOARD_DEV_TWSI_EXP, 0x20, ADDR7_BIT},
525 {BOARD_DEV_TWSI_EXP, 0x21, ADDR7_BIT},
526 {BOARD_DEV_TWSI_EXP, 0x27, ADDR7_BIT},
527 {BOARD_DEV_TWSI_SATR, 0x4C, ADDR7_BIT},
528 {BOARD_TWSI_AUDIO_DEC, 0x4A, ADDR7_BIT}
529 };
530
531 MV_BOARD_MAC_INFO db88f6180AInfoBoardMacInfo[] =
532 /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */
533 {{BOARD_MAC_SPEED_AUTO, 0x8}
534 };
535
536 MV_BOARD_GPP_INFO db88f6180AInfoBoardGppInfo[] =
537 /* {{MV_BOARD_GPP_CLASS devClass, MV_U8 gppPinNum}} */
538 {
539 /* Muxed with TDM/Audio module via IOexpender
540 {BOARD_GPP_USB_VBUS, 6} */
541 };
542
543 MV_BOARD_MPP_TYPE_INFO db88f6180AInfoBoardMppTypeInfo[] =
544 /* {{MV_BOARD_MPP_TYPE_CLASS boardMppGroup1,
545 MV_BOARD_MPP_TYPE_CLASS boardMppGroup2}} */
546 {{MV_BOARD_OTHER, MV_BOARD_AUTO}
547 };
548
549 MV_DEV_CS_INFO db88f6180AInfoBoardDeCsInfo[] =
550 /*{deviceCS, params, devType, devWidth}*/
551 #if defined(MV_NAND_BOOT)
552 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */
553 #else
554 {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */
555 #endif
556
557 MV_BOARD_MPP_INFO db88f6180AInfoBoardMppConfigValue[] =
558 {{{
559 DB_88F6180A_MPP0_7,
560 DB_88F6180A_MPP8_15,
561 DB_88F6180A_MPP16_23,
562 DB_88F6180A_MPP24_31,
563 DB_88F6180A_MPP32_39,
564 DB_88F6180A_MPP40_44
565 }}};
566
567 MV_BOARD_INFO db88f6180AInfo = {
568 "DB-88F6180A-BP", /* boardName[MAX_BOARD_NAME_LEN] */
569 DB_88F6180A_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */
570 db88f6180AInfoBoardMppTypeInfo,
571 DB_88F6180A_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
572 db88f6180AInfoBoardMppConfigValue,
573 0, /* intsGppMaskLow */
574 0, /* intsGppMaskHigh */
575 DB_88F6180A_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
576 db88f6180AInfoBoardDeCsInfo,
577 DB_88F6180A_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
578 db88f6180AInfoBoardTwsiDev,
579 DB_88F6180A_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
580 db88f6180AInfoBoardMacInfo,
581 DB_88F6180A_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
582 NULL,
583 DB_88F6180A_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
584 NULL,
585 0, /* ledsPolarity */
586 DB_88F6180A_OE_LOW, /* gppOutEnLow */
587 DB_88F6180A_OE_HIGH, /* gppOutEnHigh */
588 DB_88F6180A_OE_VAL_LOW, /* gppOutValLow */
589 DB_88F6180A_OE_VAL_HIGH, /* gppOutValHigh */
590 0, /* gppPolarityValLow */
591 0, /* gppPolarityValHigh */
592 NULL /* pSwitchInfo */
593 };
594
595
596 #define RD_88F6281A_PCAC_BOARD_PCI_IF_NUM 0x0
597 #define RD_88F6281A_PCAC_BOARD_TWSI_DEF_NUM 0x1
598 #define RD_88F6281A_PCAC_BOARD_MAC_INFO_NUM 0x1
599 #define RD_88F6281A_PCAC_BOARD_GPP_INFO_NUM 0x0
600 #define RD_88F6281A_PCAC_BOARD_MPP_GROUP_TYPE_NUM 0x1
601 #define RD_88F6281A_PCAC_BOARD_MPP_CONFIG_NUM 0x1
602 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
603 #define RD_88F6281A_PCAC_BOARD_DEVICE_CONFIG_NUM 0x1
604 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
605 #define RD_88F6281A_PCAC_BOARD_DEVICE_CONFIG_NUM 0x2
606 #else
607 #define RD_88F6281A_PCAC_BOARD_DEVICE_CONFIG_NUM 0x1
608 #endif
609 #define RD_88F6281A_PCAC_BOARD_DEBUG_LED_NUM 0x4
610
611 MV_U8 rd88f6281APcacInfoBoardDebugLedIf[] =
612 {38, 39, 40, 41};
613
614 MV_BOARD_MAC_INFO rd88f6281APcacInfoBoardMacInfo[] =
615 /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */
616 {{BOARD_MAC_SPEED_AUTO, 0x8}
617 };
618
619 MV_BOARD_TWSI_INFO rd88f6281APcacInfoBoardTwsiDev[] =
620 /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */
621 {
622 {BOARD_TWSI_OTHER, 0xa7, ADDR7_BIT}
623 };
624
625 MV_BOARD_MPP_TYPE_INFO rd88f6281APcacInfoBoardMppTypeInfo[] =
626 {{MV_BOARD_OTHER, MV_BOARD_OTHER}
627 };
628
629 MV_DEV_CS_INFO rd88f6281APcacInfoBoardDeCsInfo[] =
630 /*{deviceCS, params, devType, devWidth}*/
631 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
632 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */
633 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
634 {
635 {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */
636 {1, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */
637 };
638 #else
639 {{1, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */
640 #endif
641
642 MV_BOARD_MPP_INFO rd88f6281APcacInfoBoardMppConfigValue[] =
643 {{{
644 RD_88F6281A_PCAC_MPP0_7,
645 RD_88F6281A_PCAC_MPP8_15,
646 RD_88F6281A_PCAC_MPP16_23,
647 RD_88F6281A_PCAC_MPP24_31,
648 RD_88F6281A_PCAC_MPP32_39,
649 RD_88F6281A_PCAC_MPP40_47,
650 RD_88F6281A_PCAC_MPP48_55
651 }}};
652
653 MV_BOARD_INFO rd88f6281APcacInfo = {
654 "RD-88F6281A-PCAC", /* boardName[MAX_BOARD_NAME_LEN] */
655 RD_88F6281A_PCAC_BOARD_MPP_GROUP_TYPE_NUM, /* numBoardMppGroupType */
656 rd88f6281APcacInfoBoardMppTypeInfo,
657 RD_88F6281A_PCAC_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
658 rd88f6281APcacInfoBoardMppConfigValue,
659 0, /* intsGppMaskLow */
660 (1 << 3), /* intsGppMaskHigh */
661 RD_88F6281A_PCAC_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
662 rd88f6281APcacInfoBoardDeCsInfo,
663 RD_88F6281A_PCAC_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
664 rd88f6281APcacInfoBoardTwsiDev,
665 RD_88F6281A_PCAC_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
666 rd88f6281APcacInfoBoardMacInfo,
667 RD_88F6281A_PCAC_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
668 0,
669 RD_88F6281A_PCAC_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
670 NULL,
671 0, /* ledsPolarity */
672 RD_88F6281A_PCAC_OE_LOW, /* gppOutEnLow */
673 RD_88F6281A_PCAC_OE_HIGH, /* gppOutEnHigh */
674 RD_88F6281A_PCAC_OE_VAL_LOW, /* gppOutValLow */
675 RD_88F6281A_PCAC_OE_VAL_HIGH, /* gppOutValHigh */
676 0, /* gppPolarityValLow */
677 0, /* gppPolarityValHigh */
678 NULL /* pSwitchInfo */
679 };
680
681
682 /* 6281 Sheeva Plug*/
683
684 #define SHEEVA_PLUG_BOARD_PCI_IF_NUM 0x0
685 #define SHEEVA_PLUG_BOARD_TWSI_DEF_NUM 0x0
686 #define SHEEVA_PLUG_BOARD_MAC_INFO_NUM 0x1
687 #define SHEEVA_PLUG_BOARD_GPP_INFO_NUM 0x0
688 #define SHEEVA_PLUG_BOARD_MPP_GROUP_TYPE_NUN 0x1
689 #define SHEEVA_PLUG_BOARD_MPP_CONFIG_NUM 0x1
690 #define SHEEVA_PLUG_BOARD_DEVICE_CONFIG_NUM 0x1
691 #define SHEEVA_PLUG_BOARD_DEBUG_LED_NUM 0x1
692
693 MV_U8 sheevaPlugInfoBoardDebugLedIf[] =
694 {49};
695
696 MV_BOARD_MAC_INFO sheevaPlugInfoBoardMacInfo[] =
697 /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */
698 {{BOARD_MAC_SPEED_AUTO, 0x0}};
699
700 MV_BOARD_TWSI_INFO sheevaPlugInfoBoardTwsiDev[] =
701 /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */
702 {{BOARD_TWSI_OTHER, 0x0, ADDR7_BIT}};
703
704 MV_BOARD_MPP_TYPE_INFO sheevaPlugInfoBoardMppTypeInfo[] =
705 {{MV_BOARD_OTHER, MV_BOARD_OTHER}
706 };
707
708 MV_DEV_CS_INFO sheevaPlugInfoBoardDeCsInfo[] =
709 /*{deviceCS, params, devType, devWidth}*/
710 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */
711
712 MV_BOARD_MPP_INFO sheevaPlugInfoBoardMppConfigValue[] =
713 {{{
714 RD_SHEEVA_PLUG_MPP0_7,
715 RD_SHEEVA_PLUG_MPP8_15,
716 RD_SHEEVA_PLUG_MPP16_23,
717 RD_SHEEVA_PLUG_MPP24_31,
718 RD_SHEEVA_PLUG_MPP32_39,
719 RD_SHEEVA_PLUG_MPP40_47,
720 RD_SHEEVA_PLUG_MPP48_55
721 }}};
722
723 MV_BOARD_INFO sheevaPlugInfo = {
724 "SHEEVA PLUG", /* boardName[MAX_BOARD_NAME_LEN] */
725 SHEEVA_PLUG_BOARD_MPP_GROUP_TYPE_NUN, /* numBoardMppGroupType */
726 sheevaPlugInfoBoardMppTypeInfo,
727 SHEEVA_PLUG_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
728 sheevaPlugInfoBoardMppConfigValue,
729 0, /* intsGppMaskLow */
730 0, /* intsGppMaskHigh */
731 SHEEVA_PLUG_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
732 sheevaPlugInfoBoardDeCsInfo,
733 SHEEVA_PLUG_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
734 sheevaPlugInfoBoardTwsiDev,
735 SHEEVA_PLUG_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
736 sheevaPlugInfoBoardMacInfo,
737 SHEEVA_PLUG_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
738 0,
739 SHEEVA_PLUG_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
740 sheevaPlugInfoBoardDebugLedIf,
741 0, /* ledsPolarity */
742 RD_SHEEVA_PLUG_OE_LOW, /* gppOutEnLow */
743 RD_SHEEVA_PLUG_OE_HIGH, /* gppOutEnHigh */
744 RD_SHEEVA_PLUG_OE_VAL_LOW, /* gppOutValLow */
745 RD_SHEEVA_PLUG_OE_VAL_HIGH, /* gppOutValHigh */
746 0, /* gppPolarityValLow */
747 0, /* gppPolarityValHigh */
748 NULL /* pSwitchInfo */
749 };
750
751 /* Customer specific board place holder*/
752
753 #define DB_CUSTOMER_BOARD_PCI_IF_NUM 0x0
754 #define DB_CUSTOMER_BOARD_TWSI_DEF_NUM 0x0
755 #define DB_CUSTOMER_BOARD_MAC_INFO_NUM 0x0
756 #define DB_CUSTOMER_BOARD_GPP_INFO_NUM 0x0
757 #define DB_CUSTOMER_BOARD_MPP_GROUP_TYPE_NUN 0x0
758 #define DB_CUSTOMER_BOARD_MPP_CONFIG_NUM 0x0
759 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
760 #define DB_CUSTOMER_BOARD_DEVICE_CONFIG_NUM 0x0
761 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
762 #define DB_CUSTOMER_BOARD_DEVICE_CONFIG_NUM 0x0
763 #else
764 #define DB_CUSTOMER_BOARD_DEVICE_CONFIG_NUM 0x0
765 #endif
766 #define DB_CUSTOMER_BOARD_DEBUG_LED_NUM 0x0
767
768 MV_U8 dbCustomerInfoBoardDebugLedIf[] =
769 {0};
770
771 MV_BOARD_MAC_INFO dbCustomerInfoBoardMacInfo[] =
772 /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */
773 {{BOARD_MAC_SPEED_AUTO, 0x0}};
774
775 MV_BOARD_TWSI_INFO dbCustomerInfoBoardTwsiDev[] =
776 /* {{MV_BOARD_DEV_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */
777 {{BOARD_TWSI_OTHER, 0x0, ADDR7_BIT}};
778
779 MV_BOARD_MPP_TYPE_INFO dbCustomerInfoBoardMppTypeInfo[] =
780 {{MV_BOARD_OTHER, MV_BOARD_OTHER}
781 };
782
783 MV_DEV_CS_INFO dbCustomerInfoBoardDeCsInfo[] =
784 /*{deviceCS, params, devType, devWidth}*/
785 #if defined(MV_NAND) && defined(MV_NAND_BOOT)
786 {{0, N_A, BOARD_DEV_NAND_FLASH, 8}}; /* NAND DEV */
787 #elif defined(MV_NAND) && defined(MV_SPI_BOOT)
788 {
789 {0, N_A, BOARD_DEV_NAND_FLASH, 8}, /* NAND DEV */
790 {2, N_A, BOARD_DEV_SPI_FLASH, 8}, /* SPI DEV */
791 };
792 #else
793 {{2, N_A, BOARD_DEV_SPI_FLASH, 8}}; /* SPI DEV */
794 #endif
795
796 MV_BOARD_MPP_INFO dbCustomerInfoBoardMppConfigValue[] =
797 {{{
798 DB_CUSTOMER_MPP0_7,
799 DB_CUSTOMER_MPP8_15,
800 DB_CUSTOMER_MPP16_23,
801 DB_CUSTOMER_MPP24_31,
802 DB_CUSTOMER_MPP32_39,
803 DB_CUSTOMER_MPP40_47,
804 DB_CUSTOMER_MPP48_55
805 }}};
806
807 MV_BOARD_INFO dbCustomerInfo = {
808 "DB-CUSTOMER", /* boardName[MAX_BOARD_NAME_LEN] */
809 DB_CUSTOMER_BOARD_MPP_GROUP_TYPE_NUN, /* numBoardMppGroupType */
810 dbCustomerInfoBoardMppTypeInfo,
811 DB_CUSTOMER_BOARD_MPP_CONFIG_NUM, /* numBoardMppConfig */
812 dbCustomerInfoBoardMppConfigValue,
813 0, /* intsGppMaskLow */
814 0, /* intsGppMaskHigh */
815 DB_CUSTOMER_BOARD_DEVICE_CONFIG_NUM, /* numBoardDevIf */
816 dbCustomerInfoBoardDeCsInfo,
817 DB_CUSTOMER_BOARD_TWSI_DEF_NUM, /* numBoardTwsiDev */
818 dbCustomerInfoBoardTwsiDev,
819 DB_CUSTOMER_BOARD_MAC_INFO_NUM, /* numBoardMacInfo */
820 dbCustomerInfoBoardMacInfo,
821 DB_CUSTOMER_BOARD_GPP_INFO_NUM, /* numBoardGppInfo */
822 0,
823 DB_CUSTOMER_BOARD_DEBUG_LED_NUM, /* activeLedsNumber */
824 NULL,
825 0, /* ledsPolarity */
826 DB_CUSTOMER_OE_LOW, /* gppOutEnLow */
827 DB_CUSTOMER_OE_HIGH, /* gppOutEnHigh */
828 DB_CUSTOMER_OE_VAL_LOW, /* gppOutValLow */
829 DB_CUSTOMER_OE_VAL_HIGH, /* gppOutValHigh */
830 0, /* gppPolarityValLow */
831 0, /* gppPolarityValHigh */
832 NULL /* pSwitchInfo */
833 };
834
835 MV_BOARD_INFO* boardInfoTbl[] = {
836 &db88f6281AInfo,
837 &rd88f6281AInfo,
838 &db88f6192AInfo,
839 &rd88f6192AInfo,
840 &db88f6180AInfo,
841 &db88f6190AInfo,
842 &rd88f6190AInfo,
843 &rd88f6281APcacInfo,
844 &dbCustomerInfo,
845 &sheevaPlugInfo
846 };
847
848