kernel: bump 4.9 to 4.9.150
[openwrt/openwrt.git] / target / linux / generic / backport-4.9 / 101-arm-cns3xxx-use-actual-size-reads-for-PCIe.patch
1 From 4cc30de79d293f1e8c5f50ae3a9c005def9564a0 Mon Sep 17 00:00:00 2001
2 From: Koen Vandeputte <koen.vandeputte@ncentric.com>
3 Date: Mon, 7 Jan 2019 14:14:27 +0100
4 Subject: [PATCH 2/2] arm: cns3xxx: use actual size reads for PCIe
5
6 commit 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
7 reimplemented cns3xxx_pci_read_config() using pci_generic_config_read32(),
8 which preserved the property of only doing 32-bit reads.
9
10 It also replaced cns3xxx_pci_write_config() with pci_generic_config_write(),
11 so it changed writes from always being 32 bits to being the actual size,
12 which works just fine.
13
14 Due to:
15 - The documentation does not mention that only 32 bit access is allowed.
16 - Writes are already executed using the actual size
17 - Extensive testing shows that 8b, 16b and 32b reads work as intended
18
19 It makes perfectly sense to also swap 32 bit reading in favor of actual size.
20
21 Fixes: 802b7c06adc7 ("ARM: cns3xxx: Convert PCI to use generic config accessors")
22 Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
23 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
24 CC: Arnd Bergmann <arnd@arndb.de>
25 CC: Krzysztof Halasa <khalasa@piap.pl>
26 CC: Olof Johansson <olof@lixom.net>
27 CC: Robin Leblon <robin.leblon@ncentric.com>
28 CC: Rob Herring <robh@kernel.org>
29 CC: Russell King <linux@armlinux.org.uk>
30 CC: Tim Harvey <tharvey@gateworks.com>
31 CC: stable@vger.kernel.org # v4.0+
32 ---
33 arch/arm/mach-cns3xxx/pcie.c | 2 +-
34 1 file changed, 1 insertion(+), 1 deletion(-)
35
36 --- a/arch/arm/mach-cns3xxx/pcie.c
37 +++ b/arch/arm/mach-cns3xxx/pcie.c
38 @@ -93,7 +93,7 @@ static int cns3xxx_pci_read_config(struc
39 u32 mask = (0x1ull << (size * 8)) - 1;
40 int shift = (where % 4) * 8;
41
42 - ret = pci_generic_config_read32(bus, devfn, where, size, val);
43 + ret = pci_generic_config_read(bus, devfn, where, size, val);
44
45 if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn &&
46 (where & 0xffc) == PCI_CLASS_REVISION)