generic: make all phy drivers kernel 5.0 compatible
[openwrt/openwrt.git] / target / linux / generic / files / drivers / net / phy / adm6996.c
1 /*
2 * ADM6996 switch driver
3 *
4 * swconfig interface based on ar8216.c
5 *
6 * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
7 * VLAN support Copyright (c) 2010, 2011 Peter Lebbing <peter@digitalbrains.com>
8 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
9 * Copyright (c) 2014 Matti Laakso <malaakso@elisanet.fi>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License v2 as published by the
13 * Free Software Foundation
14 */
15
16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
18 /*#define DEBUG 1*/
19 #include <linux/kernel.h>
20 #include <linux/string.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/slab.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/gpio.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/spinlock.h>
32 #include <linux/mm.h>
33 #include <linux/module.h>
34 #include <linux/mii.h>
35 #include <linux/platform_device.h>
36 #include <linux/platform_data/adm6996-gpio.h>
37 #include <linux/ethtool.h>
38 #include <linux/phy.h>
39 #include <linux/switch.h>
40 #include <linux/version.h>
41
42 #include <asm/io.h>
43 #include <asm/irq.h>
44 #include <asm/uaccess.h>
45 #include "adm6996.h"
46
47 MODULE_DESCRIPTION("Infineon ADM6996 Switch");
48 MODULE_AUTHOR("Felix Fietkau, Peter Lebbing <peter@digitalbrains.com>");
49 MODULE_LICENSE("GPL");
50
51 static const char * const adm6996_model_name[] =
52 {
53 NULL,
54 "ADM6996FC",
55 "ADM6996M",
56 "ADM6996L"
57 };
58
59 struct adm6996_mib_desc {
60 unsigned int offset;
61 const char *name;
62 };
63
64 struct adm6996_priv {
65 struct switch_dev dev;
66 void *priv;
67
68 u8 eecs;
69 u8 eesk;
70 u8 eedi;
71
72 enum adm6996_model model;
73
74 bool enable_vlan;
75 bool vlan_enabled; /* Current hardware state */
76
77 #ifdef DEBUG
78 u16 addr; /* Debugging: register address to operate on */
79 #endif
80
81 u16 pvid[ADM_NUM_PORTS]; /* Primary VLAN ID */
82 u8 tagged_ports;
83
84 u16 vlan_id[ADM_NUM_VLANS];
85 u8 vlan_table[ADM_NUM_VLANS]; /* bitmap, 1 = port is member */
86 u8 vlan_tagged[ADM_NUM_VLANS]; /* bitmap, 1 = tagged member */
87
88 struct mutex mib_lock;
89 char buf[2048];
90
91 struct mutex reg_mutex;
92
93 /* use abstraction for regops, we want to add gpio support in the future */
94 u16 (*read)(struct adm6996_priv *priv, enum admreg reg);
95 void (*write)(struct adm6996_priv *priv, enum admreg reg, u16 val);
96 };
97
98 #define to_adm(_dev) container_of(_dev, struct adm6996_priv, dev)
99 #define phy_to_adm(_phy) ((struct adm6996_priv *) (_phy)->priv)
100
101 #define MIB_DESC(_o, _n) \
102 { \
103 .offset = (_o), \
104 .name = (_n), \
105 }
106
107 static const struct adm6996_mib_desc adm6996_mibs[] = {
108 MIB_DESC(ADM_CL0, "RxPacket"),
109 MIB_DESC(ADM_CL6, "RxByte"),
110 MIB_DESC(ADM_CL12, "TxPacket"),
111 MIB_DESC(ADM_CL18, "TxByte"),
112 MIB_DESC(ADM_CL24, "Collision"),
113 MIB_DESC(ADM_CL30, "Error"),
114 };
115
116 #define ADM6996_MIB_RXB_ID 1
117 #define ADM6996_MIB_TXB_ID 3
118
119 static inline u16
120 r16(struct adm6996_priv *priv, enum admreg reg)
121 {
122 return priv->read(priv, reg);
123 }
124
125 static inline void
126 w16(struct adm6996_priv *priv, enum admreg reg, u16 val)
127 {
128 priv->write(priv, reg, val);
129 }
130
131 /* Minimum timing constants */
132 #define EECK_EDGE_TIME 3 /* 3us - max(adm 2.5us, 93c 1us) */
133 #define EEDI_SETUP_TIME 1 /* 1us - max(adm 10ns, 93c 400ns) */
134 #define EECS_SETUP_TIME 1 /* 1us - max(adm no, 93c 200ns) */
135
136 static void adm6996_gpio_write(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
137 {
138 int i, len = (bits + 7) / 8;
139 u8 mask;
140
141 gpio_set_value(priv->eecs, cs);
142 udelay(EECK_EDGE_TIME);
143
144 /* Byte assemble from MSB to LSB */
145 for (i = 0; i < len; i++) {
146 /* Bit bang from MSB to LSB */
147 for (mask = 0x80; mask && bits > 0; mask >>= 1, bits --) {
148 /* Clock low */
149 gpio_set_value(priv->eesk, 0);
150 udelay(EECK_EDGE_TIME);
151
152 /* Output on rising edge */
153 gpio_set_value(priv->eedi, (mask & buf[i]));
154 udelay(EEDI_SETUP_TIME);
155
156 /* Clock high */
157 gpio_set_value(priv->eesk, 1);
158 udelay(EECK_EDGE_TIME);
159 }
160 }
161
162 /* Clock low */
163 gpio_set_value(priv->eesk, 0);
164 udelay(EECK_EDGE_TIME);
165
166 if (cs)
167 gpio_set_value(priv->eecs, 0);
168 }
169
170 static void adm6996_gpio_read(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
171 {
172 int i, len = (bits + 7) / 8;
173 u8 mask;
174
175 gpio_set_value(priv->eecs, cs);
176 udelay(EECK_EDGE_TIME);
177
178 /* Byte assemble from MSB to LSB */
179 for (i = 0; i < len; i++) {
180 u8 byte;
181
182 /* Bit bang from MSB to LSB */
183 for (mask = 0x80, byte = 0; mask && bits > 0; mask >>= 1, bits --) {
184 u8 gp;
185
186 /* Clock low */
187 gpio_set_value(priv->eesk, 0);
188 udelay(EECK_EDGE_TIME);
189
190 /* Input on rising edge */
191 gp = gpio_get_value(priv->eedi);
192 if (gp)
193 byte |= mask;
194
195 /* Clock high */
196 gpio_set_value(priv->eesk, 1);
197 udelay(EECK_EDGE_TIME);
198 }
199
200 *buf++ = byte;
201 }
202
203 /* Clock low */
204 gpio_set_value(priv->eesk, 0);
205 udelay(EECK_EDGE_TIME);
206
207 if (cs)
208 gpio_set_value(priv->eecs, 0);
209 }
210
211 /* Advance clock(s) */
212 static void adm6996_gpio_adclk(struct adm6996_priv *priv, int clocks)
213 {
214 int i;
215 for (i = 0; i < clocks; i++) {
216 /* Clock high */
217 gpio_set_value(priv->eesk, 1);
218 udelay(EECK_EDGE_TIME);
219
220 /* Clock low */
221 gpio_set_value(priv->eesk, 0);
222 udelay(EECK_EDGE_TIME);
223 }
224 }
225
226 static u16
227 adm6996_read_gpio_reg(struct adm6996_priv *priv, enum admreg reg)
228 {
229 /* cmd: 01 10 T DD R RRRRRR */
230 u8 bits[6] = {
231 0xFF, 0xFF, 0xFF, 0xFF,
232 (0x06 << 4) | ((0 & 0x01) << 3 | (reg&64)>>6),
233 ((reg&63)<<2)
234 };
235
236 u8 rbits[4];
237
238 /* Enable GPIO outputs with all pins to 0 */
239 gpio_direction_output(priv->eecs, 0);
240 gpio_direction_output(priv->eesk, 0);
241 gpio_direction_output(priv->eedi, 0);
242
243 adm6996_gpio_write(priv, 0, bits, 46);
244 gpio_direction_input(priv->eedi);
245 adm6996_gpio_adclk(priv, 2);
246 adm6996_gpio_read(priv, 0, rbits, 32);
247
248 /* Extra clock(s) required per datasheet */
249 adm6996_gpio_adclk(priv, 2);
250
251 /* Disable GPIO outputs */
252 gpio_direction_input(priv->eecs);
253 gpio_direction_input(priv->eesk);
254
255 /* EEPROM has 16-bit registers, but pumps out two registers in one request */
256 return (reg & 0x01 ? (rbits[0]<<8) | rbits[1] : (rbits[2]<<8) | (rbits[3]));
257 }
258
259 /* Write chip configuration register */
260 /* Follow 93c66 timing and chip's min EEPROM timing requirement */
261 static void
262 adm6996_write_gpio_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
263 {
264 /* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
265 u8 bits[4] = {
266 (0x05 << 5) | (reg >> 3),
267 (reg << 5) | (u8)(val >> 11),
268 (u8)(val >> 3),
269 (u8)(val << 5)
270 };
271
272 /* Enable GPIO outputs with all pins to 0 */
273 gpio_direction_output(priv->eecs, 0);
274 gpio_direction_output(priv->eesk, 0);
275 gpio_direction_output(priv->eedi, 0);
276
277 /* Write cmd. Total 27 bits */
278 adm6996_gpio_write(priv, 1, bits, 27);
279
280 /* Extra clock(s) required per datasheet */
281 adm6996_gpio_adclk(priv, 2);
282
283 /* Disable GPIO outputs */
284 gpio_direction_input(priv->eecs);
285 gpio_direction_input(priv->eesk);
286 gpio_direction_input(priv->eedi);
287 }
288
289 static u16
290 adm6996_read_mii_reg(struct adm6996_priv *priv, enum admreg reg)
291 {
292 struct phy_device *phydev = priv->priv;
293 struct mii_bus *bus = phydev->mdio.bus;
294
295 return bus->read(bus, PHYADDR(reg));
296 }
297
298 static void
299 adm6996_write_mii_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
300 {
301 struct phy_device *phydev = priv->priv;
302 struct mii_bus *bus = phydev->mdio.bus;
303
304 bus->write(bus, PHYADDR(reg), val);
305 }
306
307 static int
308 adm6996_set_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
309 struct switch_val *val)
310 {
311 struct adm6996_priv *priv = to_adm(dev);
312
313 if (val->value.i > 1)
314 return -EINVAL;
315
316 priv->enable_vlan = val->value.i;
317
318 return 0;
319 };
320
321 static int
322 adm6996_get_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
323 struct switch_val *val)
324 {
325 struct adm6996_priv *priv = to_adm(dev);
326
327 val->value.i = priv->enable_vlan;
328
329 return 0;
330 };
331
332 #ifdef DEBUG
333
334 static int
335 adm6996_set_addr(struct switch_dev *dev, const struct switch_attr *attr,
336 struct switch_val *val)
337 {
338 struct adm6996_priv *priv = to_adm(dev);
339
340 if (val->value.i > 1023)
341 return -EINVAL;
342
343 priv->addr = val->value.i;
344
345 return 0;
346 };
347
348 static int
349 adm6996_get_addr(struct switch_dev *dev, const struct switch_attr *attr,
350 struct switch_val *val)
351 {
352 struct adm6996_priv *priv = to_adm(dev);
353
354 val->value.i = priv->addr;
355
356 return 0;
357 };
358
359 static int
360 adm6996_set_data(struct switch_dev *dev, const struct switch_attr *attr,
361 struct switch_val *val)
362 {
363 struct adm6996_priv *priv = to_adm(dev);
364
365 if (val->value.i > 65535)
366 return -EINVAL;
367
368 w16(priv, priv->addr, val->value.i);
369
370 return 0;
371 };
372
373 static int
374 adm6996_get_data(struct switch_dev *dev, const struct switch_attr *attr,
375 struct switch_val *val)
376 {
377 struct adm6996_priv *priv = to_adm(dev);
378
379 val->value.i = r16(priv, priv->addr);
380
381 return 0;
382 };
383
384 #endif /* def DEBUG */
385
386 static int
387 adm6996_set_pvid(struct switch_dev *dev, int port, int vlan)
388 {
389 struct adm6996_priv *priv = to_adm(dev);
390
391 pr_devel("set_pvid port %d vlan %d\n", port, vlan);
392
393 if (vlan > ADM_VLAN_MAX_ID)
394 return -EINVAL;
395
396 priv->pvid[port] = vlan;
397
398 return 0;
399 }
400
401 static int
402 adm6996_get_pvid(struct switch_dev *dev, int port, int *vlan)
403 {
404 struct adm6996_priv *priv = to_adm(dev);
405
406 pr_devel("get_pvid port %d\n", port);
407 *vlan = priv->pvid[port];
408
409 return 0;
410 }
411
412 static int
413 adm6996_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
414 struct switch_val *val)
415 {
416 struct adm6996_priv *priv = to_adm(dev);
417
418 pr_devel("set_vid port %d vid %d\n", val->port_vlan, val->value.i);
419
420 if (val->value.i > ADM_VLAN_MAX_ID)
421 return -EINVAL;
422
423 priv->vlan_id[val->port_vlan] = val->value.i;
424
425 return 0;
426 };
427
428 static int
429 adm6996_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
430 struct switch_val *val)
431 {
432 struct adm6996_priv *priv = to_adm(dev);
433
434 pr_devel("get_vid port %d\n", val->port_vlan);
435
436 val->value.i = priv->vlan_id[val->port_vlan];
437
438 return 0;
439 };
440
441 static int
442 adm6996_get_ports(struct switch_dev *dev, struct switch_val *val)
443 {
444 struct adm6996_priv *priv = to_adm(dev);
445 u8 ports = priv->vlan_table[val->port_vlan];
446 u8 tagged = priv->vlan_tagged[val->port_vlan];
447 int i;
448
449 pr_devel("get_ports port_vlan %d\n", val->port_vlan);
450
451 val->len = 0;
452
453 for (i = 0; i < ADM_NUM_PORTS; i++) {
454 struct switch_port *p;
455
456 if (!(ports & (1 << i)))
457 continue;
458
459 p = &val->value.ports[val->len++];
460 p->id = i;
461 if (tagged & (1 << i))
462 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
463 else
464 p->flags = 0;
465 }
466
467 return 0;
468 };
469
470 static int
471 adm6996_set_ports(struct switch_dev *dev, struct switch_val *val)
472 {
473 struct adm6996_priv *priv = to_adm(dev);
474 u8 *ports = &priv->vlan_table[val->port_vlan];
475 u8 *tagged = &priv->vlan_tagged[val->port_vlan];
476 int i;
477
478 pr_devel("set_ports port_vlan %d ports", val->port_vlan);
479
480 *ports = 0;
481 *tagged = 0;
482
483 for (i = 0; i < val->len; i++) {
484 struct switch_port *p = &val->value.ports[i];
485
486 #ifdef DEBUG
487 pr_cont(" %d%s", p->id,
488 ((p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) ? "T" :
489 ""));
490 #endif
491
492 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
493 *tagged |= (1 << p->id);
494 priv->tagged_ports |= (1 << p->id);
495 }
496
497 *ports |= (1 << p->id);
498 }
499
500 #ifdef DEBUG
501 pr_cont("\n");
502 #endif
503
504 return 0;
505 };
506
507 /*
508 * Precondition: reg_mutex must be held
509 */
510 static void
511 adm6996_enable_vlan(struct adm6996_priv *priv)
512 {
513 u16 reg;
514
515 reg = r16(priv, ADM_OTBE_P2_PVID);
516 reg &= ~(ADM_OTBE_MASK);
517 w16(priv, ADM_OTBE_P2_PVID, reg);
518 reg = r16(priv, ADM_IFNTE);
519 reg &= ~(ADM_IFNTE_MASK);
520 w16(priv, ADM_IFNTE, reg);
521 reg = r16(priv, ADM_VID_CHECK);
522 reg |= ADM_VID_CHECK_MASK;
523 w16(priv, ADM_VID_CHECK, reg);
524 reg = r16(priv, ADM_SYSC0);
525 reg |= ADM_NTTE;
526 reg &= ~(ADM_RVID1);
527 w16(priv, ADM_SYSC0, reg);
528 reg = r16(priv, ADM_SYSC3);
529 reg |= ADM_TBV;
530 w16(priv, ADM_SYSC3, reg);
531 }
532
533 static void
534 adm6996_enable_vlan_6996l(struct adm6996_priv *priv)
535 {
536 u16 reg;
537
538 reg = r16(priv, ADM_SYSC3);
539 reg |= ADM_TBV;
540 reg |= ADM_MAC_CLONE;
541 w16(priv, ADM_SYSC3, reg);
542 }
543
544 /*
545 * Disable VLANs
546 *
547 * Sets VLAN mapping for port-based VLAN with all ports connected to
548 * eachother (this is also the power-on default).
549 *
550 * Precondition: reg_mutex must be held
551 */
552 static void
553 adm6996_disable_vlan(struct adm6996_priv *priv)
554 {
555 u16 reg;
556 int i;
557
558 for (i = 0; i < ADM_NUM_VLANS; i++) {
559 reg = ADM_VLAN_FILT_MEMBER_MASK;
560 w16(priv, ADM_VLAN_FILT_L(i), reg);
561 reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(1);
562 w16(priv, ADM_VLAN_FILT_H(i), reg);
563 }
564
565 reg = r16(priv, ADM_OTBE_P2_PVID);
566 reg |= ADM_OTBE_MASK;
567 w16(priv, ADM_OTBE_P2_PVID, reg);
568 reg = r16(priv, ADM_IFNTE);
569 reg |= ADM_IFNTE_MASK;
570 w16(priv, ADM_IFNTE, reg);
571 reg = r16(priv, ADM_VID_CHECK);
572 reg &= ~(ADM_VID_CHECK_MASK);
573 w16(priv, ADM_VID_CHECK, reg);
574 reg = r16(priv, ADM_SYSC0);
575 reg &= ~(ADM_NTTE);
576 reg |= ADM_RVID1;
577 w16(priv, ADM_SYSC0, reg);
578 reg = r16(priv, ADM_SYSC3);
579 reg &= ~(ADM_TBV);
580 w16(priv, ADM_SYSC3, reg);
581 }
582
583 /*
584 * Disable VLANs
585 *
586 * Sets VLAN mapping for port-based VLAN with all ports connected to
587 * eachother (this is also the power-on default).
588 *
589 * Precondition: reg_mutex must be held
590 */
591 static void
592 adm6996_disable_vlan_6996l(struct adm6996_priv *priv)
593 {
594 u16 reg;
595 int i;
596
597 for (i = 0; i < ADM_NUM_VLANS; i++) {
598 w16(priv, ADM_VLAN_MAP(i), 0);
599 }
600
601 reg = r16(priv, ADM_SYSC3);
602 reg &= ~(ADM_TBV);
603 reg &= ~(ADM_MAC_CLONE);
604 w16(priv, ADM_SYSC3, reg);
605 }
606
607 /*
608 * Precondition: reg_mutex must be held
609 */
610 static void
611 adm6996_apply_port_pvids(struct adm6996_priv *priv)
612 {
613 u16 reg;
614 int i;
615
616 for (i = 0; i < ADM_NUM_PORTS; i++) {
617 reg = r16(priv, adm_portcfg[i]);
618 reg &= ~(ADM_PORTCFG_PVID_MASK);
619 reg |= ADM_PORTCFG_PVID(priv->pvid[i]);
620 if (priv->model == ADM6996L) {
621 if (priv->tagged_ports & (1 << i))
622 reg |= (1 << 4);
623 else
624 reg &= ~(1 << 4);
625 }
626 w16(priv, adm_portcfg[i], reg);
627 }
628
629 w16(priv, ADM_P0_PVID, ADM_P0_PVID_VAL(priv->pvid[0]));
630 w16(priv, ADM_P1_PVID, ADM_P1_PVID_VAL(priv->pvid[1]));
631 reg = r16(priv, ADM_OTBE_P2_PVID);
632 reg &= ~(ADM_P2_PVID_MASK);
633 reg |= ADM_P2_PVID_VAL(priv->pvid[2]);
634 w16(priv, ADM_OTBE_P2_PVID, reg);
635 reg = ADM_P3_PVID_VAL(priv->pvid[3]);
636 reg |= ADM_P4_PVID_VAL(priv->pvid[4]);
637 w16(priv, ADM_P3_P4_PVID, reg);
638 reg = r16(priv, ADM_P5_PVID);
639 reg &= ~(ADM_P2_PVID_MASK);
640 reg |= ADM_P5_PVID_VAL(priv->pvid[5]);
641 w16(priv, ADM_P5_PVID, reg);
642 }
643
644 /*
645 * Precondition: reg_mutex must be held
646 */
647 static void
648 adm6996_apply_vlan_filters(struct adm6996_priv *priv)
649 {
650 u8 ports, tagged;
651 u16 vid, reg;
652 int i;
653
654 for (i = 0; i < ADM_NUM_VLANS; i++) {
655 vid = priv->vlan_id[i];
656 ports = priv->vlan_table[i];
657 tagged = priv->vlan_tagged[i];
658
659 if (ports == 0) {
660 /* Disable VLAN entry */
661 w16(priv, ADM_VLAN_FILT_H(i), 0);
662 w16(priv, ADM_VLAN_FILT_L(i), 0);
663 continue;
664 }
665
666 reg = ADM_VLAN_FILT_MEMBER(ports);
667 reg |= ADM_VLAN_FILT_TAGGED(tagged);
668 w16(priv, ADM_VLAN_FILT_L(i), reg);
669 reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(vid);
670 w16(priv, ADM_VLAN_FILT_H(i), reg);
671 }
672 }
673
674 static void
675 adm6996_apply_vlan_filters_6996l(struct adm6996_priv *priv)
676 {
677 u8 ports;
678 u16 reg;
679 int i;
680
681 for (i = 0; i < ADM_NUM_VLANS; i++) {
682 ports = priv->vlan_table[i];
683
684 if (ports == 0) {
685 /* Disable VLAN entry */
686 w16(priv, ADM_VLAN_MAP(i), 0);
687 continue;
688 } else {
689 reg = ADM_VLAN_FILT(ports);
690 w16(priv, ADM_VLAN_MAP(i), reg);
691 }
692 }
693 }
694
695 static int
696 adm6996_hw_apply(struct switch_dev *dev)
697 {
698 struct adm6996_priv *priv = to_adm(dev);
699
700 pr_devel("hw_apply\n");
701
702 mutex_lock(&priv->reg_mutex);
703
704 if (!priv->enable_vlan) {
705 if (priv->vlan_enabled) {
706 if (priv->model == ADM6996L)
707 adm6996_disable_vlan_6996l(priv);
708 else
709 adm6996_disable_vlan(priv);
710 priv->vlan_enabled = 0;
711 }
712 goto out;
713 }
714
715 if (!priv->vlan_enabled) {
716 if (priv->model == ADM6996L)
717 adm6996_enable_vlan_6996l(priv);
718 else
719 adm6996_enable_vlan(priv);
720 priv->vlan_enabled = 1;
721 }
722
723 adm6996_apply_port_pvids(priv);
724 if (priv->model == ADM6996L)
725 adm6996_apply_vlan_filters_6996l(priv);
726 else
727 adm6996_apply_vlan_filters(priv);
728
729 out:
730 mutex_unlock(&priv->reg_mutex);
731
732 return 0;
733 }
734
735 /*
736 * Reset the switch
737 *
738 * The ADM6996 can't do a software-initiated reset, so we just initialise the
739 * registers we support in this driver.
740 *
741 * Precondition: reg_mutex must be held
742 */
743 static void
744 adm6996_perform_reset (struct adm6996_priv *priv)
745 {
746 int i;
747
748 /* initialize port and vlan settings */
749 for (i = 0; i < ADM_NUM_PORTS - 1; i++) {
750 w16(priv, adm_portcfg[i], ADM_PORTCFG_INIT |
751 ADM_PORTCFG_PVID(0));
752 }
753 w16(priv, adm_portcfg[5], ADM_PORTCFG_CPU);
754
755 if (priv->model == ADM6996M || priv->model == ADM6996FC) {
756 /* reset all PHY ports */
757 for (i = 0; i < ADM_PHY_PORTS; i++) {
758 w16(priv, ADM_PHY_PORT(i), ADM_PHYCFG_INIT);
759 }
760 }
761
762 priv->enable_vlan = 0;
763 priv->vlan_enabled = 0;
764
765 for (i = 0; i < ADM_NUM_PORTS; i++) {
766 priv->pvid[i] = 0;
767 }
768
769 for (i = 0; i < ADM_NUM_VLANS; i++) {
770 priv->vlan_id[i] = i;
771 priv->vlan_table[i] = 0;
772 priv->vlan_tagged[i] = 0;
773 }
774
775 if (priv->model == ADM6996M) {
776 /* Clear VLAN priority map so prio's are unused */
777 w16 (priv, ADM_VLAN_PRIOMAP, 0);
778
779 adm6996_disable_vlan(priv);
780 adm6996_apply_port_pvids(priv);
781 } else if (priv->model == ADM6996L) {
782 /* Clear VLAN priority map so prio's are unused */
783 w16 (priv, ADM_VLAN_PRIOMAP, 0);
784
785 adm6996_disable_vlan_6996l(priv);
786 adm6996_apply_port_pvids(priv);
787 }
788 }
789
790 static int
791 adm6996_reset_switch(struct switch_dev *dev)
792 {
793 struct adm6996_priv *priv = to_adm(dev);
794
795 pr_devel("reset\n");
796
797 mutex_lock(&priv->reg_mutex);
798 adm6996_perform_reset (priv);
799 mutex_unlock(&priv->reg_mutex);
800 return 0;
801 }
802
803 static int
804 adm6996_get_port_link(struct switch_dev *dev, int port,
805 struct switch_port_link *link)
806 {
807 struct adm6996_priv *priv = to_adm(dev);
808
809 u16 reg = 0;
810
811 if (port >= ADM_NUM_PORTS)
812 return -EINVAL;
813
814 switch (port) {
815 case 0:
816 reg = r16(priv, ADM_PS0);
817 break;
818 case 1:
819 reg = r16(priv, ADM_PS0);
820 reg = reg >> 8;
821 break;
822 case 2:
823 reg = r16(priv, ADM_PS1);
824 break;
825 case 3:
826 reg = r16(priv, ADM_PS1);
827 reg = reg >> 8;
828 break;
829 case 4:
830 reg = r16(priv, ADM_PS1);
831 reg = reg >> 12;
832 break;
833 case 5:
834 reg = r16(priv, ADM_PS2);
835 /* Bits 0, 1, 3 and 4. */
836 reg = (reg & 3) | ((reg & 24) >> 1);
837 break;
838 default:
839 return -EINVAL;
840 }
841
842 link->link = reg & ADM_PS_LS;
843 if (!link->link)
844 return 0;
845 link->aneg = true;
846 link->duplex = reg & ADM_PS_DS;
847 link->tx_flow = reg & ADM_PS_FCS;
848 link->rx_flow = reg & ADM_PS_FCS;
849 if (reg & ADM_PS_SS)
850 link->speed = SWITCH_PORT_SPEED_100;
851 else
852 link->speed = SWITCH_PORT_SPEED_10;
853
854 return 0;
855 }
856
857 static int
858 adm6996_sw_get_port_mib(struct switch_dev *dev,
859 const struct switch_attr *attr,
860 struct switch_val *val)
861 {
862 struct adm6996_priv *priv = to_adm(dev);
863 int port;
864 char *buf = priv->buf;
865 int i, len = 0;
866 u32 reg = 0;
867
868 port = val->port_vlan;
869 if (port >= ADM_NUM_PORTS)
870 return -EINVAL;
871
872 mutex_lock(&priv->mib_lock);
873
874 len += snprintf(buf + len, sizeof(priv->buf) - len,
875 "Port %d MIB counters\n",
876 port);
877
878 for (i = 0; i < ARRAY_SIZE(adm6996_mibs); i++) {
879 reg = r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port));
880 reg += r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port) + 1) << 16;
881 len += snprintf(buf + len, sizeof(priv->buf) - len,
882 "%-12s: %u\n",
883 adm6996_mibs[i].name,
884 reg);
885 }
886
887 mutex_unlock(&priv->mib_lock);
888
889 val->value.s = buf;
890 val->len = len;
891
892 return 0;
893 }
894
895 static int
896 adm6996_get_port_stats(struct switch_dev *dev, int port,
897 struct switch_port_stats *stats)
898 {
899 struct adm6996_priv *priv = to_adm(dev);
900 int id;
901 u32 reg = 0;
902
903 if (port >= ADM_NUM_PORTS)
904 return -EINVAL;
905
906 mutex_lock(&priv->mib_lock);
907
908 id = ADM6996_MIB_TXB_ID;
909 reg = r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port));
910 reg += r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port) + 1) << 16;
911 stats->tx_bytes = reg;
912
913 id = ADM6996_MIB_RXB_ID;
914 reg = r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port));
915 reg += r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port) + 1) << 16;
916 stats->rx_bytes = reg;
917
918 mutex_unlock(&priv->mib_lock);
919
920 return 0;
921 }
922
923 static struct switch_attr adm6996_globals[] = {
924 {
925 .type = SWITCH_TYPE_INT,
926 .name = "enable_vlan",
927 .description = "Enable VLANs",
928 .set = adm6996_set_enable_vlan,
929 .get = adm6996_get_enable_vlan,
930 },
931 #ifdef DEBUG
932 {
933 .type = SWITCH_TYPE_INT,
934 .name = "addr",
935 .description =
936 "Direct register access: set register address (0 - 1023)",
937 .set = adm6996_set_addr,
938 .get = adm6996_get_addr,
939 },
940 {
941 .type = SWITCH_TYPE_INT,
942 .name = "data",
943 .description =
944 "Direct register access: read/write to register (0 - 65535)",
945 .set = adm6996_set_data,
946 .get = adm6996_get_data,
947 },
948 #endif /* def DEBUG */
949 };
950
951 static struct switch_attr adm6996_port[] = {
952 {
953 .type = SWITCH_TYPE_STRING,
954 .name = "mib",
955 .description = "Get port's MIB counters",
956 .set = NULL,
957 .get = adm6996_sw_get_port_mib,
958 },
959 };
960
961 static struct switch_attr adm6996_vlan[] = {
962 {
963 .type = SWITCH_TYPE_INT,
964 .name = "vid",
965 .description = "VLAN ID",
966 .set = adm6996_set_vid,
967 .get = adm6996_get_vid,
968 },
969 };
970
971 static struct switch_dev_ops adm6996_ops = {
972 .attr_global = {
973 .attr = adm6996_globals,
974 .n_attr = ARRAY_SIZE(adm6996_globals),
975 },
976 .attr_port = {
977 .attr = adm6996_port,
978 .n_attr = ARRAY_SIZE(adm6996_port),
979 },
980 .attr_vlan = {
981 .attr = adm6996_vlan,
982 .n_attr = ARRAY_SIZE(adm6996_vlan),
983 },
984 .get_port_pvid = adm6996_get_pvid,
985 .set_port_pvid = adm6996_set_pvid,
986 .get_vlan_ports = adm6996_get_ports,
987 .set_vlan_ports = adm6996_set_ports,
988 .apply_config = adm6996_hw_apply,
989 .reset_switch = adm6996_reset_switch,
990 .get_port_link = adm6996_get_port_link,
991 .get_port_stats = adm6996_get_port_stats,
992 };
993
994 static int adm6996_switch_init(struct adm6996_priv *priv, const char *alias, struct net_device *netdev)
995 {
996 struct switch_dev *swdev;
997 u16 test, old;
998
999 if (!priv->model) {
1000 /* Detect type of chip */
1001 old = r16(priv, ADM_VID_CHECK);
1002 test = old ^ (1 << 12);
1003 w16(priv, ADM_VID_CHECK, test);
1004 test ^= r16(priv, ADM_VID_CHECK);
1005 if (test & (1 << 12)) {
1006 /*
1007 * Bit 12 of this register is read-only.
1008 * This is the FC model.
1009 */
1010 priv->model = ADM6996FC;
1011 } else {
1012 /* Bit 12 is read-write. This is the M model. */
1013 priv->model = ADM6996M;
1014 w16(priv, ADM_VID_CHECK, old);
1015 }
1016 }
1017
1018 swdev = &priv->dev;
1019 swdev->name = (adm6996_model_name[priv->model]);
1020 swdev->cpu_port = ADM_CPU_PORT;
1021 swdev->ports = ADM_NUM_PORTS;
1022 swdev->vlans = ADM_NUM_VLANS;
1023 swdev->ops = &adm6996_ops;
1024 swdev->alias = alias;
1025
1026 /* The ADM6996L connected through GPIOs does not support any switch
1027 status calls */
1028 if (priv->model == ADM6996L) {
1029 adm6996_ops.attr_port.n_attr = 0;
1030 adm6996_ops.get_port_link = NULL;
1031 }
1032
1033 pr_info ("%s: %s model PHY found.\n", alias, swdev->name);
1034
1035 mutex_lock(&priv->reg_mutex);
1036 adm6996_perform_reset (priv);
1037 mutex_unlock(&priv->reg_mutex);
1038
1039 if (priv->model == ADM6996M || priv->model == ADM6996L) {
1040 return register_switch(swdev, netdev);
1041 }
1042
1043 return -ENODEV;
1044 }
1045
1046 static int adm6996_config_init(struct phy_device *pdev)
1047 {
1048 struct adm6996_priv *priv;
1049 int ret;
1050
1051 #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)
1052 linkmode_zero(pdev->supported);
1053 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, pdev->supported);
1054 linkmode_copy(pdev->advertising, pdev->supported);
1055 #else
1056 pdev->supported = ADVERTISED_100baseT_Full;
1057 pdev->advertising = ADVERTISED_100baseT_Full;
1058 #endif
1059
1060 if (pdev->mdio.addr != 0) {
1061 pr_info ("%s: PHY overlaps ADM6996, providing fixed PHY 0x%x.\n"
1062 , pdev->attached_dev->name, pdev->mdio.addr);
1063 return 0;
1064 }
1065
1066 priv = devm_kzalloc(&pdev->mdio.dev, sizeof(struct adm6996_priv), GFP_KERNEL);
1067 if (!priv)
1068 return -ENOMEM;
1069
1070 mutex_init(&priv->reg_mutex);
1071 mutex_init(&priv->mib_lock);
1072 priv->priv = pdev;
1073 priv->read = adm6996_read_mii_reg;
1074 priv->write = adm6996_write_mii_reg;
1075
1076 ret = adm6996_switch_init(priv, pdev->attached_dev->name, pdev->attached_dev);
1077 if (ret < 0)
1078 return ret;
1079
1080 pdev->priv = priv;
1081
1082 return 0;
1083 }
1084
1085 /*
1086 * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
1087 */
1088 static int adm6996_read_status(struct phy_device *phydev)
1089 {
1090 phydev->speed = SPEED_100;
1091 phydev->duplex = DUPLEX_FULL;
1092 phydev->link = 1;
1093
1094 phydev->state = PHY_RUNNING;
1095 netif_carrier_on(phydev->attached_dev);
1096 phydev->adjust_link(phydev->attached_dev);
1097
1098 return 0;
1099 }
1100
1101 /*
1102 * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
1103 */
1104 static int adm6996_config_aneg(struct phy_device *phydev)
1105 {
1106 return 0;
1107 }
1108
1109 static int adm6996_fixup(struct phy_device *dev)
1110 {
1111 struct mii_bus *bus = dev->mdio.bus;
1112 u16 reg;
1113
1114 /* Our custom registers are at PHY addresses 0-10. Claim those. */
1115 if (dev->mdio.addr > 10)
1116 return 0;
1117
1118 /* look for the switch on the bus */
1119 reg = bus->read(bus, PHYADDR(ADM_SIG0)) & ADM_SIG0_MASK;
1120 if (reg != ADM_SIG0_VAL)
1121 return 0;
1122
1123 reg = bus->read(bus, PHYADDR(ADM_SIG1)) & ADM_SIG1_MASK;
1124 if (reg != ADM_SIG1_VAL)
1125 return 0;
1126
1127 dev->phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL;
1128
1129 return 0;
1130 }
1131
1132 static int adm6996_probe(struct phy_device *pdev)
1133 {
1134 return 0;
1135 }
1136
1137 static void adm6996_remove(struct phy_device *pdev)
1138 {
1139 struct adm6996_priv *priv = phy_to_adm(pdev);
1140
1141 if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
1142 unregister_switch(&priv->dev);
1143 }
1144
1145 static int adm6996_soft_reset(struct phy_device *phydev)
1146 {
1147 /* we don't need an extra reset */
1148 return 0;
1149 }
1150
1151 static struct phy_driver adm6996_phy_driver = {
1152 .name = "Infineon ADM6996",
1153 .phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL,
1154 .phy_id_mask = 0xffffffff,
1155 .features = PHY_BASIC_FEATURES,
1156 .probe = adm6996_probe,
1157 .remove = adm6996_remove,
1158 .config_init = &adm6996_config_init,
1159 .config_aneg = &adm6996_config_aneg,
1160 .read_status = &adm6996_read_status,
1161 .soft_reset = adm6996_soft_reset,
1162 };
1163
1164 static int adm6996_gpio_probe(struct platform_device *pdev)
1165 {
1166 struct adm6996_gpio_platform_data *pdata = pdev->dev.platform_data;
1167 struct adm6996_priv *priv;
1168 int ret;
1169
1170 if (!pdata)
1171 return -EINVAL;
1172
1173 priv = devm_kzalloc(&pdev->dev, sizeof(struct adm6996_priv), GFP_KERNEL);
1174 if (!priv)
1175 return -ENOMEM;
1176
1177 mutex_init(&priv->reg_mutex);
1178 mutex_init(&priv->mib_lock);
1179
1180 priv->eecs = pdata->eecs;
1181 priv->eedi = pdata->eedi;
1182 priv->eesk = pdata->eesk;
1183
1184 priv->model = pdata->model;
1185 priv->read = adm6996_read_gpio_reg;
1186 priv->write = adm6996_write_gpio_reg;
1187
1188 ret = devm_gpio_request(&pdev->dev, priv->eecs, "adm_eecs");
1189 if (ret)
1190 return ret;
1191 ret = devm_gpio_request(&pdev->dev, priv->eedi, "adm_eedi");
1192 if (ret)
1193 return ret;
1194 ret = devm_gpio_request(&pdev->dev, priv->eesk, "adm_eesk");
1195 if (ret)
1196 return ret;
1197
1198 ret = adm6996_switch_init(priv, dev_name(&pdev->dev), NULL);
1199 if (ret < 0)
1200 return ret;
1201
1202 platform_set_drvdata(pdev, priv);
1203
1204 return 0;
1205 }
1206
1207 static int adm6996_gpio_remove(struct platform_device *pdev)
1208 {
1209 struct adm6996_priv *priv = platform_get_drvdata(pdev);
1210
1211 if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
1212 unregister_switch(&priv->dev);
1213
1214 return 0;
1215 }
1216
1217 static struct platform_driver adm6996_gpio_driver = {
1218 .probe = adm6996_gpio_probe,
1219 .remove = adm6996_gpio_remove,
1220 .driver = {
1221 .name = "adm6996_gpio",
1222 },
1223 };
1224
1225 static int __init adm6996_init(void)
1226 {
1227 int err;
1228
1229 phy_register_fixup_for_id(PHY_ANY_ID, adm6996_fixup);
1230 err = phy_driver_register(&adm6996_phy_driver, THIS_MODULE);
1231 if (err)
1232 return err;
1233
1234 err = platform_driver_register(&adm6996_gpio_driver);
1235 if (err)
1236 phy_driver_unregister(&adm6996_phy_driver);
1237
1238 return err;
1239 }
1240
1241 static void __exit adm6996_exit(void)
1242 {
1243 platform_driver_unregister(&adm6996_gpio_driver);
1244 phy_driver_unregister(&adm6996_phy_driver);
1245 }
1246
1247 module_init(adm6996_init);
1248 module_exit(adm6996_exit);