d9ea828929380eb67d54c6fe2ed415c44f9e4801
[openwrt/openwrt.git] / target / linux / generic / files / drivers / net / phy / adm6996.c
1 /*
2 * ADM6996 switch driver
3 *
4 * swconfig interface based on ar8216.c
5 *
6 * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
7 * VLAN support Copyright (c) 2010, 2011 Peter Lebbing <peter@digitalbrains.com>
8 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
9 * Copyright (c) 2014 Matti Laakso <malaakso@elisanet.fi>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License v2 as published by the
13 * Free Software Foundation
14 */
15
16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
18 /*#define DEBUG 1*/
19 #include <linux/kernel.h>
20 #include <linux/string.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/slab.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/gpio.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/spinlock.h>
32 #include <linux/mm.h>
33 #include <linux/module.h>
34 #include <linux/mii.h>
35 #include <linux/platform_device.h>
36 #include <linux/platform_data/adm6996-gpio.h>
37 #include <linux/ethtool.h>
38 #include <linux/phy.h>
39 #include <linux/switch.h>
40
41 #include <asm/io.h>
42 #include <asm/irq.h>
43 #include <asm/uaccess.h>
44 #include "adm6996.h"
45
46 MODULE_DESCRIPTION("Infineon ADM6996 Switch");
47 MODULE_AUTHOR("Felix Fietkau, Peter Lebbing <peter@digitalbrains.com>");
48 MODULE_LICENSE("GPL");
49
50 static const char * const adm6996_model_name[] =
51 {
52 NULL,
53 "ADM6996FC",
54 "ADM6996M",
55 "ADM6996L"
56 };
57
58 struct adm6996_mib_desc {
59 unsigned int offset;
60 const char *name;
61 };
62
63 struct adm6996_priv {
64 struct switch_dev dev;
65 void *priv;
66
67 u8 eecs;
68 u8 eesk;
69 u8 eedi;
70
71 enum adm6996_model model;
72
73 bool enable_vlan;
74 bool vlan_enabled; /* Current hardware state */
75
76 #ifdef DEBUG
77 u16 addr; /* Debugging: register address to operate on */
78 #endif
79
80 u16 pvid[ADM_NUM_PORTS]; /* Primary VLAN ID */
81 u8 tagged_ports;
82
83 u16 vlan_id[ADM_NUM_VLANS];
84 u8 vlan_table[ADM_NUM_VLANS]; /* bitmap, 1 = port is member */
85 u8 vlan_tagged[ADM_NUM_VLANS]; /* bitmap, 1 = tagged member */
86
87 struct mutex mib_lock;
88 char buf[2048];
89
90 struct mutex reg_mutex;
91
92 /* use abstraction for regops, we want to add gpio support in the future */
93 u16 (*read)(struct adm6996_priv *priv, enum admreg reg);
94 void (*write)(struct adm6996_priv *priv, enum admreg reg, u16 val);
95 };
96
97 #define to_adm(_dev) container_of(_dev, struct adm6996_priv, dev)
98 #define phy_to_adm(_phy) ((struct adm6996_priv *) (_phy)->priv)
99
100 #define MIB_DESC(_o, _n) \
101 { \
102 .offset = (_o), \
103 .name = (_n), \
104 }
105
106 static const struct adm6996_mib_desc adm6996_mibs[] = {
107 MIB_DESC(ADM_CL0, "RxPacket"),
108 MIB_DESC(ADM_CL6, "RxByte"),
109 MIB_DESC(ADM_CL12, "TxPacket"),
110 MIB_DESC(ADM_CL18, "TxByte"),
111 MIB_DESC(ADM_CL24, "Collision"),
112 MIB_DESC(ADM_CL30, "Error"),
113 };
114
115 static inline u16
116 r16(struct adm6996_priv *priv, enum admreg reg)
117 {
118 return priv->read(priv, reg);
119 }
120
121 static inline void
122 w16(struct adm6996_priv *priv, enum admreg reg, u16 val)
123 {
124 priv->write(priv, reg, val);
125 }
126
127 /* Minimum timing constants */
128 #define EECK_EDGE_TIME 3 /* 3us - max(adm 2.5us, 93c 1us) */
129 #define EEDI_SETUP_TIME 1 /* 1us - max(adm 10ns, 93c 400ns) */
130 #define EECS_SETUP_TIME 1 /* 1us - max(adm no, 93c 200ns) */
131
132 static void adm6996_gpio_write(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
133 {
134 int i, len = (bits + 7) / 8;
135 u8 mask;
136
137 gpio_set_value(priv->eecs, cs);
138 udelay(EECK_EDGE_TIME);
139
140 /* Byte assemble from MSB to LSB */
141 for (i = 0; i < len; i++) {
142 /* Bit bang from MSB to LSB */
143 for (mask = 0x80; mask && bits > 0; mask >>= 1, bits --) {
144 /* Clock low */
145 gpio_set_value(priv->eesk, 0);
146 udelay(EECK_EDGE_TIME);
147
148 /* Output on rising edge */
149 gpio_set_value(priv->eedi, (mask & buf[i]));
150 udelay(EEDI_SETUP_TIME);
151
152 /* Clock high */
153 gpio_set_value(priv->eesk, 1);
154 udelay(EECK_EDGE_TIME);
155 }
156 }
157
158 /* Clock low */
159 gpio_set_value(priv->eesk, 0);
160 udelay(EECK_EDGE_TIME);
161
162 if (cs)
163 gpio_set_value(priv->eecs, 0);
164 }
165
166 static void adm6996_gpio_read(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
167 {
168 int i, len = (bits + 7) / 8;
169 u8 mask;
170
171 gpio_set_value(priv->eecs, cs);
172 udelay(EECK_EDGE_TIME);
173
174 /* Byte assemble from MSB to LSB */
175 for (i = 0; i < len; i++) {
176 u8 byte;
177
178 /* Bit bang from MSB to LSB */
179 for (mask = 0x80, byte = 0; mask && bits > 0; mask >>= 1, bits --) {
180 u8 gp;
181
182 /* Clock low */
183 gpio_set_value(priv->eesk, 0);
184 udelay(EECK_EDGE_TIME);
185
186 /* Input on rising edge */
187 gp = gpio_get_value(priv->eedi);
188 if (gp)
189 byte |= mask;
190
191 /* Clock high */
192 gpio_set_value(priv->eesk, 1);
193 udelay(EECK_EDGE_TIME);
194 }
195
196 *buf++ = byte;
197 }
198
199 /* Clock low */
200 gpio_set_value(priv->eesk, 0);
201 udelay(EECK_EDGE_TIME);
202
203 if (cs)
204 gpio_set_value(priv->eecs, 0);
205 }
206
207 /* Advance clock(s) */
208 static void adm6996_gpio_adclk(struct adm6996_priv *priv, int clocks)
209 {
210 int i;
211 for (i = 0; i < clocks; i++) {
212 /* Clock high */
213 gpio_set_value(priv->eesk, 1);
214 udelay(EECK_EDGE_TIME);
215
216 /* Clock low */
217 gpio_set_value(priv->eesk, 0);
218 udelay(EECK_EDGE_TIME);
219 }
220 }
221
222 static u16
223 adm6996_read_gpio_reg(struct adm6996_priv *priv, enum admreg reg)
224 {
225 /* cmd: 01 10 T DD R RRRRRR */
226 u8 bits[6] = {
227 0xFF, 0xFF, 0xFF, 0xFF,
228 (0x06 << 4) | ((0 & 0x01) << 3 | (reg&64)>>6),
229 ((reg&63)<<2)
230 };
231
232 u8 rbits[4];
233
234 /* Enable GPIO outputs with all pins to 0 */
235 gpio_direction_output(priv->eecs, 0);
236 gpio_direction_output(priv->eesk, 0);
237 gpio_direction_output(priv->eedi, 0);
238
239 adm6996_gpio_write(priv, 0, bits, 46);
240 gpio_direction_input(priv->eedi);
241 adm6996_gpio_adclk(priv, 2);
242 adm6996_gpio_read(priv, 0, rbits, 32);
243
244 /* Extra clock(s) required per datasheet */
245 adm6996_gpio_adclk(priv, 2);
246
247 /* Disable GPIO outputs */
248 gpio_direction_input(priv->eecs);
249 gpio_direction_input(priv->eesk);
250
251 /* EEPROM has 16-bit registers, but pumps out two registers in one request */
252 return (reg & 0x01 ? (rbits[0]<<8) | rbits[1] : (rbits[2]<<8) | (rbits[3]));
253 }
254
255 /* Write chip configuration register */
256 /* Follow 93c66 timing and chip's min EEPROM timing requirement */
257 static void
258 adm6996_write_gpio_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
259 {
260 /* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
261 u8 bits[4] = {
262 (0x05 << 5) | (reg >> 3),
263 (reg << 5) | (u8)(val >> 11),
264 (u8)(val >> 3),
265 (u8)(val << 5)
266 };
267
268 /* Enable GPIO outputs with all pins to 0 */
269 gpio_direction_output(priv->eecs, 0);
270 gpio_direction_output(priv->eesk, 0);
271 gpio_direction_output(priv->eedi, 0);
272
273 /* Write cmd. Total 27 bits */
274 adm6996_gpio_write(priv, 1, bits, 27);
275
276 /* Extra clock(s) required per datasheet */
277 adm6996_gpio_adclk(priv, 2);
278
279 /* Disable GPIO outputs */
280 gpio_direction_input(priv->eecs);
281 gpio_direction_input(priv->eesk);
282 gpio_direction_input(priv->eedi);
283 }
284
285 static u16
286 adm6996_read_mii_reg(struct adm6996_priv *priv, enum admreg reg)
287 {
288 struct phy_device *phydev = priv->priv;
289 struct mii_bus *bus = phydev->mdio.bus;
290
291 return bus->read(bus, PHYADDR(reg));
292 }
293
294 static void
295 adm6996_write_mii_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
296 {
297 struct phy_device *phydev = priv->priv;
298 struct mii_bus *bus = phydev->mdio.bus;
299
300 bus->write(bus, PHYADDR(reg), val);
301 }
302
303 static int
304 adm6996_set_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
305 struct switch_val *val)
306 {
307 struct adm6996_priv *priv = to_adm(dev);
308
309 if (val->value.i > 1)
310 return -EINVAL;
311
312 priv->enable_vlan = val->value.i;
313
314 return 0;
315 };
316
317 static int
318 adm6996_get_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
319 struct switch_val *val)
320 {
321 struct adm6996_priv *priv = to_adm(dev);
322
323 val->value.i = priv->enable_vlan;
324
325 return 0;
326 };
327
328 #ifdef DEBUG
329
330 static int
331 adm6996_set_addr(struct switch_dev *dev, const struct switch_attr *attr,
332 struct switch_val *val)
333 {
334 struct adm6996_priv *priv = to_adm(dev);
335
336 if (val->value.i > 1023)
337 return -EINVAL;
338
339 priv->addr = val->value.i;
340
341 return 0;
342 };
343
344 static int
345 adm6996_get_addr(struct switch_dev *dev, const struct switch_attr *attr,
346 struct switch_val *val)
347 {
348 struct adm6996_priv *priv = to_adm(dev);
349
350 val->value.i = priv->addr;
351
352 return 0;
353 };
354
355 static int
356 adm6996_set_data(struct switch_dev *dev, const struct switch_attr *attr,
357 struct switch_val *val)
358 {
359 struct adm6996_priv *priv = to_adm(dev);
360
361 if (val->value.i > 65535)
362 return -EINVAL;
363
364 w16(priv, priv->addr, val->value.i);
365
366 return 0;
367 };
368
369 static int
370 adm6996_get_data(struct switch_dev *dev, const struct switch_attr *attr,
371 struct switch_val *val)
372 {
373 struct adm6996_priv *priv = to_adm(dev);
374
375 val->value.i = r16(priv, priv->addr);
376
377 return 0;
378 };
379
380 #endif /* def DEBUG */
381
382 static int
383 adm6996_set_pvid(struct switch_dev *dev, int port, int vlan)
384 {
385 struct adm6996_priv *priv = to_adm(dev);
386
387 pr_devel("set_pvid port %d vlan %d\n", port, vlan);
388
389 if (vlan > ADM_VLAN_MAX_ID)
390 return -EINVAL;
391
392 priv->pvid[port] = vlan;
393
394 return 0;
395 }
396
397 static int
398 adm6996_get_pvid(struct switch_dev *dev, int port, int *vlan)
399 {
400 struct adm6996_priv *priv = to_adm(dev);
401
402 pr_devel("get_pvid port %d\n", port);
403 *vlan = priv->pvid[port];
404
405 return 0;
406 }
407
408 static int
409 adm6996_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
410 struct switch_val *val)
411 {
412 struct adm6996_priv *priv = to_adm(dev);
413
414 pr_devel("set_vid port %d vid %d\n", val->port_vlan, val->value.i);
415
416 if (val->value.i > ADM_VLAN_MAX_ID)
417 return -EINVAL;
418
419 priv->vlan_id[val->port_vlan] = val->value.i;
420
421 return 0;
422 };
423
424 static int
425 adm6996_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
426 struct switch_val *val)
427 {
428 struct adm6996_priv *priv = to_adm(dev);
429
430 pr_devel("get_vid port %d\n", val->port_vlan);
431
432 val->value.i = priv->vlan_id[val->port_vlan];
433
434 return 0;
435 };
436
437 static int
438 adm6996_get_ports(struct switch_dev *dev, struct switch_val *val)
439 {
440 struct adm6996_priv *priv = to_adm(dev);
441 u8 ports = priv->vlan_table[val->port_vlan];
442 u8 tagged = priv->vlan_tagged[val->port_vlan];
443 int i;
444
445 pr_devel("get_ports port_vlan %d\n", val->port_vlan);
446
447 val->len = 0;
448
449 for (i = 0; i < ADM_NUM_PORTS; i++) {
450 struct switch_port *p;
451
452 if (!(ports & (1 << i)))
453 continue;
454
455 p = &val->value.ports[val->len++];
456 p->id = i;
457 if (tagged & (1 << i))
458 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
459 else
460 p->flags = 0;
461 }
462
463 return 0;
464 };
465
466 static int
467 adm6996_set_ports(struct switch_dev *dev, struct switch_val *val)
468 {
469 struct adm6996_priv *priv = to_adm(dev);
470 u8 *ports = &priv->vlan_table[val->port_vlan];
471 u8 *tagged = &priv->vlan_tagged[val->port_vlan];
472 int i;
473
474 pr_devel("set_ports port_vlan %d ports", val->port_vlan);
475
476 *ports = 0;
477 *tagged = 0;
478
479 for (i = 0; i < val->len; i++) {
480 struct switch_port *p = &val->value.ports[i];
481
482 #ifdef DEBUG
483 pr_cont(" %d%s", p->id,
484 ((p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) ? "T" :
485 ""));
486 #endif
487
488 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
489 *tagged |= (1 << p->id);
490 priv->tagged_ports |= (1 << p->id);
491 }
492
493 *ports |= (1 << p->id);
494 }
495
496 #ifdef DEBUG
497 pr_cont("\n");
498 #endif
499
500 return 0;
501 };
502
503 /*
504 * Precondition: reg_mutex must be held
505 */
506 static void
507 adm6996_enable_vlan(struct adm6996_priv *priv)
508 {
509 u16 reg;
510
511 reg = r16(priv, ADM_OTBE_P2_PVID);
512 reg &= ~(ADM_OTBE_MASK);
513 w16(priv, ADM_OTBE_P2_PVID, reg);
514 reg = r16(priv, ADM_IFNTE);
515 reg &= ~(ADM_IFNTE_MASK);
516 w16(priv, ADM_IFNTE, reg);
517 reg = r16(priv, ADM_VID_CHECK);
518 reg |= ADM_VID_CHECK_MASK;
519 w16(priv, ADM_VID_CHECK, reg);
520 reg = r16(priv, ADM_SYSC0);
521 reg |= ADM_NTTE;
522 reg &= ~(ADM_RVID1);
523 w16(priv, ADM_SYSC0, reg);
524 reg = r16(priv, ADM_SYSC3);
525 reg |= ADM_TBV;
526 w16(priv, ADM_SYSC3, reg);
527 }
528
529 static void
530 adm6996_enable_vlan_6996l(struct adm6996_priv *priv)
531 {
532 u16 reg;
533
534 reg = r16(priv, ADM_SYSC3);
535 reg |= ADM_TBV;
536 reg |= ADM_MAC_CLONE;
537 w16(priv, ADM_SYSC3, reg);
538 }
539
540 /*
541 * Disable VLANs
542 *
543 * Sets VLAN mapping for port-based VLAN with all ports connected to
544 * eachother (this is also the power-on default).
545 *
546 * Precondition: reg_mutex must be held
547 */
548 static void
549 adm6996_disable_vlan(struct adm6996_priv *priv)
550 {
551 u16 reg;
552 int i;
553
554 for (i = 0; i < ADM_NUM_VLANS; i++) {
555 reg = ADM_VLAN_FILT_MEMBER_MASK;
556 w16(priv, ADM_VLAN_FILT_L(i), reg);
557 reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(1);
558 w16(priv, ADM_VLAN_FILT_H(i), reg);
559 }
560
561 reg = r16(priv, ADM_OTBE_P2_PVID);
562 reg |= ADM_OTBE_MASK;
563 w16(priv, ADM_OTBE_P2_PVID, reg);
564 reg = r16(priv, ADM_IFNTE);
565 reg |= ADM_IFNTE_MASK;
566 w16(priv, ADM_IFNTE, reg);
567 reg = r16(priv, ADM_VID_CHECK);
568 reg &= ~(ADM_VID_CHECK_MASK);
569 w16(priv, ADM_VID_CHECK, reg);
570 reg = r16(priv, ADM_SYSC0);
571 reg &= ~(ADM_NTTE);
572 reg |= ADM_RVID1;
573 w16(priv, ADM_SYSC0, reg);
574 reg = r16(priv, ADM_SYSC3);
575 reg &= ~(ADM_TBV);
576 w16(priv, ADM_SYSC3, reg);
577 }
578
579 /*
580 * Disable VLANs
581 *
582 * Sets VLAN mapping for port-based VLAN with all ports connected to
583 * eachother (this is also the power-on default).
584 *
585 * Precondition: reg_mutex must be held
586 */
587 static void
588 adm6996_disable_vlan_6996l(struct adm6996_priv *priv)
589 {
590 u16 reg;
591 int i;
592
593 for (i = 0; i < ADM_NUM_VLANS; i++) {
594 w16(priv, ADM_VLAN_MAP(i), 0);
595 }
596
597 reg = r16(priv, ADM_SYSC3);
598 reg &= ~(ADM_TBV);
599 reg &= ~(ADM_MAC_CLONE);
600 w16(priv, ADM_SYSC3, reg);
601 }
602
603 /*
604 * Precondition: reg_mutex must be held
605 */
606 static void
607 adm6996_apply_port_pvids(struct adm6996_priv *priv)
608 {
609 u16 reg;
610 int i;
611
612 for (i = 0; i < ADM_NUM_PORTS; i++) {
613 reg = r16(priv, adm_portcfg[i]);
614 reg &= ~(ADM_PORTCFG_PVID_MASK);
615 reg |= ADM_PORTCFG_PVID(priv->pvid[i]);
616 if (priv->model == ADM6996L) {
617 if (priv->tagged_ports & (1 << i))
618 reg |= (1 << 4);
619 else
620 reg &= ~(1 << 4);
621 }
622 w16(priv, adm_portcfg[i], reg);
623 }
624
625 w16(priv, ADM_P0_PVID, ADM_P0_PVID_VAL(priv->pvid[0]));
626 w16(priv, ADM_P1_PVID, ADM_P1_PVID_VAL(priv->pvid[1]));
627 reg = r16(priv, ADM_OTBE_P2_PVID);
628 reg &= ~(ADM_P2_PVID_MASK);
629 reg |= ADM_P2_PVID_VAL(priv->pvid[2]);
630 w16(priv, ADM_OTBE_P2_PVID, reg);
631 reg = ADM_P3_PVID_VAL(priv->pvid[3]);
632 reg |= ADM_P4_PVID_VAL(priv->pvid[4]);
633 w16(priv, ADM_P3_P4_PVID, reg);
634 reg = r16(priv, ADM_P5_PVID);
635 reg &= ~(ADM_P2_PVID_MASK);
636 reg |= ADM_P5_PVID_VAL(priv->pvid[5]);
637 w16(priv, ADM_P5_PVID, reg);
638 }
639
640 /*
641 * Precondition: reg_mutex must be held
642 */
643 static void
644 adm6996_apply_vlan_filters(struct adm6996_priv *priv)
645 {
646 u8 ports, tagged;
647 u16 vid, reg;
648 int i;
649
650 for (i = 0; i < ADM_NUM_VLANS; i++) {
651 vid = priv->vlan_id[i];
652 ports = priv->vlan_table[i];
653 tagged = priv->vlan_tagged[i];
654
655 if (ports == 0) {
656 /* Disable VLAN entry */
657 w16(priv, ADM_VLAN_FILT_H(i), 0);
658 w16(priv, ADM_VLAN_FILT_L(i), 0);
659 continue;
660 }
661
662 reg = ADM_VLAN_FILT_MEMBER(ports);
663 reg |= ADM_VLAN_FILT_TAGGED(tagged);
664 w16(priv, ADM_VLAN_FILT_L(i), reg);
665 reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(vid);
666 w16(priv, ADM_VLAN_FILT_H(i), reg);
667 }
668 }
669
670 static void
671 adm6996_apply_vlan_filters_6996l(struct adm6996_priv *priv)
672 {
673 u8 ports;
674 u16 reg;
675 int i;
676
677 for (i = 0; i < ADM_NUM_VLANS; i++) {
678 ports = priv->vlan_table[i];
679
680 if (ports == 0) {
681 /* Disable VLAN entry */
682 w16(priv, ADM_VLAN_MAP(i), 0);
683 continue;
684 } else {
685 reg = ADM_VLAN_FILT(ports);
686 w16(priv, ADM_VLAN_MAP(i), reg);
687 }
688 }
689 }
690
691 static int
692 adm6996_hw_apply(struct switch_dev *dev)
693 {
694 struct adm6996_priv *priv = to_adm(dev);
695
696 pr_devel("hw_apply\n");
697
698 mutex_lock(&priv->reg_mutex);
699
700 if (!priv->enable_vlan) {
701 if (priv->vlan_enabled) {
702 if (priv->model == ADM6996L)
703 adm6996_disable_vlan_6996l(priv);
704 else
705 adm6996_disable_vlan(priv);
706 priv->vlan_enabled = 0;
707 }
708 goto out;
709 }
710
711 if (!priv->vlan_enabled) {
712 if (priv->model == ADM6996L)
713 adm6996_enable_vlan_6996l(priv);
714 else
715 adm6996_enable_vlan(priv);
716 priv->vlan_enabled = 1;
717 }
718
719 adm6996_apply_port_pvids(priv);
720 if (priv->model == ADM6996L)
721 adm6996_apply_vlan_filters_6996l(priv);
722 else
723 adm6996_apply_vlan_filters(priv);
724
725 out:
726 mutex_unlock(&priv->reg_mutex);
727
728 return 0;
729 }
730
731 /*
732 * Reset the switch
733 *
734 * The ADM6996 can't do a software-initiated reset, so we just initialise the
735 * registers we support in this driver.
736 *
737 * Precondition: reg_mutex must be held
738 */
739 static void
740 adm6996_perform_reset (struct adm6996_priv *priv)
741 {
742 int i;
743
744 /* initialize port and vlan settings */
745 for (i = 0; i < ADM_NUM_PORTS - 1; i++) {
746 w16(priv, adm_portcfg[i], ADM_PORTCFG_INIT |
747 ADM_PORTCFG_PVID(0));
748 }
749 w16(priv, adm_portcfg[5], ADM_PORTCFG_CPU);
750
751 if (priv->model == ADM6996M || priv->model == ADM6996FC) {
752 /* reset all PHY ports */
753 for (i = 0; i < ADM_PHY_PORTS; i++) {
754 w16(priv, ADM_PHY_PORT(i), ADM_PHYCFG_INIT);
755 }
756 }
757
758 priv->enable_vlan = 0;
759 priv->vlan_enabled = 0;
760
761 for (i = 0; i < ADM_NUM_PORTS; i++) {
762 priv->pvid[i] = 0;
763 }
764
765 for (i = 0; i < ADM_NUM_VLANS; i++) {
766 priv->vlan_id[i] = i;
767 priv->vlan_table[i] = 0;
768 priv->vlan_tagged[i] = 0;
769 }
770
771 if (priv->model == ADM6996M) {
772 /* Clear VLAN priority map so prio's are unused */
773 w16 (priv, ADM_VLAN_PRIOMAP, 0);
774
775 adm6996_disable_vlan(priv);
776 adm6996_apply_port_pvids(priv);
777 } else if (priv->model == ADM6996L) {
778 /* Clear VLAN priority map so prio's are unused */
779 w16 (priv, ADM_VLAN_PRIOMAP, 0);
780
781 adm6996_disable_vlan_6996l(priv);
782 adm6996_apply_port_pvids(priv);
783 }
784 }
785
786 static int
787 adm6996_reset_switch(struct switch_dev *dev)
788 {
789 struct adm6996_priv *priv = to_adm(dev);
790
791 pr_devel("reset\n");
792
793 mutex_lock(&priv->reg_mutex);
794 adm6996_perform_reset (priv);
795 mutex_unlock(&priv->reg_mutex);
796 return 0;
797 }
798
799 static int
800 adm6996_get_port_link(struct switch_dev *dev, int port,
801 struct switch_port_link *link)
802 {
803 struct adm6996_priv *priv = to_adm(dev);
804
805 u16 reg = 0;
806
807 if (port >= ADM_NUM_PORTS)
808 return -EINVAL;
809
810 switch (port) {
811 case 0:
812 reg = r16(priv, ADM_PS0);
813 break;
814 case 1:
815 reg = r16(priv, ADM_PS0);
816 reg = reg >> 8;
817 break;
818 case 2:
819 reg = r16(priv, ADM_PS1);
820 break;
821 case 3:
822 reg = r16(priv, ADM_PS1);
823 reg = reg >> 8;
824 break;
825 case 4:
826 reg = r16(priv, ADM_PS1);
827 reg = reg >> 12;
828 break;
829 case 5:
830 reg = r16(priv, ADM_PS2);
831 /* Bits 0, 1, 3 and 4. */
832 reg = (reg & 3) | ((reg & 24) >> 1);
833 break;
834 default:
835 return -EINVAL;
836 }
837
838 link->link = reg & ADM_PS_LS;
839 if (!link->link)
840 return 0;
841 link->aneg = true;
842 link->duplex = reg & ADM_PS_DS;
843 link->tx_flow = reg & ADM_PS_FCS;
844 link->rx_flow = reg & ADM_PS_FCS;
845 if (reg & ADM_PS_SS)
846 link->speed = SWITCH_PORT_SPEED_100;
847 else
848 link->speed = SWITCH_PORT_SPEED_10;
849
850 return 0;
851 }
852
853 static int
854 adm6996_sw_get_port_mib(struct switch_dev *dev,
855 const struct switch_attr *attr,
856 struct switch_val *val)
857 {
858 struct adm6996_priv *priv = to_adm(dev);
859 int port;
860 char *buf = priv->buf;
861 int i, len = 0;
862 u32 reg = 0;
863
864 port = val->port_vlan;
865 if (port >= ADM_NUM_PORTS)
866 return -EINVAL;
867
868 mutex_lock(&priv->mib_lock);
869
870 len += snprintf(buf + len, sizeof(priv->buf) - len,
871 "Port %d MIB counters\n",
872 port);
873
874 for (i = 0; i < ARRAY_SIZE(adm6996_mibs); i++) {
875 reg = r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port));
876 reg += r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port) + 1) << 16;
877 len += snprintf(buf + len, sizeof(priv->buf) - len,
878 "%-12s: %u\n",
879 adm6996_mibs[i].name,
880 reg);
881 }
882
883 mutex_unlock(&priv->mib_lock);
884
885 val->value.s = buf;
886 val->len = len;
887
888 return 0;
889 }
890
891 static struct switch_attr adm6996_globals[] = {
892 {
893 .type = SWITCH_TYPE_INT,
894 .name = "enable_vlan",
895 .description = "Enable VLANs",
896 .set = adm6996_set_enable_vlan,
897 .get = adm6996_get_enable_vlan,
898 },
899 #ifdef DEBUG
900 {
901 .type = SWITCH_TYPE_INT,
902 .name = "addr",
903 .description =
904 "Direct register access: set register address (0 - 1023)",
905 .set = adm6996_set_addr,
906 .get = adm6996_get_addr,
907 },
908 {
909 .type = SWITCH_TYPE_INT,
910 .name = "data",
911 .description =
912 "Direct register access: read/write to register (0 - 65535)",
913 .set = adm6996_set_data,
914 .get = adm6996_get_data,
915 },
916 #endif /* def DEBUG */
917 };
918
919 static struct switch_attr adm6996_port[] = {
920 {
921 .type = SWITCH_TYPE_STRING,
922 .name = "mib",
923 .description = "Get port's MIB counters",
924 .set = NULL,
925 .get = adm6996_sw_get_port_mib,
926 },
927 };
928
929 static struct switch_attr adm6996_vlan[] = {
930 {
931 .type = SWITCH_TYPE_INT,
932 .name = "vid",
933 .description = "VLAN ID",
934 .set = adm6996_set_vid,
935 .get = adm6996_get_vid,
936 },
937 };
938
939 static struct switch_dev_ops adm6996_ops = {
940 .attr_global = {
941 .attr = adm6996_globals,
942 .n_attr = ARRAY_SIZE(adm6996_globals),
943 },
944 .attr_port = {
945 .attr = adm6996_port,
946 .n_attr = ARRAY_SIZE(adm6996_port),
947 },
948 .attr_vlan = {
949 .attr = adm6996_vlan,
950 .n_attr = ARRAY_SIZE(adm6996_vlan),
951 },
952 .get_port_pvid = adm6996_get_pvid,
953 .set_port_pvid = adm6996_set_pvid,
954 .get_vlan_ports = adm6996_get_ports,
955 .set_vlan_ports = adm6996_set_ports,
956 .apply_config = adm6996_hw_apply,
957 .reset_switch = adm6996_reset_switch,
958 .get_port_link = adm6996_get_port_link,
959 };
960
961 static int adm6996_switch_init(struct adm6996_priv *priv, const char *alias, struct net_device *netdev)
962 {
963 struct switch_dev *swdev;
964 u16 test, old;
965
966 if (!priv->model) {
967 /* Detect type of chip */
968 old = r16(priv, ADM_VID_CHECK);
969 test = old ^ (1 << 12);
970 w16(priv, ADM_VID_CHECK, test);
971 test ^= r16(priv, ADM_VID_CHECK);
972 if (test & (1 << 12)) {
973 /*
974 * Bit 12 of this register is read-only.
975 * This is the FC model.
976 */
977 priv->model = ADM6996FC;
978 } else {
979 /* Bit 12 is read-write. This is the M model. */
980 priv->model = ADM6996M;
981 w16(priv, ADM_VID_CHECK, old);
982 }
983 }
984
985 swdev = &priv->dev;
986 swdev->name = (adm6996_model_name[priv->model]);
987 swdev->cpu_port = ADM_CPU_PORT;
988 swdev->ports = ADM_NUM_PORTS;
989 swdev->vlans = ADM_NUM_VLANS;
990 swdev->ops = &adm6996_ops;
991 swdev->alias = alias;
992
993 /* The ADM6996L connected through GPIOs does not support any switch
994 status calls */
995 if (priv->model == ADM6996L) {
996 adm6996_ops.attr_port.n_attr = 0;
997 adm6996_ops.get_port_link = NULL;
998 }
999
1000 pr_info ("%s: %s model PHY found.\n", alias, swdev->name);
1001
1002 mutex_lock(&priv->reg_mutex);
1003 adm6996_perform_reset (priv);
1004 mutex_unlock(&priv->reg_mutex);
1005
1006 if (priv->model == ADM6996M || priv->model == ADM6996L) {
1007 return register_switch(swdev, netdev);
1008 }
1009
1010 return -ENODEV;
1011 }
1012
1013 static int adm6996_config_init(struct phy_device *pdev)
1014 {
1015 struct adm6996_priv *priv;
1016 int ret;
1017
1018 pdev->supported = ADVERTISED_100baseT_Full;
1019 pdev->advertising = ADVERTISED_100baseT_Full;
1020
1021 if (pdev->mdio.addr != 0) {
1022 pr_info ("%s: PHY overlaps ADM6996, providing fixed PHY 0x%x.\n"
1023 , pdev->attached_dev->name, pdev->mdio.addr);
1024 return 0;
1025 }
1026
1027 priv = devm_kzalloc(&pdev->mdio.dev, sizeof(struct adm6996_priv), GFP_KERNEL);
1028 if (!priv)
1029 return -ENOMEM;
1030
1031 mutex_init(&priv->reg_mutex);
1032 mutex_init(&priv->mib_lock);
1033 priv->priv = pdev;
1034 priv->read = adm6996_read_mii_reg;
1035 priv->write = adm6996_write_mii_reg;
1036
1037 ret = adm6996_switch_init(priv, pdev->attached_dev->name, pdev->attached_dev);
1038 if (ret < 0)
1039 return ret;
1040
1041 pdev->priv = priv;
1042
1043 return 0;
1044 }
1045
1046 /*
1047 * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
1048 */
1049 static int adm6996_read_status(struct phy_device *phydev)
1050 {
1051 phydev->speed = SPEED_100;
1052 phydev->duplex = DUPLEX_FULL;
1053 phydev->link = 1;
1054
1055 phydev->state = PHY_RUNNING;
1056 netif_carrier_on(phydev->attached_dev);
1057 phydev->adjust_link(phydev->attached_dev);
1058
1059 return 0;
1060 }
1061
1062 /*
1063 * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
1064 */
1065 static int adm6996_config_aneg(struct phy_device *phydev)
1066 {
1067 return 0;
1068 }
1069
1070 static int adm6996_fixup(struct phy_device *dev)
1071 {
1072 struct mii_bus *bus = dev->mdio.bus;
1073 u16 reg;
1074
1075 /* Our custom registers are at PHY addresses 0-10. Claim those. */
1076 if (dev->mdio.addr > 10)
1077 return 0;
1078
1079 /* look for the switch on the bus */
1080 reg = bus->read(bus, PHYADDR(ADM_SIG0)) & ADM_SIG0_MASK;
1081 if (reg != ADM_SIG0_VAL)
1082 return 0;
1083
1084 reg = bus->read(bus, PHYADDR(ADM_SIG1)) & ADM_SIG1_MASK;
1085 if (reg != ADM_SIG1_VAL)
1086 return 0;
1087
1088 dev->phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL;
1089
1090 return 0;
1091 }
1092
1093 static int adm6996_probe(struct phy_device *pdev)
1094 {
1095 return 0;
1096 }
1097
1098 static void adm6996_remove(struct phy_device *pdev)
1099 {
1100 struct adm6996_priv *priv = phy_to_adm(pdev);
1101
1102 if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
1103 unregister_switch(&priv->dev);
1104 }
1105
1106 static int adm6996_soft_reset(struct phy_device *phydev)
1107 {
1108 /* we don't need an extra reset */
1109 return 0;
1110 }
1111
1112 static struct phy_driver adm6996_phy_driver = {
1113 .name = "Infineon ADM6996",
1114 .phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL,
1115 .phy_id_mask = 0xffffffff,
1116 .features = PHY_BASIC_FEATURES,
1117 .probe = adm6996_probe,
1118 .remove = adm6996_remove,
1119 .config_init = &adm6996_config_init,
1120 .config_aneg = &adm6996_config_aneg,
1121 .read_status = &adm6996_read_status,
1122 .soft_reset = adm6996_soft_reset,
1123 };
1124
1125 static int adm6996_gpio_probe(struct platform_device *pdev)
1126 {
1127 struct adm6996_gpio_platform_data *pdata = pdev->dev.platform_data;
1128 struct adm6996_priv *priv;
1129 int ret;
1130
1131 if (!pdata)
1132 return -EINVAL;
1133
1134 priv = devm_kzalloc(&pdev->dev, sizeof(struct adm6996_priv), GFP_KERNEL);
1135 if (!priv)
1136 return -ENOMEM;
1137
1138 mutex_init(&priv->reg_mutex);
1139 mutex_init(&priv->mib_lock);
1140
1141 priv->eecs = pdata->eecs;
1142 priv->eedi = pdata->eedi;
1143 priv->eesk = pdata->eesk;
1144
1145 priv->model = pdata->model;
1146 priv->read = adm6996_read_gpio_reg;
1147 priv->write = adm6996_write_gpio_reg;
1148
1149 ret = devm_gpio_request(&pdev->dev, priv->eecs, "adm_eecs");
1150 if (ret)
1151 return ret;
1152 ret = devm_gpio_request(&pdev->dev, priv->eedi, "adm_eedi");
1153 if (ret)
1154 return ret;
1155 ret = devm_gpio_request(&pdev->dev, priv->eesk, "adm_eesk");
1156 if (ret)
1157 return ret;
1158
1159 ret = adm6996_switch_init(priv, dev_name(&pdev->dev), NULL);
1160 if (ret < 0)
1161 return ret;
1162
1163 platform_set_drvdata(pdev, priv);
1164
1165 return 0;
1166 }
1167
1168 static int adm6996_gpio_remove(struct platform_device *pdev)
1169 {
1170 struct adm6996_priv *priv = platform_get_drvdata(pdev);
1171
1172 if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
1173 unregister_switch(&priv->dev);
1174
1175 return 0;
1176 }
1177
1178 static struct platform_driver adm6996_gpio_driver = {
1179 .probe = adm6996_gpio_probe,
1180 .remove = adm6996_gpio_remove,
1181 .driver = {
1182 .name = "adm6996_gpio",
1183 },
1184 };
1185
1186 static int __init adm6996_init(void)
1187 {
1188 int err;
1189
1190 phy_register_fixup_for_id(PHY_ANY_ID, adm6996_fixup);
1191 err = phy_driver_register(&adm6996_phy_driver, THIS_MODULE);
1192 if (err)
1193 return err;
1194
1195 err = platform_driver_register(&adm6996_gpio_driver);
1196 if (err)
1197 phy_driver_unregister(&adm6996_phy_driver);
1198
1199 return err;
1200 }
1201
1202 static void __exit adm6996_exit(void)
1203 {
1204 platform_driver_unregister(&adm6996_gpio_driver);
1205 phy_driver_unregister(&adm6996_phy_driver);
1206 }
1207
1208 module_init(adm6996_init);
1209 module_exit(adm6996_exit);