generic: platform/mikrotik: graceful fallback for cpufreq_index
[openwrt/openwrt.git] / target / linux / generic / files / drivers / platform / mikrotik / rb_softconfig.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Driver for MikroTik RouterBoot soft config.
4 *
5 * Copyright (C) 2020 Thibaut VARĂˆNE <hacks+kernel@slashdirt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 *
11 * This driver exposes the data encoded in the "soft_config" flash segment of
12 * MikroTik RouterBOARDs devices. It presents the data in a sysfs folder
13 * named "soft_config". The data is presented in a user/machine-friendly way
14 * with just as much parsing as can be generalized across mikrotik platforms
15 * (as inferred from reverse-engineering).
16 *
17 * The known soft_config tags are presented in the "soft_config" sysfs folder,
18 * with the addition of one specific file named "commit", which is only
19 * available if the driver supports writes to the mtd device: no modifications
20 * made to any of the other attributes are actually written back to flash media
21 * until a true value is input into this file (e.g. [Yy1]). This is to avoid
22 * unnecessary flash wear, and to permit to revert all changes by issuing a
23 * false value ([Nn0]). Reading the content of this file shows the current
24 * status of the driver: if the data in sysfs matches the content of the
25 * soft_config partition, the file will read "clean". Otherwise, it will read
26 * "dirty".
27 *
28 * The writeable sysfs files presented by this driver will accept only inputs
29 * which are in a valid range for the given tag. As a design choice, the driver
30 * will not assess whether the inputs are identical to the existing data.
31 *
32 * Note: PAGE_SIZE is assumed to be >= 4K, hence the device attribute show
33 * routines need not check for output overflow.
34 *
35 * Some constant defines extracted from rbcfg.h by Gabor Juhos
36 * <juhosg@openwrt.org>
37 */
38
39 #include <linux/types.h>
40 #include <linux/init.h>
41 #include <linux/kernel.h>
42 #include <linux/slab.h>
43 #include <linux/errno.h>
44 #include <linux/kobject.h>
45 #include <linux/string.h>
46 #include <linux/mtd/mtd.h>
47 #include <linux/sysfs.h>
48 #include <linux/version.h>
49 #include <linux/capability.h>
50 #include <linux/spinlock.h>
51 #include <linux/crc32.h>
52
53 #ifdef CONFIG_ATH79
54 #include <asm/mach-ath79/ath79.h>
55 #endif
56
57 #include "routerboot.h"
58
59 #define RB_SOFTCONFIG_VER "0.03"
60 #define RB_SC_PR_PFX "[rb_softconfig] "
61
62 /*
63 * mtd operations before 4.17 are asynchronous, not handled by this code
64 * Also make the driver act read-only if 4K_SECTORS are not enabled, since they
65 * are require to handle partial erasing of the small soft_config partition.
66 */
67 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 17, 0)) && defined(CONFIG_MTD_SPI_NOR_USE_4K_SECTORS)
68 #define RB_SC_HAS_WRITE_SUPPORT true
69 #define RB_SC_WMODE S_IWUSR
70 #define RB_SC_RMODE S_IRUSR
71 #else
72 #define RB_SC_HAS_WRITE_SUPPORT false
73 #define RB_SC_WMODE 0
74 #define RB_SC_RMODE S_IRUSR
75 #endif
76
77 /* ID values for software settings */
78 #define RB_SCID_UART_SPEED 0x01 // u32*1
79 #define RB_SCID_BOOT_DELAY 0x02 // u32*1
80 #define RB_SCID_BOOT_DEVICE 0x03 // u32*1
81 #define RB_SCID_BOOT_KEY 0x04 // u32*1
82 #define RB_SCID_CPU_MODE 0x05 // u32*1
83 #define RB_SCID_BIOS_VERSION 0x06 // str
84 #define RB_SCID_BOOT_PROTOCOL 0x09 // u32*1
85 #define RB_SCID_CPU_FREQ_IDX 0x0C // u32*1
86 #define RB_SCID_BOOTER 0x0D // u32*1
87 #define RB_SCID_SILENT_BOOT 0x0F // u32*1
88 /*
89 * protected_routerboot seems to use tag 0x1F. It only works in combination with
90 * RouterOS, resulting in a wiped board otherwise, so it's not implemented here.
91 * The tag values are as follows:
92 * - off: 0x0
93 * - on: the lower halfword encodes the max value in s for the reset feature,
94 * the higher halfword encodes the min value in s for the reset feature.
95 * Default value when on: 0x00140258: 0x14 = 20s / 0x258= 600s
96 * See details here: https://wiki.mikrotik.com/wiki/Manual:RouterBOARD_settings#Protected_bootloader
97 */
98
99 /* Tag values */
100
101 #define RB_UART_SPEED_115200 0
102 #define RB_UART_SPEED_57600 1
103 #define RB_UART_SPEED_38400 2
104 #define RB_UART_SPEED_19200 3
105 #define RB_UART_SPEED_9600 4
106 #define RB_UART_SPEED_4800 5
107 #define RB_UART_SPEED_2400 6
108 #define RB_UART_SPEED_1200 7
109 #define RB_UART_SPEED_OFF 8
110
111 /* valid boot delay: 1 - 9s in 1s increment */
112 #define RB_BOOT_DELAY_MIN 1
113 #define RB_BOOT_DELAY_MAX 9
114
115 #define RB_BOOT_DEVICE_ETHER 0 // "boot over Ethernet"
116 #define RB_BOOT_DEVICE_NANDETH 1 // "boot from NAND, if fail then Ethernet"
117 #define RB_BOOT_DEVICE_CFCARD 2 // (not available in rbcfg)
118 #define RB_BOOT_DEVICE_ETHONCE 3 // "boot Ethernet once, then NAND"
119 #define RB_BOOT_DEVICE_NANDONLY 5 // "boot from NAND only"
120 #define RB_BOOT_DEVICE_FLASHCFG 7 // "boot in flash configuration mode"
121 #define RB_BOOT_DEVICE_FLSHONCE 8 // "boot in flash configuration mode once, then NAND"
122
123 /*
124 * ATH79 CPU frequency indices.
125 * It is unknown if they apply to all ATH79 RBs, and some do not seem to feature
126 * the upper levels (QCA955x), while F is presumably AR9344-only.
127 */
128 #define RB_CPU_FREQ_IDX_ATH79_A (0 << 3)
129 #define RB_CPU_FREQ_IDX_ATH79_B (1 << 3) // 0x8
130 #define RB_CPU_FREQ_IDX_ATH79_C (2 << 3) // 0x10 - factory freq for many devices
131 #define RB_CPU_FREQ_IDX_ATH79_D (3 << 3) // 0x18
132 #define RB_CPU_FREQ_IDX_ATH79_E (4 << 3) // 0x20
133 #define RB_CPU_FREQ_IDX_ATH79_F (5 << 3) // 0x28
134
135 #define RB_CPU_FREQ_IDX_ATH79_MIN 0 // all devices support lowest setting
136 #define RB_CPU_FREQ_IDX_ATH79_AR9334_MAX 5 // stops at F
137 #define RB_CPU_FREQ_IDX_ATH79_QCA953X_MAX 4 // stops at E
138 #define RB_CPU_FREQ_IDX_ATH79_QCA9556_MAX 2 // stops at C
139 #define RB_CPU_FREQ_IDX_ATH79_QCA9558_MAX 3 // stops at D
140
141 #define RB_SC_CRC32_OFFSET 4 // located right after magic
142
143 static struct kobject *sc_kobj;
144 static u8 *sc_buf;
145 static size_t sc_buflen;
146 static rwlock_t sc_bufrwl; // rw lock to sc_buf
147
148 /* MUST be used with lock held */
149 #define RB_SC_CLRCRC() *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = 0
150 #define RB_SC_GETCRC() *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET)
151 #define RB_SC_SETCRC(_crc) *(u32 *)(sc_buf + RB_SC_CRC32_OFFSET) = (_crc)
152
153 struct sc_u32tvs {
154 const u32 val;
155 const char *str;
156 };
157
158 #define RB_SC_TVS(_val, _str) { \
159 .val = (_val), \
160 .str = (_str), \
161 }
162
163 static ssize_t sc_tag_show_u32tvs(const u8 *pld, u16 pld_len, char *buf,
164 const struct sc_u32tvs tvs[], const int tvselmts)
165 {
166 const char *fmt;
167 char *out = buf;
168 u32 data; // cpu-endian
169 int i;
170
171 // fallback to raw hex output if we can't handle the input
172 if (tvselmts < 0)
173 return routerboot_tag_show_u32s(pld, pld_len, buf);
174
175 if (sizeof(data) != pld_len)
176 return -EINVAL;
177
178 read_lock(&sc_bufrwl);
179 data = *(u32 *)pld; // pld aliases sc_buf
180 read_unlock(&sc_bufrwl);
181
182 for (i = 0; i < tvselmts; i++) {
183 fmt = (tvs[i].val == data) ? "[%s] " : "%s ";
184 out += sprintf(out, fmt, tvs[i].str);
185 }
186
187 out += sprintf(out, "\n");
188 return out - buf;
189 }
190
191 static ssize_t sc_tag_store_u32tvs(const u8 *pld, u16 pld_len, const char *buf, size_t count,
192 const struct sc_u32tvs tvs[], const int tvselmts)
193 {
194 int i;
195
196 if (tvselmts < 0)
197 return tvselmts;
198
199 if (sizeof(u32) != pld_len)
200 return -EINVAL;
201
202 for (i = 0; i < tvselmts; i++) {
203 if (sysfs_streq(buf, tvs[i].str)) {
204 write_lock(&sc_bufrwl);
205 *(u32 *)pld = tvs[i].val; // pld aliases sc_buf
206 RB_SC_CLRCRC();
207 write_unlock(&sc_bufrwl);
208 return count;
209 }
210 }
211
212 return -EINVAL;
213 }
214
215 struct sc_boolts {
216 const char *strfalse;
217 const char *strtrue;
218 };
219
220 static ssize_t sc_tag_show_boolts(const u8 *pld, u16 pld_len, char *buf,
221 const struct sc_boolts *bts)
222 {
223 const char *fmt;
224 char *out = buf;
225 u32 data; // cpu-endian
226
227 if (sizeof(data) != pld_len)
228 return -EINVAL;
229
230 read_lock(&sc_bufrwl);
231 data = *(u32 *)pld; // pld aliases sc_buf
232 read_unlock(&sc_bufrwl);
233
234 fmt = (data) ? "%s [%s]\n" : "[%s] %s\n";
235 out += sprintf(out, fmt, bts->strfalse, bts->strtrue);
236
237 return out - buf;
238 }
239
240 static ssize_t sc_tag_store_boolts(const u8 *pld, u16 pld_len, const char *buf, size_t count,
241 const struct sc_boolts *bts)
242 {
243 u32 data; // cpu-endian
244
245 if (sizeof(data) != pld_len)
246 return -EINVAL;
247
248 if (sysfs_streq(buf, bts->strfalse))
249 data = 0;
250 else if (sysfs_streq(buf, bts->strtrue))
251 data = 1;
252 else
253 return -EINVAL;
254
255 write_lock(&sc_bufrwl);
256 *(u32 *)pld = data; // pld aliases sc_buf
257 RB_SC_CLRCRC();
258 write_unlock(&sc_bufrwl);
259
260 return count;
261 }
262 static struct sc_u32tvs const sc_uartspeeds[] = {
263 RB_SC_TVS(RB_UART_SPEED_OFF, "off"),
264 RB_SC_TVS(RB_UART_SPEED_1200, "1200"),
265 RB_SC_TVS(RB_UART_SPEED_2400, "2400"),
266 RB_SC_TVS(RB_UART_SPEED_4800, "4800"),
267 RB_SC_TVS(RB_UART_SPEED_9600, "9600"),
268 RB_SC_TVS(RB_UART_SPEED_19200, "19200"),
269 RB_SC_TVS(RB_UART_SPEED_38400, "38400"),
270 RB_SC_TVS(RB_UART_SPEED_57600, "57600"),
271 RB_SC_TVS(RB_UART_SPEED_115200, "115200"),
272 };
273
274 /*
275 * While the defines are carried over from rbcfg, use strings that more clearly
276 * show the actual setting purpose (especially since the NAND* settings apply
277 * to both nand- and nor-based devices). "cfcard" was disabled in rbcfg: disable
278 * it here too.
279 */
280 static struct sc_u32tvs const sc_bootdevices[] = {
281 RB_SC_TVS(RB_BOOT_DEVICE_ETHER, "eth"),
282 RB_SC_TVS(RB_BOOT_DEVICE_NANDETH, "flasheth"),
283 //RB_SC_TVS(RB_BOOT_DEVICE_CFCARD, "cfcard"),
284 RB_SC_TVS(RB_BOOT_DEVICE_ETHONCE, "ethonce"),
285 RB_SC_TVS(RB_BOOT_DEVICE_NANDONLY, "flash"),
286 RB_SC_TVS(RB_BOOT_DEVICE_FLASHCFG, "cfg"),
287 RB_SC_TVS(RB_BOOT_DEVICE_FLSHONCE, "cfgonce"),
288 };
289
290 static struct sc_boolts const sc_bootkey = {
291 .strfalse = "any",
292 .strtrue = "del",
293 };
294
295 static struct sc_boolts const sc_cpumode = {
296 .strfalse = "powersave",
297 .strtrue = "regular",
298 };
299
300 static struct sc_boolts const sc_bootproto = {
301 .strfalse = "bootp",
302 .strtrue = "dhcp",
303 };
304
305 static struct sc_boolts const sc_booter = {
306 .strfalse = "regular",
307 .strtrue = "backup",
308 };
309
310 static struct sc_boolts const sc_silent_boot = {
311 .strfalse = "off",
312 .strtrue = "on",
313 };
314
315 #define SC_TAG_SHOW_STORE_U32TVS_FUNCS(_name) \
316 static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf) \
317 { \
318 return sc_tag_show_u32tvs(pld, pld_len, buf, sc_##_name, ARRAY_SIZE(sc_##_name)); \
319 } \
320 static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count) \
321 { \
322 return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_##_name, ARRAY_SIZE(sc_##_name)); \
323 }
324
325 #define SC_TAG_SHOW_STORE_BOOLTS_FUNCS(_name) \
326 static ssize_t sc_tag_show_##_name(const u8 *pld, u16 pld_len, char *buf) \
327 { \
328 return sc_tag_show_boolts(pld, pld_len, buf, &sc_##_name); \
329 } \
330 static ssize_t sc_tag_store_##_name(const u8 *pld, u16 pld_len, const char *buf, size_t count) \
331 { \
332 return sc_tag_store_boolts(pld, pld_len, buf, count, &sc_##_name); \
333 }
334
335 SC_TAG_SHOW_STORE_U32TVS_FUNCS(uartspeeds)
336 SC_TAG_SHOW_STORE_U32TVS_FUNCS(bootdevices)
337 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootkey)
338 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(cpumode)
339 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(bootproto)
340 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(booter)
341 SC_TAG_SHOW_STORE_BOOLTS_FUNCS(silent_boot)
342
343 static ssize_t sc_tag_show_bootdelays(const u8 *pld, u16 pld_len, char *buf)
344 {
345 const char *fmt;
346 char *out = buf;
347 u32 data; // cpu-endian
348 int i;
349
350 if (sizeof(data) != pld_len)
351 return -EINVAL;
352
353 read_lock(&sc_bufrwl);
354 data = *(u32 *)pld; // pld aliases sc_buf
355 read_unlock(&sc_bufrwl);
356
357 for (i = RB_BOOT_DELAY_MIN; i <= RB_BOOT_DELAY_MAX; i++) {
358 fmt = (i == data) ? "[%d] " : "%d ";
359 out += sprintf(out, fmt, i);
360 }
361
362 out += sprintf(out, "\n");
363 return out - buf;
364 }
365
366 static ssize_t sc_tag_store_bootdelays(const u8 *pld, u16 pld_len, const char *buf, size_t count)
367 {
368 u32 data; // cpu-endian
369 int ret;
370
371 if (sizeof(data) != pld_len)
372 return -EINVAL;
373
374 ret = kstrtou32(buf, 10, &data);
375 if (ret)
376 return ret;
377
378 if ((data < RB_BOOT_DELAY_MIN) || (RB_BOOT_DELAY_MAX < data))
379 return -EINVAL;
380
381 write_lock(&sc_bufrwl);
382 *(u32 *)pld = data; // pld aliases sc_buf
383 RB_SC_CLRCRC();
384 write_unlock(&sc_bufrwl);
385
386 return count;
387 }
388
389 /* Support CPU frequency accessors only when the tag format has been asserted */
390 #if defined(CONFIG_ATH79)
391 /* Use the same letter-based nomenclature as RouterBOOT */
392 static struct sc_u32tvs const sc_cpufreq_indexes_ath79[] = {
393 RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_A, "a"),
394 RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_B, "b"),
395 RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_C, "c"),
396 RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_D, "d"),
397 RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_E, "e"),
398 RB_SC_TVS(RB_CPU_FREQ_IDX_ATH79_F, "f"),
399 };
400
401 static int sc_tag_cpufreq_ath79_arraysize(void)
402 {
403 int idx_max;
404
405 if (soc_is_ar9344())
406 idx_max = RB_CPU_FREQ_IDX_ATH79_AR9334_MAX+1;
407 else if (soc_is_qca953x())
408 idx_max = RB_CPU_FREQ_IDX_ATH79_QCA953X_MAX+1;
409 else if (soc_is_qca9556())
410 idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9556_MAX+1;
411 else if (soc_is_qca9558())
412 idx_max = RB_CPU_FREQ_IDX_ATH79_QCA9558_MAX+1;
413 else
414 idx_max = -EOPNOTSUPP;
415
416 return idx_max;
417 }
418
419 static ssize_t sc_tag_show_cpufreq_indexes(const u8 *pld, u16 pld_len, char * buf)
420 {
421 return sc_tag_show_u32tvs(pld, pld_len, buf, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_arraysize());
422 }
423
424 static ssize_t sc_tag_store_cpufreq_indexes(const u8 *pld, u16 pld_len, const char *buf, size_t count)
425 {
426 return sc_tag_store_u32tvs(pld, pld_len, buf, count, sc_cpufreq_indexes_ath79, sc_tag_cpufreq_ath79_arraysize());
427 }
428 #else
429 /* By default we only show the raw value to help with reverse-engineering */
430 #define sc_tag_show_cpufreq_indexes routerboot_tag_show_u32s
431 #define sc_tag_store_cpufreq_indexes NULL
432 #endif
433
434 static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
435 char *buf);
436 static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr,
437 const char *buf, size_t count);
438
439 /* Array of known tags to publish in sysfs */
440 static struct sc_attr {
441 const u16 tag_id;
442 /* sysfs tag show attribute. Must lock sc_buf when dereferencing pld */
443 ssize_t (* const tshow)(const u8 *pld, u16 pld_len, char *buf);
444 /* sysfs tag store attribute. Must lock sc_buf when dereferencing pld */
445 ssize_t (* const tstore)(const u8 *pld, u16 pld_len, const char *buf, size_t count);
446 struct kobj_attribute kattr;
447 u16 pld_ofs;
448 u16 pld_len;
449 } sc_attrs[] = {
450 {
451 .tag_id = RB_SCID_UART_SPEED,
452 .tshow = sc_tag_show_uartspeeds,
453 .tstore = sc_tag_store_uartspeeds,
454 .kattr = __ATTR(uart_speed, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
455 }, {
456 .tag_id = RB_SCID_BOOT_DELAY,
457 .tshow = sc_tag_show_bootdelays,
458 .tstore = sc_tag_store_bootdelays,
459 .kattr = __ATTR(boot_delay, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
460 }, {
461 .tag_id = RB_SCID_BOOT_DEVICE,
462 .tshow = sc_tag_show_bootdevices,
463 .tstore = sc_tag_store_bootdevices,
464 .kattr = __ATTR(boot_device, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
465 }, {
466 .tag_id = RB_SCID_BOOT_KEY,
467 .tshow = sc_tag_show_bootkey,
468 .tstore = sc_tag_store_bootkey,
469 .kattr = __ATTR(boot_key, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
470 }, {
471 .tag_id = RB_SCID_CPU_MODE,
472 .tshow = sc_tag_show_cpumode,
473 .tstore = sc_tag_store_cpumode,
474 .kattr = __ATTR(cpu_mode, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
475 }, {
476 .tag_id = RB_SCID_BIOS_VERSION,
477 .tshow = routerboot_tag_show_string,
478 .tstore = NULL,
479 .kattr = __ATTR(bios_version, RB_SC_RMODE, sc_attr_show, NULL),
480 }, {
481 .tag_id = RB_SCID_BOOT_PROTOCOL,
482 .tshow = sc_tag_show_bootproto,
483 .tstore = sc_tag_store_bootproto,
484 .kattr = __ATTR(boot_proto, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
485 }, {
486 .tag_id = RB_SCID_CPU_FREQ_IDX,
487 .tshow = sc_tag_show_cpufreq_indexes,
488 .tstore = sc_tag_store_cpufreq_indexes,
489 .kattr = __ATTR(cpufreq_index, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
490 }, {
491 .tag_id = RB_SCID_BOOTER,
492 .tshow = sc_tag_show_booter,
493 .tstore = sc_tag_store_booter,
494 .kattr = __ATTR(booter, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
495 }, {
496 .tag_id = RB_SCID_SILENT_BOOT,
497 .tshow = sc_tag_show_silent_boot,
498 .tstore = sc_tag_store_silent_boot,
499 .kattr = __ATTR(silent_boot, RB_SC_RMODE|RB_SC_WMODE, sc_attr_show, sc_attr_store),
500 },
501 };
502
503 static ssize_t sc_attr_show(struct kobject *kobj, struct kobj_attribute *attr,
504 char *buf)
505 {
506 const struct sc_attr *sc_attr;
507 const u8 *pld;
508 u16 pld_len;
509
510 sc_attr = container_of(attr, typeof(*sc_attr), kattr);
511
512 if (!sc_attr->pld_len)
513 return -ENOENT;
514
515 pld = sc_buf + sc_attr->pld_ofs; // pld aliases sc_buf -> lock!
516 pld_len = sc_attr->pld_len;
517
518 return sc_attr->tshow(pld, pld_len, buf);
519 }
520
521 static ssize_t sc_attr_store(struct kobject *kobj, struct kobj_attribute *attr,
522 const char *buf, size_t count)
523 {
524 const struct sc_attr *sc_attr;
525 const u8 *pld;
526 u16 pld_len;
527
528 if (!RB_SC_HAS_WRITE_SUPPORT)
529 return -EOPNOTSUPP;
530
531 if (!capable(CAP_SYS_ADMIN))
532 return -EACCES;
533
534 sc_attr = container_of(attr, typeof(*sc_attr), kattr);
535
536 if (!sc_attr->tstore)
537 return -EOPNOTSUPP;
538
539 if (!sc_attr->pld_len)
540 return -ENOENT;
541
542 pld = sc_buf + sc_attr->pld_ofs; // pld aliases sc_buf -> lock!
543 pld_len = sc_attr->pld_len;
544
545 return sc_attr->tstore(pld, pld_len, buf, count);
546 }
547
548 /*
549 * Shows the current buffer status:
550 * "clean": the buffer is in sync with the mtd data
551 * "dirty": the buffer is out of sync with the mtd data
552 */
553 static ssize_t sc_commit_show(struct kobject *kobj, struct kobj_attribute *attr,
554 char *buf)
555 {
556 const char *str;
557 char *out = buf;
558 u32 crc;
559
560 read_lock(&sc_bufrwl);
561 crc = RB_SC_GETCRC();
562 read_unlock(&sc_bufrwl);
563
564 str = (crc) ? "clean" : "dirty";
565 out += sprintf(out, "%s\n", str);
566
567 return out - buf;
568 }
569
570 /*
571 * Performs buffer flushing:
572 * This routine expects an input compatible with kstrtobool().
573 * - a "false" input discards the current changes and reads data back from mtd.
574 * - a "true" input commits the current changes to mtd.
575 * If there is no pending changes, this routine is a no-op.
576 * Handling failures is left as an exercise to userspace.
577 */
578 static ssize_t sc_commit_store(struct kobject *kobj, struct kobj_attribute *attr,
579 const char *buf, size_t count)
580 {
581 struct mtd_info *mtd;
582 struct erase_info ei;
583 size_t bytes_rw, ret = count;
584 bool flush;
585 u32 crc;
586
587 if (!RB_SC_HAS_WRITE_SUPPORT)
588 return -EOPNOTSUPP;
589
590 read_lock(&sc_bufrwl);
591 crc = RB_SC_GETCRC();
592 read_unlock(&sc_bufrwl);
593
594 if (crc)
595 return count; // NO-OP
596
597 ret = kstrtobool(buf, &flush);
598 if (ret)
599 return ret;
600
601 mtd = get_mtd_device_nm(RB_MTD_SOFT_CONFIG); // TODO allow override
602 if (IS_ERR(mtd))
603 return -ENODEV;
604
605 write_lock(&sc_bufrwl);
606 if (!flush) // reread
607 ret = mtd_read(mtd, 0, mtd->size, &bytes_rw, sc_buf);
608 else { // crc32 + commit
609 /*
610 * CRC32 is computed on the entire buffer, excluding the CRC
611 * value itself. CRC is already null when we reach this point,
612 * so we can compute the CRC32 on the buffer as is.
613 * The expected CRC32 is Ethernet FCS style, meaning the seed is
614 * ~0 and the final result is also bitflipped.
615 */
616
617 crc = ~crc32(~0, sc_buf, sc_buflen);
618 RB_SC_SETCRC(crc);
619
620 /*
621 * The soft_config partition is assumed to be entirely contained
622 * in a single eraseblock.
623 */
624
625 ei.addr = 0;
626 ei.len = mtd->size;
627 ret = mtd_erase(mtd, &ei);
628 if (!ret)
629 ret = mtd_write(mtd, 0, mtd->size, &bytes_rw, sc_buf);
630
631 /*
632 * Handling mtd_write() failure here is a tricky situation. The
633 * proposed approach is to let userspace deal with retrying,
634 * with the caveat that it must try to flush the buffer again as
635 * rereading the mtd contents could potentially read garbage.
636 * The rationale is: even if we keep a shadow buffer of the
637 * original content, there is no guarantee that we will ever be
638 * able to write it anyway.
639 * Regardless, it appears that RouterBOOT will ignore an invalid
640 * soft_config (including a completely wiped segment) and will
641 * write back factory defaults when it happens.
642 */
643 }
644 write_unlock(&sc_bufrwl);
645
646 if (ret)
647 goto mtdfail;
648
649 if (bytes_rw != sc_buflen) {
650 ret = -EIO;
651 goto mtdfail;
652 }
653
654 return count;
655
656 mtdfail:
657 RB_SC_CLRCRC(); // mark buffer content as dirty/invalid
658 return ret;
659 }
660
661 static struct kobj_attribute sc_kattrcommit = __ATTR(commit, RB_SC_RMODE|RB_SC_WMODE, sc_commit_show, sc_commit_store);
662
663 int __init rb_softconfig_init(struct kobject *rb_kobj)
664 {
665 struct mtd_info *mtd;
666 size_t bytes_read, buflen;
667 const u8 *buf;
668 int i, ret;
669 u32 magic;
670
671 sc_buf = NULL;
672 sc_kobj = NULL;
673
674 // TODO allow override
675 mtd = get_mtd_device_nm(RB_MTD_SOFT_CONFIG);
676 if (IS_ERR(mtd))
677 return -ENODEV;
678
679 sc_buflen = mtd->size;
680 sc_buf = kmalloc(sc_buflen, GFP_KERNEL);
681 if (!sc_buf)
682 return -ENOMEM;
683
684 ret = mtd_read(mtd, 0, sc_buflen, &bytes_read, sc_buf);
685
686 if (ret)
687 goto fail;
688
689 if (bytes_read != sc_buflen) {
690 ret = -EIO;
691 goto fail;
692 }
693
694 /* Check we have what we expect */
695 magic = *(const u32 *)sc_buf;
696 if (RB_MAGIC_SOFT != magic) {
697 ret = -EINVAL;
698 goto fail;
699 }
700
701 /* Skip magic and 32bit CRC located immediately after */
702 buf = sc_buf + (sizeof(magic) + sizeof(u32));
703 buflen = sc_buflen - (sizeof(magic) + sizeof(u32));
704
705 /* Populate sysfs */
706 ret = -ENOMEM;
707 sc_kobj = kobject_create_and_add(RB_MTD_SOFT_CONFIG, rb_kobj);
708 if (!sc_kobj)
709 goto fail;
710
711 rwlock_init(&sc_bufrwl);
712
713 /* Locate and publish all known tags */
714 for (i = 0; i < ARRAY_SIZE(sc_attrs); i++) {
715 ret = routerboot_tag_find(buf, buflen, sc_attrs[i].tag_id,
716 &sc_attrs[i].pld_ofs, &sc_attrs[i].pld_len);
717 if (ret) {
718 sc_attrs[i].pld_ofs = sc_attrs[i].pld_len = 0;
719 continue;
720 }
721
722 /* Account for skipped magic and crc32 */
723 sc_attrs[i].pld_ofs += sizeof(magic) + sizeof(u32);
724
725 ret = sysfs_create_file(sc_kobj, &sc_attrs[i].kattr.attr);
726 if (ret)
727 pr_warn(RB_SC_PR_PFX "Could not create %s sysfs entry (%d)\n",
728 sc_attrs[i].kattr.attr.name, ret);
729 }
730
731 /* Finally add the 'commit' attribute */
732 if (RB_SC_HAS_WRITE_SUPPORT) {
733 ret = sysfs_create_file(sc_kobj, &sc_kattrcommit.attr);
734 if (ret) {
735 pr_err(RB_SC_PR_PFX "Could not create %s sysfs entry (%d), aborting!\n",
736 sc_kattrcommit.attr.name, ret);
737 goto sysfsfail; // required attribute
738 }
739 }
740
741 pr_info("MikroTik RouterBOARD software configuration sysfs driver v" RB_SOFTCONFIG_VER "\n");
742
743 return 0;
744
745 sysfsfail:
746 kobject_put(sc_kobj);
747 sc_kobj = NULL;
748 fail:
749 kfree(sc_buf);
750 sc_buf = NULL;
751 return ret;
752 }
753
754 void __exit rb_softconfig_exit(void)
755 {
756 kobject_put(sc_kobj);
757 kfree(sc_buf);
758 }