target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch

   1 --- a/arch/mips/Kconfig
   2 +++ b/arch/mips/Kconfig
   3 @@ -1377,6 +1377,7 @@ config CPU_CAVIUM_OCTEON
   4         select LIBFDT
   5         select USE_OF
   6         select USB_EHCI_BIG_ENDIAN_MMIO
   7 +       select SYS_HAS_DMA_OPS
   8         help
   9           The Cavium Octeon processor is a highly integrated chip containing
  10           many ethernet hardware widgets for networking tasks. The processor
  11 @@ -1599,6 +1600,9 @@ config SYS_HAS_CPU_XLR
  12  config SYS_HAS_CPU_XLP
  13         bool
  14
  15 +config SYS_HAS_DMA_OPS
  16 +       bool
  17 +
  18  #
  19  # CPU may reorder R->R, R->W, W->R, W->W
  20  # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
  21 --- a/arch/mips/include/asm/dma-mapping.h
  22 +++ b/arch/mips/include/asm/dma-mapping.h
  23 @@ -1,9 +1,16 @@
  24  #ifndef _ASM_DMA_MAPPING_H
  25  #define _ASM_DMA_MAPPING_H
  26
  27 +#include <linux/kmemcheck.h>
  28 +#include <linux/bug.h>
  29 +#include <linux/scatterlist.h>
  30 +#include <linux/dma-debug.h>
  31 +#include <linux/dma-attrs.h>
  32 +
  33  #include <asm/scatterlist.h>
  34  #include <asm/dma-coherence.h>
  35  #include <asm/cache.h>
  36 +#include <asm/cpu-type.h>
  37  #include <asm-generic/dma-coherent.h>
  38
  39  #ifndef CONFIG_SGI_IP27 /* Kludge to fix 2.6.39 build for IP27 */
  40 @@ -12,12 +19,48 @@
  41
  42  extern struct dma_map_ops *mips_dma_map_ops;
  43
  44 +void __dma_sync(struct page *page, unsigned long offset, size_t size,
  45 +               enum dma_data_direction direction);
  46 +void *mips_dma_alloc_coherent(struct device *dev, size_t size,
  47 +                             dma_addr_t *dma_handle, gfp_t gfp,
  48 +                             struct dma_attrs *attrs);
  49 +void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  50 +                           dma_addr_t dma_handle, struct dma_attrs *attrs);
  51 +
  52  static inline struct dma_map_ops *get_dma_ops(struct device *dev)
  53  {
  54 +#ifdef CONFIG_SYS_HAS_DMA_OPS
  55         if (dev && dev->archdata.dma_ops)
  56                 return dev->archdata.dma_ops;
  57         else
  58                 return mips_dma_map_ops;
  59 +#else
  60 +       return NULL;
  61 +#endif
  62 +}
  63 +
  64 +/*
  65 + * Warning on the terminology - Linux calls an uncached area coherent;
  66 + * MIPS terminology calls memory areas with hardware maintained coherency
  67 + * coherent.
  68 + */
  69 +
  70 +static inline int cpu_needs_post_dma_flush(struct device *dev)
  71 +{
  72 +#ifndef CONFIG_SYS_HAS_CPU_R10000
  73 +       return 0;
  74 +#endif
  75 +       return !plat_device_is_coherent(dev) &&
  76 +              (boot_cpu_type() == CPU_R10000 ||
  77 +               boot_cpu_type() == CPU_R12000 ||
  78 +               boot_cpu_type() == CPU_BMIPS5000);
  79 +}
  80 +
  81 +static inline struct page *dma_addr_to_page(struct device *dev,
  82 +       dma_addr_t dma_addr)
  83 +{
  84 +       return pfn_to_page(
  85 +               plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
  86  }
  87
  88  static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
  89 @@ -30,12 +73,312 @@ static inline bool dma_capable(struct de
  90
  91  static inline void dma_mark_clean(void *addr, size_t size) {}
  92
  93 -#include <asm-generic/dma-mapping-common.h>
  94 +static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
  95 +                                             size_t size,
  96 +                                             enum dma_data_direction dir,
  97 +                                             struct dma_attrs *attrs)
  98 +{
  99 +       struct dma_map_ops *ops = get_dma_ops(dev);
 100 +       unsigned long offset = (unsigned long)ptr & ~PAGE_MASK;
 101 +       struct page *page = virt_to_page(ptr);
 102 +       dma_addr_t addr;
 103 +
 104 +       kmemcheck_mark_initialized(ptr, size);
 105 +       BUG_ON(!valid_dma_direction(dir));
 106 +       if (ops) {
 107 +               addr = ops->map_page(dev, page, offset, size, dir, attrs);
 108 +       } else {
 109 +               if (!plat_device_is_coherent(dev))
 110 +                       __dma_sync(page, offset, size, dir);
 111 +
 112 +               addr = plat_map_dma_mem_page(dev, page) + offset;
 113 +       }
 114 +       debug_dma_map_page(dev, page, offset, size, dir, addr, true);
 115 +       return addr;
 116 +}
 117 +
 118 +static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
 119 +                                         size_t size,
 120 +                                         enum dma_data_direction dir,
 121 +                                         struct dma_attrs *attrs)
 122 +{
 123 +       struct dma_map_ops *ops = get_dma_ops(dev);
 124 +
 125 +       BUG_ON(!valid_dma_direction(dir));
 126 +       if (ops) {
 127 +               ops->unmap_page(dev, addr, size, dir, attrs);
 128 +       } else {
 129 +               if (cpu_needs_post_dma_flush(dev))
 130 +                       __dma_sync(dma_addr_to_page(dev, addr),
 131 +                                  addr & ~PAGE_MASK, size, dir);
 132 +
 133 +               plat_unmap_dma_mem(dev, addr, size, dir);
 134 +       }
 135 +       debug_dma_unmap_page(dev, addr, size, dir, true);
 136 +}
 137 +
 138 +static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
 139 +                                  int nents, enum dma_data_direction dir,
 140 +                                  struct dma_attrs *attrs)
 141 +{
 142 +       struct dma_map_ops *ops = get_dma_ops(dev);
 143 +       int i, ents;
 144 +       struct scatterlist *s;
 145 +
 146 +       for_each_sg(sg, s, nents, i)
 147 +               kmemcheck_mark_initialized(sg_virt(s), s->length);
 148 +       BUG_ON(!valid_dma_direction(dir));
 149 +       if (ops) {
 150 +               ents = ops->map_sg(dev, sg, nents, dir, attrs);
 151 +       } else {
 152 +               for_each_sg(sg, s, nents, i) {
 153 +                       struct page *page = sg_page(s);
 154 +
 155 +                       if (!plat_device_is_coherent(dev))
 156 +                               __dma_sync(page, s->offset, s->length, dir);
 157 +#ifdef CONFIG_NEED_SG_DMA_LENGTH
 158 +                       s->dma_length = s->length;
 159 +#endif
 160 +                       s->dma_address =
 161 +                               plat_map_dma_mem_page(dev, page) + s->offset;
 162 +               }
 163 +               ents = nents;
 164 +       }
 165 +       debug_dma_map_sg(dev, sg, nents, ents, dir);
 166 +
 167 +       return ents;
 168 +}
 169 +
 170 +static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
 171 +                                     int nents, enum dma_data_direction dir,
 172 +                                     struct dma_attrs *attrs)
 173 +{
 174 +       struct dma_map_ops *ops = get_dma_ops(dev);
 175 +       struct scatterlist *s;
 176 +       int i;
 177 +
 178 +       BUG_ON(!valid_dma_direction(dir));
 179 +       debug_dma_unmap_sg(dev, sg, nents, dir);
 180 +       if (ops) {
 181 +               ops->unmap_sg(dev, sg, nents, dir, attrs);
 182 +               return;
 183 +       }
 184 +
 185 +       for_each_sg(sg, s, nents, i) {
 186 +               if (!plat_device_is_coherent(dev) && dir != DMA_TO_DEVICE)
 187 +                       __dma_sync(sg_page(s), s->offset, s->length, dir);
 188 +               plat_unmap_dma_mem(dev, s->dma_address, s->length, dir);
 189 +       }
 190 +}
 191 +
 192 +static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
 193 +                                     size_t offset, size_t size,
 194 +                                     enum dma_data_direction dir)
 195 +{
 196 +       struct dma_map_ops *ops = get_dma_ops(dev);
 197 +       dma_addr_t addr;
 198 +
 199 +       kmemcheck_mark_initialized(page_address(page) + offset, size);
 200 +       BUG_ON(!valid_dma_direction(dir));
 201 +       if (ops) {
 202 +               addr = ops->map_page(dev, page, offset, size, dir, NULL);
 203 +       } else {
 204 +               if (!plat_device_is_coherent(dev))
 205 +                       __dma_sync(page, offset, size, dir);
 206 +
 207 +               addr = plat_map_dma_mem_page(dev, page) + offset;
 208 +       }
 209 +       debug_dma_map_page(dev, page, offset, size, dir, addr, false);
 210 +
 211 +       return addr;
 212 +}
 213 +
 214 +static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
 215 +                                 size_t size, enum dma_data_direction dir)
 216 +{
 217 +       struct dma_map_ops *ops = get_dma_ops(dev);
 218 +
 219 +       BUG_ON(!valid_dma_direction(dir));
 220 +       if (ops) {
 221 +               ops->unmap_page(dev, addr, size, dir, NULL);
 222 +       } else {
 223 +               if (cpu_needs_post_dma_flush(dev))
 224 +                       __dma_sync(dma_addr_to_page(dev, addr),
 225 +                                  addr & ~PAGE_MASK, size, dir);
 226 +
 227 +               plat_unmap_dma_mem(dev, addr, size, dir);
 228 +       }
 229 +       debug_dma_unmap_page(dev, addr, size, dir, false);
 230 +}
 231 +
 232 +static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
 233 +                                          size_t size,
 234 +                                          enum dma_data_direction dir)
 235 +{
 236 +       struct dma_map_ops *ops = get_dma_ops(dev);
 237 +
 238 +       BUG_ON(!valid_dma_direction(dir));
 239 +       if (ops)
 240 +               ops->sync_single_for_cpu(dev, addr, size, dir);
 241 +       else if (cpu_needs_post_dma_flush(dev))
 242 +               __dma_sync(dma_addr_to_page(dev, addr),
 243 +                          addr & ~PAGE_MASK, size, dir);
 244 +       debug_dma_sync_single_for_cpu(dev, addr, size, dir);
 245 +}
 246 +
 247 +static inline void dma_sync_single_for_device(struct device *dev,
 248 +                                             dma_addr_t addr, size_t size,
 249 +                                             enum dma_data_direction dir)
 250 +{
 251 +       struct dma_map_ops *ops = get_dma_ops(dev);
 252 +
 253 +       BUG_ON(!valid_dma_direction(dir));
 254 +       if (ops)
 255 +               ops->sync_single_for_device(dev, addr, size, dir);
 256 +       else if (!plat_device_is_coherent(dev))
 257 +               __dma_sync(dma_addr_to_page(dev, addr),
 258 +                          addr & ~PAGE_MASK, size, dir);
 259 +       debug_dma_sync_single_for_device(dev, addr, size, dir);
 260 +}
 261 +
 262 +static inline void dma_sync_single_range_for_cpu(struct device *dev,
 263 +                                                dma_addr_t addr,
 264 +                                                unsigned long offset,
 265 +                                                size_t size,
 266 +                                                enum dma_data_direction dir)
 267 +{
 268 +       const struct dma_map_ops *ops = get_dma_ops(dev);
 269 +
 270 +       BUG_ON(!valid_dma_direction(dir));
 271 +       if (ops)
 272 +               ops->sync_single_for_cpu(dev, addr + offset, size, dir);
 273 +       else if (cpu_needs_post_dma_flush(dev))
 274 +               __dma_sync(dma_addr_to_page(dev, addr + offset),
 275 +                          (addr + offset) & ~PAGE_MASK, size, dir);
 276 +       debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
 277 +}
 278 +
 279 +static inline void dma_sync_single_range_for_device(struct device *dev,
 280 +                                                   dma_addr_t addr,
 281 +                                                   unsigned long offset,
 282 +                                                   size_t size,
 283 +                                                   enum dma_data_direction dir)
 284 +{
 285 +       const struct dma_map_ops *ops = get_dma_ops(dev);
 286 +
 287 +       BUG_ON(!valid_dma_direction(dir));
 288 +       if (ops)
 289 +               ops->sync_single_for_device(dev, addr + offset, size, dir);
 290 +       else if (!plat_device_is_coherent(dev))
 291 +               __dma_sync(dma_addr_to_page(dev, addr + offset),
 292 +                          (addr + offset) & ~PAGE_MASK, size, dir);
 293 +       debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
 294 +}
 295 +
 296 +static inline void
 297 +dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
 298 +                   int nelems, enum dma_data_direction dir)
 299 +{
 300 +       struct dma_map_ops *ops = get_dma_ops(dev);
 301 +       struct scatterlist *s;
 302 +       int i;
 303 +
 304 +       BUG_ON(!valid_dma_direction(dir));
 305 +       if (ops)
 306 +               ops->sync_sg_for_cpu(dev, sg, nelems, dir);
 307 +       else if (cpu_needs_post_dma_flush(dev)) {
 308 +               for_each_sg(sg, s, nelems, i)
 309 +                       __dma_sync(sg_page(s), s->offset, s->length, dir);
 310 +       }
 311 +       debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
 312 +}
 313 +
 314 +static inline void
 315 +dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
 316 +                      int nelems, enum dma_data_direction dir)
 317 +{
 318 +       struct dma_map_ops *ops = get_dma_ops(dev);
 319 +       struct scatterlist *s;
 320 +       int i;
 321 +
 322 +       BUG_ON(!valid_dma_direction(dir));
 323 +       if (ops)
 324 +               ops->sync_sg_for_device(dev, sg, nelems, dir);
 325 +       else if (!plat_device_is_coherent(dev)) {
 326 +               for_each_sg(sg, s, nelems, i)
 327 +                       __dma_sync(sg_page(s), s->offset, s->length, dir);
 328 +       }
 329 +       debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
 330 +
 331 +}
 332 +
 333 +#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, NULL)
 334 +#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, NULL)
 335 +#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, NULL)
 336 +#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, NULL)
 337 +
 338 +extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
 339 +                          void *cpu_addr, dma_addr_t dma_addr, size_t size);
 340 +
 341 +/**
 342 + * dma_mmap_attrs - map a coherent DMA allocation into user space
 343 + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 344 + * @vma: vm_area_struct describing requested user mapping
 345 + * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
 346 + * @handle: device-view address returned from dma_alloc_attrs
 347 + * @size: size of memory originally requested in dma_alloc_attrs
 348 + * @attrs: attributes of mapping properties requested in dma_alloc_attrs
 349 + *
 350 + * Map a coherent DMA buffer previously allocated by dma_alloc_attrs
 351 + * into user space.  The coherent DMA buffer must not be freed by the
 352 + * driver until the user space mapping has been released.
 353 + */
 354 +static inline int
 355 +dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
 356 +              dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
 357 +{
 358 +       struct dma_map_ops *ops = get_dma_ops(dev);
 359 +       BUG_ON(!ops);
 360 +       if (ops && ops->mmap)
 361 +               return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
 362 +       return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
 363 +}
 364 +
 365 +#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL)
 366 +
 367 +static inline int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
 368 +                     void *cpu_addr, dma_addr_t dma_addr, size_t size)
 369 +{
 370 +       DEFINE_DMA_ATTRS(attrs);
 371 +       dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
 372 +       return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs);
 373 +}
 374 +
 375 +int
 376 +dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
 377 +                      void *cpu_addr, dma_addr_t dma_addr, size_t size);
 378 +
 379 +static inline int
 380 +dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
 381 +                     dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
 382 +{
 383 +       struct dma_map_ops *ops = get_dma_ops(dev);
 384 +       BUG_ON(!ops);
 385 +       if (ops && ops->get_sgtable)
 386 +               return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
 387 +                                       attrs);
 388 +       return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size);
 389 +}
 390 +
 391 +#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, NULL)
 392 +
 393
 394  static inline int dma_supported(struct device *dev, u64 mask)
 395  {
 396         struct dma_map_ops *ops = get_dma_ops(dev);
 397 -       return ops->dma_supported(dev, mask);
 398 +       if (ops)
 399 +               return ops->dma_supported(dev, mask);
 400 +       return plat_dma_supported(dev, mask);
 401  }
 402
 403  static inline int dma_mapping_error(struct device *dev, u64 mask)
 404 @@ -43,7 +386,9 @@ static inline int dma_mapping_error(stru
 405         struct dma_map_ops *ops = get_dma_ops(dev);
 406
 407         debug_dma_mapping_error(dev, mask);
 408 -       return ops->mapping_error(dev, mask);
 409 +       if (ops)
 410 +               return ops->mapping_error(dev, mask);
 411 +       return 0;
 412  }
 413
 414  static inline int
 415 @@ -69,7 +414,11 @@ static inline void *dma_alloc_attrs(stru
 416         void *ret;
 417         struct dma_map_ops *ops = get_dma_ops(dev);
 418
 419 -       ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
 420 +       if (ops)
 421 +               ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
 422 +       else
 423 +               ret = mips_dma_alloc_coherent(dev, size, dma_handle, gfp,
 424 +                                             attrs);
 425
 426         debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
 427
 428 @@ -84,7 +433,10 @@ static inline void dma_free_attrs(struct
 429  {
 430         struct dma_map_ops *ops = get_dma_ops(dev);
 431
 432 -       ops->free(dev, size, vaddr, dma_handle, attrs);
 433 +       if (ops)
 434 +               ops->free(dev, size, vaddr, dma_handle, attrs);
 435 +       else
 436 +               mips_dma_free_coherent(dev, size, vaddr, dma_handle, attrs);
 437
 438         debug_dma_free_coherent(dev, size, vaddr, dma_handle);
 439  }
 440 --- a/arch/mips/mm/dma-default.c
 441 +++ b/arch/mips/mm/dma-default.c
 442 @@ -25,7 +25,7 @@
 443
 444  #ifdef CONFIG_DMA_MAYBE_COHERENT
 445  int coherentio = 0;    /* User defined DMA coherency from command line. */
 446 -EXPORT_SYMBOL_GPL(coherentio);
 447 +EXPORT_SYMBOL(coherentio);
 448  int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
 449
 450  static int __init setcoherentio(char *str)
 451 @@ -45,30 +45,6 @@ static int __init setnocoherentio(char *
 452  early_param("nocoherentio", setnocoherentio);
 453  #endif
 454
 455 -static inline struct page *dma_addr_to_page(struct device *dev,
 456 -       dma_addr_t dma_addr)
 457 -{
 458 -       return pfn_to_page(
 459 -               plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
 460 -}
 461 -
 462 -/*
 463 - * The affected CPUs below in 'cpu_needs_post_dma_flush()' can
 464 - * speculatively fill random cachelines with stale data at any time,
 465 - * requiring an extra flush post-DMA.
 466 - *
 467 - * Warning on the terminology - Linux calls an uncached area coherent;
 468 - * MIPS terminology calls memory areas with hardware maintained coherency
 469 - * coherent.
 470 - */
 471 -static inline int cpu_needs_post_dma_flush(struct device *dev)
 472 -{
 473 -       return !plat_device_is_coherent(dev) &&
 474 -              (boot_cpu_type() == CPU_R10000 ||
 475 -               boot_cpu_type() == CPU_R12000 ||
 476 -               boot_cpu_type() == CPU_BMIPS5000);
 477 -}
 478 -
 479  static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
 480  {
 481         gfp_t dma_flag;
 482 @@ -124,8 +100,9 @@ void *dma_alloc_noncoherent(struct devic
 483  }
 484  EXPORT_SYMBOL(dma_alloc_noncoherent);
 485
 486 -static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
 487 -       dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
 488 +void *mips_dma_alloc_coherent(struct device *dev, size_t size,
 489 +                             dma_addr_t *dma_handle, gfp_t gfp,
 490 +                             struct dma_attrs *attrs)
 491  {
 492         void *ret;
 493
 494 @@ -149,6 +126,7 @@ static void *mips_dma_alloc_coherent(str
 495
 496         return ret;
 497  }
 498 +EXPORT_SYMBOL(mips_dma_alloc_coherent);
 499
 500
 501  void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
 502 @@ -159,8 +137,8 @@ void dma_free_noncoherent(struct device
 503  }
 504  EXPORT_SYMBOL(dma_free_noncoherent);
 505
 506 -static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 507 -       dma_addr_t dma_handle, struct dma_attrs *attrs)
 508 +void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 509 +                           dma_addr_t dma_handle, struct dma_attrs *attrs)
 510  {
 511         unsigned long addr = (unsigned long) vaddr;
 512         int order = get_order(size);
 513 @@ -175,6 +153,7 @@ static void mips_dma_free_coherent(struc
 514
 515         free_pages(addr, get_order(size));
 516  }
 517 +EXPORT_SYMBOL(mips_dma_free_coherent);
 518
 519  static inline void __dma_sync_virtual(void *addr, size_t size,
 520         enum dma_data_direction direction)
 521 @@ -203,8 +182,8 @@ static inline void __dma_sync_virtual(vo
 522   * If highmem is not configured then the bulk of this loop gets
 523   * optimized out.
 524   */
 525 -static inline void __dma_sync(struct page *page,
 526 -       unsigned long offset, size_t size, enum dma_data_direction direction)
 527 +void __dma_sync(struct page *page, unsigned long offset, size_t size,
 528 +               enum dma_data_direction direction)
 529  {
 530         size_t left = size;
 531
 532 @@ -233,108 +212,7 @@ static inline void __dma_sync(struct pag
 533                 left -= len;
 534         } while (left);
 535  }
 536 -
 537 -static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
 538 -       size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
 539 -{
 540 -       if (cpu_needs_post_dma_flush(dev))
 541 -               __dma_sync(dma_addr_to_page(dev, dma_addr),
 542 -                          dma_addr & ~PAGE_MASK, size, direction);
 543 -
 544 -       plat_unmap_dma_mem(dev, dma_addr, size, direction);
 545 -}
 546 -
 547 -static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,
 548 -       int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
 549 -{
 550 -       int i;
 551 -
 552 -       for (i = 0; i < nents; i++, sg++) {
 553 -               if (!plat_device_is_coherent(dev))
 554 -                       __dma_sync(sg_page(sg), sg->offset, sg->length,
 555 -                                  direction);
 556 -#ifdef CONFIG_NEED_SG_DMA_LENGTH
 557 -               sg->dma_length = sg->length;
 558 -#endif
 559 -               sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
 560 -                                 sg->offset;
 561 -       }
 562 -
 563 -       return nents;
 564 -}
 565 -
 566 -static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
 567 -       unsigned long offset, size_t size, enum dma_data_direction direction,
 568 -       struct dma_attrs *attrs)
 569 -{
 570 -       if (!plat_device_is_coherent(dev))
 571 -               __dma_sync(page, offset, size, direction);
 572 -
 573 -       return plat_map_dma_mem_page(dev, page) + offset;
 574 -}
 575 -
 576 -static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
 577 -       int nhwentries, enum dma_data_direction direction,
 578 -       struct dma_attrs *attrs)
 579 -{
 580 -       int i;
 581 -
 582 -       for (i = 0; i < nhwentries; i++, sg++) {
 583 -               if (!plat_device_is_coherent(dev) &&
 584 -                   direction != DMA_TO_DEVICE)
 585 -                       __dma_sync(sg_page(sg), sg->offset, sg->length,
 586 -                                  direction);
 587 -               plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
 588 -       }
 589 -}
 590 -
 591 -static void mips_dma_sync_single_for_cpu(struct device *dev,
 592 -       dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 593 -{
 594 -       if (cpu_needs_post_dma_flush(dev))
 595 -               __dma_sync(dma_addr_to_page(dev, dma_handle),
 596 -                          dma_handle & ~PAGE_MASK, size, direction);
 597 -}
 598 -
 599 -static void mips_dma_sync_single_for_device(struct device *dev,
 600 -       dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 601 -{
 602 -       if (!plat_device_is_coherent(dev))
 603 -               __dma_sync(dma_addr_to_page(dev, dma_handle),
 604 -                          dma_handle & ~PAGE_MASK, size, direction);
 605 -}
 606 -
 607 -static void mips_dma_sync_sg_for_cpu(struct device *dev,
 608 -       struct scatterlist *sg, int nelems, enum dma_data_direction direction)
 609 -{
 610 -       int i;
 611 -
 612 -       if (cpu_needs_post_dma_flush(dev))
 613 -               for (i = 0; i < nelems; i++, sg++)
 614 -                       __dma_sync(sg_page(sg), sg->offset, sg->length,
 615 -                                  direction);
 616 -}
 617 -
 618 -static void mips_dma_sync_sg_for_device(struct device *dev,
 619 -       struct scatterlist *sg, int nelems, enum dma_data_direction direction)
 620 -{
 621 -       int i;
 622 -
 623 -       if (!plat_device_is_coherent(dev))
 624 -               for (i = 0; i < nelems; i++, sg++)
 625 -                       __dma_sync(sg_page(sg), sg->offset, sg->length,
 626 -                                  direction);
 627 -}
 628 -
 629 -int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 630 -{
 631 -       return 0;
 632 -}
 633 -
 634 -int mips_dma_supported(struct device *dev, u64 mask)
 635 -{
 636 -       return plat_dma_supported(dev, mask);
 637 -}
 638 +EXPORT_SYMBOL(__dma_sync);
 639
 640  void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 641                          enum dma_data_direction direction)
 642 @@ -347,23 +225,10 @@ void dma_cache_sync(struct device *dev,
 643
 644  EXPORT_SYMBOL(dma_cache_sync);
 645
 646 -static struct dma_map_ops mips_default_dma_map_ops = {
 647 -       .alloc = mips_dma_alloc_coherent,
 648 -       .free = mips_dma_free_coherent,
 649 -       .map_page = mips_dma_map_page,
 650 -       .unmap_page = mips_dma_unmap_page,
 651 -       .map_sg = mips_dma_map_sg,
 652 -       .unmap_sg = mips_dma_unmap_sg,
 653 -       .sync_single_for_cpu = mips_dma_sync_single_for_cpu,
 654 -       .sync_single_for_device = mips_dma_sync_single_for_device,
 655 -       .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
 656 -       .sync_sg_for_device = mips_dma_sync_sg_for_device,
 657 -       .mapping_error = mips_dma_mapping_error,
 658 -       .dma_supported = mips_dma_supported
 659 -};
 660 -
 661 -struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
 662 +#ifdef CONFIG_SYS_HAS_DMA_OPS
 663 +struct dma_map_ops *mips_dma_map_ops = NULL;
 664  EXPORT_SYMBOL(mips_dma_map_ops);
 665 +#endif
 666
 667  #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
 668