f94d160fc6d9ebe663abca845c0b9d71a0ed1ebb
[openwrt/openwrt.git] / target / linux / generic / pending-3.18 / 020-ssb_update.patch
1 --- a/drivers/ssb/pcihost_wrapper.c
2 +++ b/drivers/ssb/pcihost_wrapper.c
3 @@ -11,15 +11,17 @@
4 * Licensed under the GNU/GPL. See COPYING for details.
5 */
6
7 +#include <linux/pm.h>
8 #include <linux/pci.h>
9 #include <linux/export.h>
10 #include <linux/slab.h>
11 #include <linux/ssb/ssb.h>
12
13
14 -#ifdef CONFIG_PM
15 -static int ssb_pcihost_suspend(struct pci_dev *dev, pm_message_t state)
16 +#ifdef CONFIG_PM_SLEEP
17 +static int ssb_pcihost_suspend(struct device *d)
18 {
19 + struct pci_dev *dev = to_pci_dev(d);
20 struct ssb_bus *ssb = pci_get_drvdata(dev);
21 int err;
22
23 @@ -28,17 +30,23 @@ static int ssb_pcihost_suspend(struct pc
24 return err;
25 pci_save_state(dev);
26 pci_disable_device(dev);
27 - pci_set_power_state(dev, pci_choose_state(dev, state));
28 +
29 + /* if there is a wakeup enabled child device on ssb bus,
30 + enable pci wakeup posibility. */
31 + device_set_wakeup_enable(d, d->power.wakeup_path);
32 +
33 + pci_prepare_to_sleep(dev);
34
35 return 0;
36 }
37
38 -static int ssb_pcihost_resume(struct pci_dev *dev)
39 +static int ssb_pcihost_resume(struct device *d)
40 {
41 + struct pci_dev *dev = to_pci_dev(d);
42 struct ssb_bus *ssb = pci_get_drvdata(dev);
43 int err;
44
45 - pci_set_power_state(dev, PCI_D0);
46 + pci_back_from_sleep(dev);
47 err = pci_enable_device(dev);
48 if (err)
49 return err;
50 @@ -49,10 +57,12 @@ static int ssb_pcihost_resume(struct pci
51
52 return 0;
53 }
54 -#else /* CONFIG_PM */
55 -# define ssb_pcihost_suspend NULL
56 -# define ssb_pcihost_resume NULL
57 -#endif /* CONFIG_PM */
58 +
59 +static const struct dev_pm_ops ssb_pcihost_pm_ops = {
60 + SET_SYSTEM_SLEEP_PM_OPS(ssb_pcihost_suspend, ssb_pcihost_resume)
61 +};
62 +
63 +#endif /* CONFIG_PM_SLEEP */
64
65 static int ssb_pcihost_probe(struct pci_dev *dev,
66 const struct pci_device_id *id)
67 @@ -115,8 +125,9 @@ int ssb_pcihost_register(struct pci_driv
68 {
69 driver->probe = ssb_pcihost_probe;
70 driver->remove = ssb_pcihost_remove;
71 - driver->suspend = ssb_pcihost_suspend;
72 - driver->resume = ssb_pcihost_resume;
73 +#ifdef CONFIG_PM_SLEEP
74 + driver->driver.pm = &ssb_pcihost_pm_ops;
75 +#endif
76
77 return pci_register_driver(driver);
78 }
79 --- a/drivers/ssb/driver_pcicore.c
80 +++ b/drivers/ssb/driver_pcicore.c
81 @@ -357,6 +357,16 @@ static void ssb_pcicore_init_hostmode(st
82 pcicore_write32(pc, SSB_PCICORE_SBTOPCI2,
83 SSB_PCICORE_SBTOPCI_MEM | SSB_PCI_DMA);
84
85 + /*
86 + * Accessing PCI config without a proper delay after devices reset (not
87 + * GPIO reset) was causing reboots on WRT300N v1.0 (BCM4704).
88 + * Tested delay 850 us lowered reboot chance to 50-80%, 1000 us fixed it
89 + * completely. Flushing all writes was also tested but with no luck.
90 + * The same problem was reported for WRT350N v1 (BCM4705), so we just
91 + * sleep here unconditionally.
92 + */
93 + usleep_range(1000, 2000);
94 +
95 /* Enable PCI bridge BAR0 prefetch and burst */
96 val = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
97 ssb_extpci_write_config(pc, 0, 0, 0, PCI_COMMAND, &val, 2);
98 --- a/drivers/ssb/main.c
99 +++ b/drivers/ssb/main.c
100 @@ -90,25 +90,6 @@ found:
101 }
102 #endif /* CONFIG_SSB_PCMCIAHOST */
103
104 -#ifdef CONFIG_SSB_SDIOHOST
105 -struct ssb_bus *ssb_sdio_func_to_bus(struct sdio_func *func)
106 -{
107 - struct ssb_bus *bus;
108 -
109 - ssb_buses_lock();
110 - list_for_each_entry(bus, &buses, list) {
111 - if (bus->bustype == SSB_BUSTYPE_SDIO &&
112 - bus->host_sdio == func)
113 - goto found;
114 - }
115 - bus = NULL;
116 -found:
117 - ssb_buses_unlock();
118 -
119 - return bus;
120 -}
121 -#endif /* CONFIG_SSB_SDIOHOST */
122 -
123 int ssb_for_each_bus_call(unsigned long data,
124 int (*func)(struct ssb_bus *bus, unsigned long data))
125 {
126 @@ -1154,6 +1135,8 @@ static u32 ssb_tmslow_reject_bitmask(str
127 case SSB_IDLOW_SSBREV_25: /* TODO - find the proper REJECT bit */
128 case SSB_IDLOW_SSBREV_27: /* same here */
129 return SSB_TMSLOW_REJECT; /* this is a guess */
130 + case SSB_IDLOW_SSBREV:
131 + break;
132 default:
133 WARN(1, KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
134 }