imx6: move to 4.4 kernel
[openwrt/openwrt.git] / target / linux / imx6 / patches-4.3 / 204-net-igb-register-mii_bus-for-SerDes-w-external-phy.patch
1 From 03855caf93f7332a3f320228ba1a0e7baae8a749 Mon Sep 17 00:00:00 2001
2 From: Tim Harvey <tharvey@gateworks.com>
3 Date: Thu, 15 May 2014 12:36:23 -0700
4 Subject: [PATCH] net: igb: register mii_bus for SerDes w/ external phy
5
6 If an i210 is configured for 1000BASE-BX link_mode and has an external phy
7 specified, then register an mii bus using the external phy address as
8 a mask.
9
10 An i210 hooked to an external standard phy will be configured with a link_mo
11 of SGMII in which case phy ops will be configured and used internall in the
12 igb driver for link status. However, in certain cases one might be using a
13 backplane SerDes connection to something that talks on the mdio bus but is
14 not a standard phy, such as a switch. In this case by registering an mdio
15 bus a phy driver can manage the device.
16
17 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
18 ---
19 drivers/net/ethernet/intel/igb/e1000_82575.c | 15 +++
20 drivers/net/ethernet/intel/igb/e1000_hw.h | 7 ++
21 drivers/net/ethernet/intel/igb/igb_main.c | 168 ++++++++++++++++++++++++++-
22 3 files changed, 185 insertions(+), 5 deletions(-)
23
24 --- a/drivers/net/ethernet/intel/igb/e1000_82575.c
25 +++ b/drivers/net/ethernet/intel/igb/e1000_82575.c
26 @@ -612,13 +612,25 @@ static s32 igb_get_invariants_82575(stru
27 switch (link_mode) {
28 case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
29 hw->phy.media_type = e1000_media_type_internal_serdes;
30 + if (igb_sgmii_uses_mdio_82575(hw)) {
31 + u32 mdicnfg = rd32(E1000_MDICNFG);
32 + mdicnfg &= E1000_MDICNFG_PHY_MASK;
33 + hw->phy.addr = mdicnfg >> E1000_MDICNFG_PHY_SHIFT;
34 + hw_dbg("1000BASE_KX w/ external MDIO device at 0x%x\n",
35 + hw->phy.addr);
36 + } else {
37 + hw_dbg("1000BASE_KX");
38 + }
39 break;
40 case E1000_CTRL_EXT_LINK_MODE_SGMII:
41 /* Get phy control interface type set (MDIO vs. I2C)*/
42 if (igb_sgmii_uses_mdio_82575(hw)) {
43 hw->phy.media_type = e1000_media_type_copper;
44 dev_spec->sgmii_active = true;
45 + hw_dbg("SGMII with external MDIO PHY");
46 break;
47 + } else {
48 + hw_dbg("SGMII with external I2C PHY");
49 }
50 /* fall through for I2C based SGMII */
51 case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:
52 @@ -635,8 +647,11 @@ static s32 igb_get_invariants_82575(stru
53 hw->phy.media_type = e1000_media_type_copper;
54 dev_spec->sgmii_active = true;
55 }
56 + hw_dbg("SERDES with external SFP");
57
58 break;
59 + } else {
60 + hw_dbg("SERDES");
61 }
62
63 /* do not change link mode for 100BaseFX */
64 --- a/drivers/net/ethernet/intel/igb/e1000_hw.h
65 +++ b/drivers/net/ethernet/intel/igb/e1000_hw.h
66 @@ -27,6 +27,7 @@
67 #include <linux/delay.h>
68 #include <linux/io.h>
69 #include <linux/netdevice.h>
70 +#include <linux/phy.h>
71
72 #include "e1000_regs.h"
73 #include "e1000_defines.h"
74 @@ -543,6 +544,12 @@ struct e1000_hw {
75 struct e1000_mbx_info mbx;
76 struct e1000_host_mng_dhcp_cookie mng_cookie;
77
78 +#ifdef CONFIG_PHYLIB
79 + /* Phylib and MDIO interface */
80 + struct mii_bus *mii_bus;
81 + struct phy_device *phy_dev;
82 + phy_interface_t phy_interface;
83 +#endif
84 union {
85 struct e1000_dev_spec_82575 _82575;
86 } dev_spec;
87 --- a/drivers/net/ethernet/intel/igb/igb_main.c
88 +++ b/drivers/net/ethernet/intel/igb/igb_main.c
89 @@ -41,6 +41,7 @@
90 #include <linux/if_vlan.h>
91 #include <linux/pci.h>
92 #include <linux/pci-aspm.h>
93 +#include <linux/phy.h>
94 #include <linux/delay.h>
95 #include <linux/interrupt.h>
96 #include <linux/ip.h>
97 @@ -2223,6 +2224,126 @@ static s32 igb_init_i2c(struct igb_adapt
98 return status;
99 }
100
101 +
102 +#ifdef CONFIG_PHYLIB
103 +/*
104 + * MMIO/PHYdev support
105 + */
106 +
107 +static int igb_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
108 +{
109 + struct e1000_hw *hw = bus->priv;
110 + u16 out;
111 + int err;
112 +
113 + err = igb_read_reg_gs40g(hw, mii_id, regnum, &out);
114 + if (err)
115 + return err;
116 + return out;
117 +}
118 +
119 +static int igb_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
120 + u16 val)
121 +{
122 + struct e1000_hw *hw = bus->priv;
123 +
124 + return igb_write_reg_gs40g(hw, mii_id, regnum, val);
125 +}
126 +
127 +static int igb_enet_mdio_reset(struct mii_bus *bus)
128 +{
129 + udelay(300);
130 + return 0;
131 +}
132 +
133 +static void igb_enet_mii_link(struct net_device *netdev)
134 +{
135 +}
136 +
137 +/* Probe the mdio bus for phys and connect them */
138 +static int igb_enet_mii_probe(struct net_device *netdev)
139 +{
140 + struct igb_adapter *adapter = netdev_priv(netdev);
141 + struct e1000_hw *hw = &adapter->hw;
142 + struct phy_device *phy_dev = NULL;
143 + int phy_id;
144 +
145 + /* check for attached phy */
146 + for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
147 + if (hw->mii_bus->phy_map[phy_id]) {
148 + phy_dev = hw->mii_bus->phy_map[phy_id];
149 + break;
150 + }
151 + }
152 + if (!phy_dev) {
153 + netdev_err(netdev, "no PHY found\n");
154 + return -ENODEV;
155 + }
156 +
157 + hw->phy_interface = PHY_INTERFACE_MODE_RGMII;
158 + phy_dev = phy_connect(netdev, dev_name(&phy_dev->dev),
159 + igb_enet_mii_link, hw->phy_interface);
160 + if (IS_ERR(phy_dev)) {
161 + netdev_err(netdev, "could not attach to PHY\n");
162 + return PTR_ERR(phy_dev);
163 + }
164 +
165 + hw->phy_dev = phy_dev;
166 + netdev_info(netdev, "igb PHY driver [%s] (mii_bus:phy_addr=%s)\n",
167 + hw->phy_dev->drv->name, dev_name(&hw->phy_dev->dev));
168 +
169 + return 0;
170 +}
171 +
172 +/* Create and register mdio bus */
173 +static int igb_enet_mii_init(struct pci_dev *pdev)
174 +{
175 + struct mii_bus *mii_bus;
176 + struct net_device *netdev = pci_get_drvdata(pdev);
177 + struct igb_adapter *adapter = netdev_priv(netdev);
178 + struct e1000_hw *hw = &adapter->hw;
179 + int err;
180 +
181 + mii_bus = mdiobus_alloc();
182 + if (mii_bus == NULL) {
183 + err = -ENOMEM;
184 + goto err_out;
185 + }
186 +
187 + mii_bus->name = "igb_enet_mii_bus";
188 + mii_bus->read = igb_enet_mdio_read;
189 + mii_bus->write = igb_enet_mdio_write;
190 + mii_bus->reset = igb_enet_mdio_reset;
191 + snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
192 + pci_name(pdev), hw->device_id + 1);
193 + mii_bus->priv = hw;
194 + mii_bus->parent = &pdev->dev;
195 + mii_bus->phy_mask = ~(1 << hw->phy.addr);
196 +
197 + err = mdiobus_register(mii_bus);
198 + if (err) {
199 + printk(KERN_ERR "failed to register mii_bus: %d\n", err);
200 + goto err_out_free_mdiobus;
201 + }
202 + hw->mii_bus = mii_bus;
203 +
204 + return 0;
205 +
206 +err_out_free_mdiobus:
207 + mdiobus_free(mii_bus);
208 +err_out:
209 + return err;
210 +}
211 +
212 +static void igb_enet_mii_remove(struct e1000_hw *hw)
213 +{
214 + if (hw->mii_bus) {
215 + mdiobus_unregister(hw->mii_bus);
216 + mdiobus_free(hw->mii_bus);
217 + }
218 +}
219 +#endif /* CONFIG_PHYLIB */
220 +
221 /**
222 * igb_probe - Device Initialization Routine
223 * @pdev: PCI device information struct
224 @@ -2645,6 +2766,13 @@ static int igb_probe(struct pci_dev *pde
225 }
226 }
227 pm_runtime_put_noidle(&pdev->dev);
228 +
229 +#ifdef CONFIG_PHYLIB
230 + /* create and register the mdio bus if using ext phy */
231 + if (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)
232 + igb_enet_mii_init(pdev);
233 +#endif
234 +
235 return 0;
236
237 err_register:
238 @@ -2792,6 +2920,10 @@ static void igb_remove(struct pci_dev *p
239 struct e1000_hw *hw = &adapter->hw;
240
241 pm_runtime_get_noresume(&pdev->dev);
242 +#ifdef CONFIG_PHYLIB
243 + if (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)
244 + igb_enet_mii_remove(hw);
245 +#endif
246 #ifdef CONFIG_IGB_HWMON
247 igb_sysfs_exit(adapter);
248 #endif
249 @@ -3105,6 +3237,12 @@ static int __igb_open(struct net_device
250 if (!resuming)
251 pm_runtime_put(&pdev->dev);
252
253 +#ifdef CONFIG_PHYLIB
254 + /* Probe and connect to PHY if using ext phy */
255 + if (rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO)
256 + igb_enet_mii_probe(netdev);
257 +#endif
258 +
259 /* start the watchdog. */
260 hw->mac.get_link_status = 1;
261 schedule_work(&adapter->watchdog_task);
262 @@ -7090,21 +7228,41 @@ void igb_alloc_rx_buffers(struct igb_rin
263 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
264 {
265 struct igb_adapter *adapter = netdev_priv(netdev);
266 + struct e1000_hw *hw = &adapter->hw;
267 struct mii_ioctl_data *data = if_mii(ifr);
268
269 - if (adapter->hw.phy.media_type != e1000_media_type_copper)
270 + if (adapter->hw.phy.media_type != e1000_media_type_copper &&
271 + !(rd32(E1000_MDICNFG) & E1000_MDICNFG_EXT_MDIO))
272 return -EOPNOTSUPP;
273
274 switch (cmd) {
275 case SIOCGMIIPHY:
276 - data->phy_id = adapter->hw.phy.addr;
277 + data->phy_id = hw->phy.addr;
278 break;
279 case SIOCGMIIREG:
280 - if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
281 - &data->val_out))
282 - return -EIO;
283 + if (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211) {
284 + if (igb_read_reg_gs40g(&adapter->hw, data->phy_id,
285 + data->reg_num & 0x1F,
286 + &data->val_out))
287 + return -EIO;
288 + } else {
289 + if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
290 + &data->val_out))
291 + return -EIO;
292 + }
293 break;
294 case SIOCSMIIREG:
295 + if (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211) {
296 + if (igb_write_reg_gs40g(hw, data->phy_id,
297 + data->reg_num & 0x1F,
298 + data->val_in))
299 + return -EIO;
300 + } else {
301 + if (igb_write_phy_reg(hw, data->reg_num & 0x1F,
302 + data->val_in))
303 + return -EIO;
304 + }
305 + break;
306 default:
307 return -EOPNOTSUPP;
308 }