ipq40xx: Use constant to set gpio active low/high
[openwrt/openwrt.git] / target / linux / ipq40xx / files-4.14 / arch / arm / boot / dts / qcom-ipq4019-ap.dk04.1.dtsi
1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 *
3 * Permission to use, copy, modify, and/or distribute this software for any
4 * purpose with or without fee is hereby granted, provided that the above
5 * copyright notice and this permission notice appear in all copies.
6 *
7 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
8 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
9 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
10 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
11 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
12 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
13 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
14 *
15 */
16
17 #include "qcom-ipq4019.dtsi"
18 #include <dt-bindings/gpio/gpio.h>
19
20 / {
21 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
22 compatible = "qcom,ipq4019";
23
24 soc {
25 pinctrl@1000000 {
26 serial_0_pins: serial_pinmux {
27 mux {
28 pins = "gpio16", "gpio17";
29 function = "blsp_uart0";
30 bias-disable;
31 };
32 };
33
34 serial_1_pins: serial1_pinmux {
35 mux {
36 pins = "gpio8", "gpio9";
37 function = "blsp_uart1";
38 bias-disable;
39 };
40 };
41
42 spi_0_pins: spi_0_pinmux {
43 pinmux {
44 function = "blsp_spi0";
45 pins = "gpio13", "gpio14", "gpio15";
46 };
47 pinmux_cs {
48 function = "gpio";
49 pins = "gpio12";
50 };
51 pinconf {
52 pins = "gpio13", "gpio14", "gpio15";
53 drive-strength = <12>;
54 bias-disable;
55 };
56 pinconf_cs {
57 pins = "gpio12";
58 drive-strength = <2>;
59 bias-disable;
60 output-high;
61 };
62 };
63
64 i2c_0_pins: i2c_0_pinmux {
65 pinmux {
66 function = "blsp_i2c0";
67 pins = "gpio10", "gpio11";
68 };
69 pinconf {
70 pins = "gpio10", "gpio11";
71 drive-strength = <16>;
72 bias-disable;
73 };
74 };
75
76 nand_pins: nand_pins {
77
78 pullups {
79 pins = "gpio52", "gpio53", "gpio58",
80 "gpio59";
81 function = "qpic";
82 bias-pull-up;
83 };
84
85 pulldowns {
86 pins = "gpio54", "gpio55", "gpio56",
87 "gpio57", "gpio60", "gpio61",
88 "gpio62", "gpio63", "gpio64",
89 "gpio65", "gpio66", "gpio67",
90 "gpio68", "gpio69";
91 function = "qpic";
92 bias-pull-down;
93 };
94 };
95 };
96
97 blsp_dma: dma@7884000 {
98 status = "okay";
99 };
100
101 spi_0: spi@78b5000 {
102 pinctrl-0 = <&spi_0_pins>;
103 pinctrl-names = "default";
104 status = "okay";
105 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
106
107 mx25l25635e@0 {
108 #address-cells = <1>;
109 #size-cells = <1>;
110 reg = <0>;
111 compatible = "mx25l25635e";
112 spi-max-frequency = <24000000>;
113 };
114 };
115
116 i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */
117 pinctrl-0 = <&i2c_0_pins>;
118 pinctrl-names = "default";
119
120 status = "okay";
121 };
122
123 serial@78af000 {
124 pinctrl-0 = <&serial_0_pins>;
125 pinctrl-names = "default";
126 status = "okay";
127 };
128
129 serial@78b0000 {
130 pinctrl-0 = <&serial_1_pins>;
131 pinctrl-names = "default";
132 status = "okay";
133 };
134
135 usb3_ss_phy: ssphy@9a000 {
136 status = "okay";
137 };
138
139 usb3_hs_phy: hsphy@a6000 {
140 status = "okay";
141 };
142
143 usb3: usb3@8af8800 {
144 status = "okay";
145 };
146
147 usb2_hs_phy: hsphy@a8000 {
148 status = "okay";
149 };
150
151 usb2: usb2@60f8800 {
152 status = "okay";
153 };
154
155 cryptobam: dma@8e04000 {
156 status = "okay";
157 };
158
159 crypto@8e3a000 {
160 status = "okay";
161 };
162
163 watchdog@b017000 {
164 status = "okay";
165 };
166
167 qpic_bam: dma@7984000 {
168 status = "okay";
169 };
170
171 nand: qpic-nand@79b0000 {
172 pinctrl-0 = <&nand_pins>;
173 pinctrl-names = "default";
174 status = "okay";
175 };
176 };
177 };