ipq40xx: use upstream board-2.bin
[openwrt/openwrt.git] / target / linux / ipq40xx / files-4.14 / arch / arm / boot / dts / qcom-ipq4029-mr33.dts
1 /*
2 * Device Tree Source for Meraki MR33 (Stinkbug)
3 *
4 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
5 * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
6 *
7 * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 */
13
14 #include "qcom-ipq4019.dtsi"
15 #include "qcom-ipq4019-bus.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/soc/qcom,tcsr.h>
19
20 / {
21 model = "Meraki MR33 Access Point";
22 compatible = "meraki,mr33", "qcom,ipq4019";
23
24 aliases {
25 led-boot = &status_green;
26 led-failsafe = &status_red;
27 led-running = &status_green;
28 led-upgrade = &power_orange;
29 };
30
31 /* Do we really need this defined? */
32 memory {
33 device_type = "memory";
34 reg = <0x80000000 0x10000000>;
35 };
36
37 soc {
38 mdio@90000 {
39 status = "okay";
40 pinctrl-0 = <&mdio_pins>;
41 pinctrl-names = "default";
42 /delete-node/ ethernet-phy@0;
43 /delete-node/ ethernet-phy@2;
44 /delete-node/ ethernet-phy@3;
45 /delete-node/ ethernet-phy@4;
46 };
47
48 /* It is a 56-bit counter that supplies the count to the ARM arch
49 timers and without upstream driver */
50 counter@4a1000 {
51 compatible = "qcom,qca-gcnt";
52 reg = <0x4a1000 0x4>;
53 };
54
55 ess_tcsr@1953000 {
56 compatible = "qcom,tcsr";
57 reg = <0x1953000 0x1000>;
58 qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
59 };
60
61 tcsr@1949000 {
62 compatible = "qcom,tcsr";
63 reg = <0x1949000 0x100>;
64 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
65 };
66
67 tcsr@1957000 {
68 compatible = "qcom,tcsr";
69 reg = <0x1957000 0x100>;
70 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
71 };
72
73 serial@78af000 {
74 pinctrl-0 = <&serial_0_pins>;
75 pinctrl-names = "default";
76 status = "okay";
77 };
78
79 serial@78b0000 {
80 pinctrl-0 = <&serial_1_pins>;
81 pinctrl-names = "default";
82 status = "okay";
83
84 bluetooth {
85 compatible = "ti,cc2650";
86 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
87 };
88 };
89
90 crypto@8e3a000 {
91 status = "okay";
92 };
93
94 watchdog@b017000 {
95 status = "okay";
96 };
97
98 ess-switch@c000000 {
99 switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
100 switch_lan_bmp = <0x0>; /* lan port bitmap */
101 switch_wan_bmp = <0x10>; /* wan port bitmap */
102 };
103
104 edma@c080000 {
105 qcom,single-phy;
106 qcom,num_gmac = <1>;
107 phy-mode = "rgmii-rxid";
108 status = "okay";
109 };
110 };
111
112 gpio-keys {
113 compatible = "gpio-keys";
114
115 reset {
116 label = "reset";
117 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
118 linux,code = <KEY_RESTART>;
119 };
120 };
121
122 gpio-leds {
123 compatible = "gpio-leds";
124
125 power_orange: power {
126 label = "mr33:orange:power";
127 gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
128 panic-indicator;
129 };
130 };
131 };
132
133 &blsp_dma {
134 status = "okay";
135 };
136
137 &cryptobam {
138 status = "okay";
139 };
140
141 &gmac0 {
142 qcom,phy_mdio_addr = <1>;
143 qcom,poll_required = <1>;
144 vlan_tag = <0 0x20>;
145 };
146
147 &i2c_0 {
148 pinctrl-0 = <&i2c_0_pins>;
149 pinctrl-names = "default";
150 status = "okay";
151 at24@50 {
152 compatible = "atmel,24c64";
153 pagesize = <32>;
154 reg = <0x50>;
155 read-only; /* This holds our MAC & Meraki board-data */
156 };
157 };
158
159 &i2c_1 {
160 pinctrl-0 = <&i2c_1_pins>;
161 pinctrl-names = "default";
162 status = "okay";
163
164 lp5562@30 {
165 enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
166 compatible = "ti,lp5562";
167 clock-mode = /bits/8 <2>;
168 reg = <0x30>;
169
170 /* RGB led */
171 status_red: chan0 {
172 chan-name = "mr33:red:status";
173 led-cur = /bits/ 8 <0x20>;
174 max-cur = /bits/ 8 <0x60>;
175 };
176
177 status_green: chan1 {
178 chan-name = "mr33:green:status";
179 led-cur = /bits/ 8 <0x20>;
180 max-cur = /bits/ 8 <0x60>;
181 };
182
183 chan2 {
184 chan-name = "mr33:blue:status";
185 led-cur = /bits/ 8 <0x20>;
186 max-cur = /bits/ 8 <0x60>;
187 };
188
189 chan3 {
190 chan-name = "mr33:white:status";
191 led-cur = /bits/ 8 <0x20>;
192 max-cur = /bits/ 8 <0x60>;
193 };
194 };
195 };
196
197 &nand {
198 pinctrl-0 = <&nand_pins>;
199 pinctrl-names = "default";
200 status = "okay";
201
202 nand@0 {
203 partitions {
204 compatible = "fixed-partitions";
205 #address-cells = <1>;
206 #size-cells = <1>;
207
208 partition@0 {
209 label = "sbl1";
210 reg = <0x000000000000 0x000000100000>;
211 read-only;
212 };
213 partition@1 {
214 label = "mibib";
215 reg = <0x000000100000 0x000000100000>;
216 read-only;
217 };
218 partition@2 {
219 label = "bootconfig";
220 reg = <0x000000200000 0x000000100000>;
221 read-only;
222 };
223 partition@3 {
224 label = "qsee";
225 reg = <0x000000300000 0x000000100000>;
226 read-only;
227 };
228 partition@4 {
229 label = "qsee_alt";
230 reg = <0x000000400000 0x000000100000>;
231 read-only;
232 };
233 partition@5 {
234 label = "cdt";
235 reg = <0x000000500000 0x000000080000>;
236 read-only;
237 };
238 partition@6 {
239 label = "cdt_alt";
240 reg = <0x000000580000 0x000000080000>;
241 read-only;
242 };
243 partition@7 {
244 label = "ddrparams";
245 reg = <0x000000600000 0x000000080000>;
246 read-only;
247 };
248 partition@8 {
249 label = "u-boot";
250 reg = <0x000000700000 0x000000200000>;
251 read-only;
252 };
253 partition@9 {
254 label = "u-boot-backup";
255 reg = <0x000000900000 0x000000200000>;
256 read-only;
257 };
258 partition@10 {
259 label = "ART";
260 reg = <0x000000b00000 0x000000080000>;
261 read-only;
262 };
263 partition@11 {
264 label = "ubi";
265 reg = <0x000000c00000 0x000007000000>;
266 };
267 };
268 };
269 };
270
271 &pcie0 {
272 status = "okay";
273 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
274 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
275 };
276
277 &qpic_bam {
278 status = "okay";
279 };
280
281 &tlmm {
282 /*
283 * GPIO43 should be 0/1 whenever the unit is
284 * powered through PoE or AC-Adapter.
285 * That said, playing with this seems to
286 * reset the AP.
287 */
288
289 mdio_pins: mdio_pinmux {
290 mux_1 {
291 pins = "gpio6";
292 function = "mdio";
293 bias-pull-up;
294 };
295 mux_2 {
296 pins = "gpio7";
297 function = "mdc";
298 bias-pull-up;
299 };
300 };
301
302 serial_0_pins: serial_pinmux {
303 mux {
304 pins = "gpio16", "gpio17";
305 function = "blsp_uart0";
306 bias-disable;
307 };
308 };
309
310 serial_1_pins: serial1_pinmux {
311 mux {
312 /* We use the i2c-0 pins for serial_1 */
313 pins = "gpio8", "gpio9";
314 function = "blsp_uart1";
315 bias-disable;
316 };
317 };
318
319 i2c_0_pins: i2c_0_pinmux {
320 pinmux {
321 function = "blsp_i2c0";
322 pins = "gpio20", "gpio21";
323 };
324 pinconf {
325 pins = "gpio20", "gpio21";
326 drive-strength = <16>;
327 bias-disable;
328 };
329 };
330
331 i2c_1_pins: i2c_1_pinmux {
332 pinmux {
333 function = "blsp_i2c1";
334 pins = "gpio34", "gpio35";
335 };
336 pinconf {
337 pins = "gpio34", "gpio35";
338 drive-strength = <16>;
339 bias-disable;
340 };
341 };
342
343 nand_pins: nand_pins {
344 /*
345 * There are 18 pins. 15 pins are common between LCD and NAND.
346 * The QPIC controller arbitrates between LCD and NAND. Of the
347 * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
348 *
349 * The meraki source hints that the bluetooth module claims
350 * pin 52 as well. But sadly, there's no data whenever this
351 * is a NAND or LCD exclusive pin or not.
352 */
353
354 pullups {
355 pins = "gpio52", "gpio53", "gpio58",
356 "gpio59";
357 function = "qpic";
358 bias-pull-up;
359 };
360
361 pulldowns {
362 pins = "gpio54", "gpio55", "gpio56",
363 "gpio57", "gpio60", "gpio61",
364 "gpio62", "gpio63", "gpio64",
365 "gpio65", "gpio66", "gpio67",
366 "gpio68", "gpio69";
367 function = "qpic";
368 bias-pull-down;
369 };
370 };
371 };
372
373 &wifi0 {
374 status = "okay";
375 qcom,ath10k-calibration-variant = "Meraki-MR33";
376 };
377
378 &wifi1 {
379 status = "okay";
380 qcom,ath10k-calibration-variant = "Meraki-MR33";
381 };