ipq40xx: 4.19: Enable pseudo random number generator
[openwrt/openwrt.git] / target / linux / ipq40xx / files-4.19 / arch / arm / boot / dts / qcom-ipq4018-a42.dts
1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2 * Copyright (c) 2017, Sven Eckelmann <sven.eckelmann@openmesh.com>
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 *
16 */
17
18 #include "qcom-ipq4019.dtsi"
19 #include <dt-bindings/gpio/gpio.h>
20 #include <dt-bindings/input/input.h>
21 #include <dt-bindings/soc/qcom,tcsr.h>
22
23 / {
24 model = "OpenMesh A42";
25 compatible = "openmesh,a42", "qcom,ipq4019";
26
27 soc {
28 rng@22000 {
29 status = "okay";
30 };
31
32 mdio@90000 {
33 status = "okay";
34 };
35
36 ess-psgmii@98000 {
37 status = "okay";
38 };
39
40 tcsr@194b000 {
41 /* select hostmode */
42 compatible = "qcom,tcsr";
43 reg = <0x194b000 0x100>;
44 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
45 status = "okay";
46 };
47
48 tcsr@1949000 {
49 compatible = "qcom,tcsr";
50 reg = <0x1949000 0x100>;
51 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
52 };
53
54 ess_tcsr@1953000 {
55 compatible = "qcom,tcsr";
56 reg = <0x1953000 0x1000>;
57 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
58 };
59
60 tcsr@1957000 {
61 compatible = "qcom,tcsr";
62 reg = <0x1957000 0x100>;
63 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
64 };
65
66 usb2: usb2@60f8800 {
67 status = "okay";
68 };
69
70 crypto@8e3a000 {
71 status = "okay";
72 };
73
74 watchdog@b017000 {
75 status = "okay";
76 };
77
78 ess-switch@c000000 {
79 status = "okay";
80 };
81
82 edma@c080000 {
83 status = "okay";
84 };
85 };
86
87 gpio-keys {
88 compatible = "gpio-keys";
89
90 reset {
91 label = "reset";
92 gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
93 linux,code = <KEY_RESTART>;
94 };
95 };
96
97 aliases {
98 led-boot = &power;
99 led-failsafe = &power;
100 led-running = &power;
101 led-upgrade = &power;
102 };
103
104 gpio-leds {
105 compatible = "gpio-leds";
106
107 red {
108 label = "a42:red:status";
109 gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
110 linux,default-trigger = "default-off";
111 };
112
113 power: green {
114 label = "a42:green:status";
115 gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
116 };
117
118 blue {
119 label = "a42:blue:status";
120 gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
121 linux,default-trigger = "default-off";
122 };
123 };
124
125 watchdog {
126 compatible = "linux,wdt-gpio";
127 gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
128 hw_algo = "toggle";
129 /* hw_margin_ms is actually 300s but driver limits it to 60s */
130 hw_margin_ms = <60000>;
131 always-running;
132 };
133 };
134
135 &tlmm {
136 serial_pins: serial_pinmux {
137 mux {
138 pins = "gpio60", "gpio61";
139 function = "blsp_uart0";
140 bias-disable;
141 };
142 };
143
144 spi_0_pins: spi_0_pinmux {
145 pin {
146 function = "blsp_spi0";
147 pins = "gpio55", "gpio56", "gpio57";
148 drive-strength = <12>;
149 bias-disable;
150 };
151 pin_cs {
152 function = "gpio";
153 pins = "gpio54";
154 drive-strength = <2>;
155 bias-disable;
156 output-high;
157 };
158 };
159 };
160
161 &blsp_dma {
162 status = "okay";
163 };
164
165 &blsp1_spi1 {
166 pinctrl-0 = <&spi_0_pins>;
167 pinctrl-names = "default";
168 status = "okay";
169 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
170
171 m25p80@0 {
172 #address-cells = <1>;
173 #size-cells = <1>;
174 compatible = "jedec,spi-nor";
175 reg = <0>;
176 spi-max-frequency = <24000000>;
177 /* partitions are passed via bootloader */
178 };
179 };
180
181 &blsp1_uart1 {
182 pinctrl-0 = <&serial_pins>;
183 pinctrl-names = "default";
184 status = "okay";
185 };
186
187 &cryptobam {
188 status = "okay";
189 };
190
191 &gmac0 {
192 qcom,phy_mdio_addr = <4>;
193 qcom,poll_required = <1>;
194 qcom,forced_speed = <1000>;
195 qcom,forced_duplex = <1>;
196 vlan_tag = <2 0x20>;
197 };
198
199 &gmac1 {
200 qcom,phy_mdio_addr = <3>;
201 qcom,poll_required = <1>;
202 qcom,forced_speed = <1000>;
203 qcom,forced_duplex = <1>;
204 vlan_tag = <1 0x10>;
205 };
206
207 &usb2_hs_phy {
208 status = "okay";
209 };
210
211 &wifi0 {
212 status = "okay";
213 qcom,ath10k-calibration-variant = "OM-A42";
214 };
215
216 &wifi1 {
217 status = "okay";
218 qcom,ath10k-calibration-variant = "OM-A42";
219 };