target/linux/ipq40xx/files-4.19/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  * Copyright (c) 2018, David Bauer <mail@david-bauer.net>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  *
  16  */
  17
  18 #include "qcom-ipq4019.dtsi"
  19 #include <dt-bindings/gpio/gpio.h>
  20 #include <dt-bindings/input/input.h>
  21 #include <dt-bindings/soc/qcom,tcsr.h>
  22
  23 / {
  24         model = "Netgear EX61X0v2";
  25         compatible = "netgear,ex61x0v2";
  26
  27         soc {
  28                 rng@22000 {
  29                         status = "okay";
  30                 };
  31
  32                 mdio@90000 {
  33                         status = "okay";
  34                 };
  35
  36                 ess-psgmii@98000 {
  37                         status = "okay";
  38                 };
  39
  40                 tcsr@1949000 {
  41                         compatible = "qcom,tcsr";
  42                         reg = <0x1949000 0x100>;
  43                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  44                 };
  45
  46                 ess_tcsr@1953000 {
  47                         compatible = "qcom,tcsr";
  48                         reg = <0x1953000 0x1000>;
  49                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  50                 };
  51
  52                 tcsr@1957000 {
  53                         compatible = "qcom,tcsr";
  54                         reg = <0x1957000 0x100>;
  55                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  56                 };
  57
  58                 crypto@8e3a000 {
  59                         status = "okay";
  60                 };
  61
  62                 watchdog@b017000 {
  63                         status = "okay";
  64                 };
  65
  66                 ess-switch@c000000 {
  67                         status = "okay";
  68                 };
  69
  70                 edma@c080000 {
  71                         status = "okay";
  72                         qcom,num_gmac = <1>;
  73                 };
  74         };
  75
  76         aliases {
  77                 led-boot = &power_amber;
  78                 led-failsafe = &power_amber;
  79                 led-running = &power_green;
  80                 led-upgrade = &power_amber;
  81         };
  82
  83         keys {
  84                 compatible = "gpio-keys";
  85
  86                 wps {
  87                         label = "wps";
  88                         gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
  89                         linux,code = <KEY_WPS_BUTTON>;
  90                 };
  91
  92                 reset {
  93                         label = "reset";
  94                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  95                         linux,code = <KEY_RESTART>;
  96                 };
  97         };
  98
  99         led_spi {
 100                 compatible = "spi-gpio";
 101                 #address-cells = <1>;
 102                 #size-cells = <0>;
 103
 104                 gpio-sck = <&tlmm 5 GPIO_ACTIVE_HIGH>;
 105                 gpio-mosi = <&tlmm 4 GPIO_ACTIVE_HIGH>;
 106                 num-chipselects = <0>;
 107
 108                 led_gpio: led_gpio@0 {
 109                         compatible = "fairchild,74hc595";
 110                         reg = <0>;
 111                         gpio-controller;
 112                         #gpio-cells = <2>;
 113                         registers-number = <1>;
 114                         spi-max-frequency = <1000000>;
 115                 };
 116         };
 117
 118         leds {
 119                 compatible = "gpio-leds";
 120
 121                 power_amber: power_amber {
 122                         label = "ex61x0v2:amber:power";
 123                         gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
 124                 };
 125
 126                 power_green: power_green {
 127                         label = "ex61x0v2:green:power";
 128                         gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
 129                 };
 130
 131                 right {
 132                         label = "ex61x0v2:blue:right";
 133                         gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
 134                 };
 135
 136                 left {
 137                         label = "ex61x0v2:blue:left";
 138                         gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
 139                 };
 140
 141                 client_green {
 142                         label = "ex61x0v2:green:client";
 143                         gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
 144                 };
 145
 146                 client_red {
 147                         label = "ex61x0v2:red:client";
 148                         gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
 149                 };
 150
 151                 router_green {
 152                         label = "ex61x0v2:green:router";
 153                         gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
 154                 };
 155
 156                 router_red {
 157                         label = "ex61x0v2:red:router";
 158                         gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
 159                 };
 160
 161                 wps {
 162                         label = "ex61x0v2:green:wps";
 163                         gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
 164                 };
 165         };
 166 };
 167
 168 &tlmm {
 169         serial_pins: serial_pinmux {
 170                 mux {
 171                         pins = "gpio60", "gpio61";
 172                         function = "blsp_uart0";
 173                         bias-disable;
 174                 };
 175         };
 176
 177         spi_0_pins: spi_0_pinmux {
 178                 pin {
 179                         function = "blsp_spi0";
 180                         pins = "gpio55", "gpio56", "gpio57";
 181                         drive-strength = <12>;
 182                         bias-disable;
 183                 };
 184                 pin_cs {
 185                         function = "gpio";
 186                         pins = "gpio54";
 187                         drive-strength = <2>;
 188                         bias-disable;
 189                         output-high;
 190                 };
 191         };
 192 };
 193
 194 &blsp1_spi1 {
 195         pinctrl-0 = <&spi_0_pins>;
 196         pinctrl-names = "default";
 197         status = "okay";
 198         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 199
 200         mx25l12805d@0 {
 201                 compatible = "jedec,spi-nor";
 202                 reg = <0>;
 203                 spi-max-frequency = <24000000>;
 204
 205                 partitions {
 206                         compatible = "fixed-partitions";
 207                         #address-cells = <1>;
 208                         #size-cells = <1>;
 209
 210                         partition0@0 {
 211                                 label = "SBL1";
 212                                 reg = <0x00000000 0x00040000>;
 213                                 read-only;
 214                         };
 215
 216                         partition1@40000 {
 217                                 label = "MIBIB";
 218                                 reg = <0x00040000 0x00020000>;
 219                                 read-only;
 220                         };
 221
 222                         partition2@60000 {
 223                                 label = "QSEE";
 224                                 reg = <0x00060000 0x00060000>;
 225                                 read-only;
 226                         };
 227
 228                         partition3@c0000 {
 229                                 label = "CDT";
 230                                 reg = <0x000c0000 0x00010000>;
 231                                 read-only;
 232                         };
 233
 234                         partition4@d0000 {
 235                                 label = "DDRPARAMS";
 236                                 reg = <0x000d0000 0x00010000>;
 237                                 read-only;
 238                         };
 239
 240                         partition5@E0000 {
 241                                 label = "APPSBLENV";
 242                                 reg = <0x000e0000 0x00010000>;
 243                                 read-only;
 244                         };
 245
 246                         partition6@F0000 {
 247                                 label = "APPSBL";
 248                                 reg = <0x000f0000 0x00080000>;
 249                                 read-only;
 250                         };
 251
 252                         partition7@170000 {
 253                                 label = "ART";
 254                                 reg = <0x00170000 0x00010000>;
 255                                 read-only;
 256                         };
 257
 258                         partition8@180000 {
 259                                 label = "config";
 260                                 reg = <0x00180000 0x00010000>;
 261                                 read-only;
 262                         };
 263
 264                         partition9@190000 {
 265                                 label = "pot";
 266                                 reg = <0x00190000 0x00010000>;
 267                                 read-only;
 268                         };
 269
 270                         partition10@1a0000 {
 271                                 label = "dnidata";
 272                                 reg = <0x001a0000 0x00010000>;
 273                                 read-only;
 274                         };
 275
 276                         partition11@1b0000 {
 277                                 compatible = "denx,fit";
 278                                 label = "firmware";
 279                                 reg = <0x001b0000 0x00e10000>;
 280                         };
 281
 282                         partition12@fc0000 {
 283                                 label = "language";
 284                                 reg = <0x00fc0000 0x00040000>;
 285                                 read-only;
 286                         };
 287                 };
 288         };
 289 };
 290
 291 &blsp1_uart1 {
 292         pinctrl-0 = <&serial_pins>;
 293         pinctrl-names = "default";
 294         status = "okay";
 295 };
 296
 297 &blsp_dma {
 298         status = "okay";
 299 };
 300
 301 &cryptobam {
 302         status = "okay";
 303 };
 304
 305 &wifi0 {
 306         status = "okay";
 307 };
 308
 309 &wifi1 {
 310         status = "okay";
 311 };