target/linux/ipq40xx/patches-4.14/072-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch

   1 From 544af73985cd14b450bb8e8a6c22b89a555ac729 Mon Sep 17 00:00:00 2001
   2 From: Matthew McClintock <mmcclint@codeaurora.org>
   3 Date: Mon, 23 Jul 2018 09:10:35 +0200
   4 Subject: [PATCH 6/8] qcom: ipq4019: add cpu operating points for cpufreq
   5  support
   6
   7 This adds some operating points for cpu frequeny scaling
   8
   9 Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
  10 Signed-off-by: John Crispin <john@phrozen.org>
  11 ---
  12  arch/arm/boot/dts/qcom-ipq4019.dtsi | 34 ++++++++++++++++++++++++++--------
  13  1 file changed, 26 insertions(+), 8 deletions(-)
  14
  15 Index: linux-4.14.54/arch/arm/boot/dts/qcom-ipq4019.dtsi
  16 ===================================================================
  17 --- linux-4.14.54.orig/arch/arm/boot/dts/qcom-ipq4019.dtsi
  18 +++ linux-4.14.54/arch/arm/boot/dts/qcom-ipq4019.dtsi
  19 @@ -41,14 +41,7 @@
  20                         reg = <0x0>;
  21                         clocks = <&gcc GCC_APPS_CLK_SRC>;
  22                         clock-frequency = <0>;
  23 -                       operating-points = <
  24 -                               /* kHz  uV (fixed) */
  25 -                               48000   1100000
  26 -                               200000  1100000
  27 -                               500000  1100000
  28 -                               666000  1100000
  29 -                       >;
  30 -                       clock-latency = <256000>;
  31 +                       operating-points-v2 = <&cpu0_opp_table>;
  32                 };
  33
  34                 cpu@1 {
  35 @@ -61,6 +54,7 @@
  36                         reg = <0x1>;
  37                         clocks = <&gcc GCC_APPS_CLK_SRC>;
  38                         clock-frequency = <0>;
  39 +                       operating-points-v2 = <&cpu0_opp_table>;
  40                 };
  41
  42                 cpu@2 {
  43 @@ -73,6 +67,7 @@
  44                         reg = <0x2>;
  45                         clocks = <&gcc GCC_APPS_CLK_SRC>;
  46                         clock-frequency = <0>;
  47 +                       operating-points-v2 = <&cpu0_opp_table>;
  48                 };
  49
  50                 cpu@3 {
  51 @@ -85,6 +80,29 @@
  52                         reg = <0x3>;
  53                         clocks = <&gcc GCC_APPS_CLK_SRC>;
  54                         clock-frequency = <0>;
  55 +                       operating-points-v2 = <&cpu0_opp_table>;
  56 +               };
  57 +       };
  58 +
  59 +       cpu0_opp_table: opp_table0 {
  60 +               compatible = "operating-points-v2";
  61 +               opp-shared;
  62 +
  63 +               opp-48000000 {
  64 +                       opp-hz = /bits/ 64 <48000000>;
  65 +                       clock-latency-ns = <256000>;
  66 +               };
  67 +               opp-200000000 {
  68 +                       opp-hz = /bits/ 64 <200000000>;
  69 +                       clock-latency-ns = <256000>;
  70 +               };
  71 +               opp-500000000 {
  72 +                       opp-hz = /bits/ 64 <500000000>;
  73 +                       clock-latency-ns = <256000>;
  74 +               };
  75 +               opp-716000000 {
  76 +                       opp-hz = /bits/ 64 <716000000>;
  77 +                       clock-latency-ns = <256000>;
  78                 };
  79
  80                 L2: l2-cache {