target/linux/ipq40xx/patches-4.14/105-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch

   1 From: Christian Lamparter <chunkeey@gmail.com>
   2 Date: Thu, 12 Apr 2018 21:01:38 +0200
   3 Subject: [PATCH] pinctrl: msm: fix gpio-hog related boot issues
   4
   5 Sven Eckelmann reported an issue with the current IPQ4019 pinctrl.
   6 Setting up any gpio-hog in the device-tree for his device would
   7 "kill the bootup completely":
   8
   9 | [    0.477838] msm_serial 78af000.serial: could not find pctldev for node /soc/pinctrl@1000000/serial_pinmux, deferring probe
  10 | [    0.499828] spi_qup 78b5000.spi: could not find pctldev for node /soc/pinctrl@1000000/spi_0_pinmux, deferring probe
  11 | [    1.298883] requesting hog GPIO enable USB2 power (chip 1000000.pinctrl, offset 58) failed, -517
  12 | [    1.299609] gpiochip_add_data: GPIOs 0..99 (1000000.pinctrl) failed to register
  13 | [    1.308589] ipq4019-pinctrl 1000000.pinctrl: Failed register gpiochip
  14 | [    1.316586] msm_serial 78af000.serial: could not find pctldev for node /soc/pinctrl@1000000/serial_pinmux, deferring probe
  15 | [    1.322415] spi_qup 78b5000.spi: could not find pctldev for node /soc/pinctrl@1000000/spi_0_pinmux, deferri
  16
  17 This was also verified on a RT-AC58U (IPQ4018) which would
  18 no longer boot, if a gpio-hog was specified. (Tried forcing
  19 the USB LED PIN (GPIO0) to high.).
  20
  21 The problem is that Pinctrl+GPIO registration is currently
  22 peformed in the following order in pinctrl-msm.c:
  23         1. pinctrl_register()
  24         2. gpiochip_add()
  25         3. gpiochip_add_pin_range()
  26
  27 The actual error code -517 == -EPROBE_DEFER is coming from
  28 pinctrl_get_device_gpio_range(), which is called through:
  29         gpiochip_add
  30             of_gpiochip_add
  31                 of_gpiochip_scan_gpios
  32                     gpiod_hog
  33                         gpiochip_request_own_desc
  34                             __gpiod_request
  35                                 chip->request
  36                                     gpiochip_generic_request
  37                                        pinctrl_gpio_request
  38                                           pinctrl_get_device_gpio_range
  39
  40 pinctrl_get_device_gpio_range() is unable to find any valid
  41 pin ranges, since nothing has been added to the pinctrldev_list yet.
  42 so the range can't be found, and the operation fails with -EPROBE_DEFER.
  43
  44 This patch fixes the issue by adding the "gpio-ranges" property to
  45 the pinctrl device node of all upstream Qcom SoC. The pin ranges are
  46 then added by the gpio core.
  47
  48 In order to remain compatible with older, existing DTs (and ACPI)
  49 a check for the "gpio-ranges" property has been added to
  50 msm_gpio_init(). This prevents the driver of adding the same entry
  51 to the pinctrldev_list twice.
  52
  53 Reported-by: Sven Eckelmann <sven.eckelmann@openmesh.com>
  54 Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
  55
  56 Origin: other, https://patchwork.kernel.org/patch/10339127/
  57 ---
  58  arch/arm/boot/dts/qcom-ipq4019.dtsi   |  1 +
  59  drivers/pinctrl/qcom/pinctrl-msm.c    | 23 ++++++++++++++++++-----
  60  14 files changed, 32 insertions(+), 6 deletions(-)
  61
  62 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
  63 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
  64 @@ -166,6 +166,7 @@
  65                         compatible = "qcom,ipq4019-pinctrl";
  66                         reg = <0x01000000 0x300000>;
  67                         gpio-controller;
  68 +                       gpio-ranges = <&tlmm 0 0 100>;
  69                         #gpio-cells = <2>;
  70                         interrupt-controller;
  71                         #interrupt-cells = <2>;
  72 --- a/drivers/pinctrl/qcom/pinctrl-msm.c
  73 +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
  74 @@ -831,11 +831,24 @@ static int msm_gpio_init(struct msm_pinc
  75                 return ret;
  76         }
  77
  78 -       ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), 0, 0, chip->ngpio);
  79 -       if (ret) {
  80 -               dev_err(pctrl->dev, "Failed to add pin range\n");
  81 -               gpiochip_remove(&pctrl->chip);
  82 -               return ret;
  83 +       /*
  84 +        * For DeviceTree-supported systems, the gpio core checks the
  85 +        * pinctrl's device node for the "gpio-ranges" property.
  86 +        * If it is present, it takes care of adding the pin ranges
  87 +        * for the driver. In this case the driver can skip ahead.
  88 +        *
  89 +        * In order to remain compatible with older, existing DeviceTree
  90 +        * files which don't set the "gpio-ranges" property or systems that
  91 +        * utilize ACPI the driver has to call gpiochip_add_pin_range().
  92 +        */
  93 +       if (!of_property_read_bool(pctrl->dev->of_node, "gpio-ranges")) {
  94 +               ret = gpiochip_add_pin_range(&pctrl->chip,
  95 +                       dev_name(pctrl->dev), 0, 0, chip->ngpio);
  96 +               if (ret) {
  97 +                       dev_err(pctrl->dev, "Failed to add pin range\n");
  98 +                       gpiochip_remove(&pctrl->chip);
  99 +                       return ret;
 100 +               }
 101         }
 102
 103         ret = gpiochip_irqchip_add(chip,