target/linux/ipq40xx/patches-5.4/700-net-add-qualcomm-mdio.patch

   1 --- a/drivers/net/phy/Kconfig
   2 +++ b/drivers/net/phy/Kconfig
   3 @@ -580,6 +580,13 @@ config XILINX_GMII2RGMII
   4           the Reduced Gigabit Media Independent Interface(RGMII) between
   5           Ethernet physical media devices and the Gigabit Ethernet controller.
   6
   7 +config MDIO_IPQ40XX
   8 +       tristate "Qualcomm Atheros ipq40xx MDIO interface"
   9 +       depends on HAS_IOMEM && OF
  10 +       ---help---
  11 +         This driver supports the MDIO interface found in Qualcomm
  12 +         Atheros ipq40xx Soc chip.
  13 +
  14  endif # PHYLIB
  15
  16  config MICREL_KS8995MA
  17 --- a/drivers/net/phy/Makefile
  18 +++ b/drivers/net/phy/Makefile
  19 @@ -51,6 +51,7 @@ obj-$(CONFIG_MDIO_CAVIUM)     += mdio-cavium
  20  obj-$(CONFIG_MDIO_GPIO)                += mdio-gpio.o
  21  obj-$(CONFIG_MDIO_HISI_FEMAC)  += mdio-hisi-femac.o
  22  obj-$(CONFIG_MDIO_I2C)         += mdio-i2c.o
  23 +obj-$(CONFIG_MDIO_IPQ40XX)     += mdio-ipq40xx.o
  24  obj-$(CONFIG_MDIO_MOXART)      += mdio-moxart.o
  25  obj-$(CONFIG_MDIO_MSCC_MIIM)   += mdio-mscc-miim.o
  26  obj-$(CONFIG_MDIO_OCTEON)      += mdio-octeon.o
  27 --- /dev/null
  28 +++ b/drivers/net/phy/mdio-ipq40xx.c
  29 @@ -0,0 +1,196 @@
  30 +/*
  31 + * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
  32 + *
  33 + * Permission to use, copy, modify, and/or distribute this software for
  34 + * any purpose with or without fee is hereby granted, provided that the
  35 + * above copyright notice and this permission notice appear in all copies.
  36 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  37 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  38 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  39 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  40 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  41 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
  42 + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  43 + */
  44 +
  45 +#include <linux/delay.h>
  46 +#include <linux/kernel.h>
  47 +#include <linux/module.h>
  48 +#include <linux/mutex.h>
  49 +#include <linux/io.h>
  50 +#include <linux/of_address.h>
  51 +#include <linux/of_mdio.h>
  52 +#include <linux/phy.h>
  53 +#include <linux/platform_device.h>
  54 +
  55 +#define MDIO_CTRL_0_REG                0x40
  56 +#define MDIO_CTRL_1_REG                0x44
  57 +#define MDIO_CTRL_2_REG                0x48
  58 +#define MDIO_CTRL_3_REG                0x4c
  59 +#define MDIO_CTRL_4_REG                0x50
  60 +#define MDIO_CTRL_4_ACCESS_BUSY                BIT(16)
  61 +#define MDIO_CTRL_4_ACCESS_START               BIT(8)
  62 +#define MDIO_CTRL_4_ACCESS_CODE_READ           0
  63 +#define MDIO_CTRL_4_ACCESS_CODE_WRITE  1
  64 +#define CTRL_0_REG_DEFAULT_VALUE       0x150FF
  65 +
  66 +#define IPQ40XX_MDIO_RETRY     1000
  67 +#define IPQ40XX_MDIO_DELAY     10
  68 +
  69 +struct ipq40xx_mdio_data {
  70 +       struct mii_bus  *mii_bus;
  71 +       void __iomem    *membase;
  72 +       struct device   *dev;
  73 +};
  74 +
  75 +static int ipq40xx_mdio_wait_busy(struct ipq40xx_mdio_data *am)
  76 +{
  77 +       int i;
  78 +
  79 +       for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) {
  80 +               unsigned int busy;
  81 +
  82 +               busy = readl(am->membase + MDIO_CTRL_4_REG) &
  83 +                       MDIO_CTRL_4_ACCESS_BUSY;
  84 +               if (!busy)
  85 +                       return 0;
  86 +
  87 +               /* BUSY might take to be cleard by 15~20 times of loop */
  88 +               udelay(IPQ40XX_MDIO_DELAY);
  89 +       }
  90 +
  91 +       dev_err(am->dev, "%s: MDIO operation timed out\n", am->mii_bus->name);
  92 +
  93 +       return -ETIMEDOUT;
  94 +}
  95 +
  96 +static int ipq40xx_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
  97 +{
  98 +       struct ipq40xx_mdio_data *am = bus->priv;
  99 +       int value = 0;
 100 +       unsigned int cmd = 0;
 101 +
 102 +       lockdep_assert_held(&bus->mdio_lock);
 103 +
 104 +       if (ipq40xx_mdio_wait_busy(am))
 105 +               return -ETIMEDOUT;
 106 +
 107 +       /* issue the phy address and reg */
 108 +       writel((mii_id << 8) | regnum, am->membase + MDIO_CTRL_1_REG);
 109 +
 110 +       cmd = MDIO_CTRL_4_ACCESS_START|MDIO_CTRL_4_ACCESS_CODE_READ;
 111 +
 112 +       /* issue read command */
 113 +       writel(cmd, am->membase + MDIO_CTRL_4_REG);
 114 +
 115 +       /* Wait read complete */
 116 +       if (ipq40xx_mdio_wait_busy(am))
 117 +               return -ETIMEDOUT;
 118 +
 119 +       /* Read data */
 120 +       value = readl(am->membase + MDIO_CTRL_3_REG);
 121 +
 122 +       return value;
 123 +}
 124 +
 125 +static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
 126 +                           u16 value)
 127 +{
 128 +       struct ipq40xx_mdio_data *am = bus->priv;
 129 +       unsigned int cmd = 0;
 130 +
 131 +       lockdep_assert_held(&bus->mdio_lock);
 132 +
 133 +       if (ipq40xx_mdio_wait_busy(am))
 134 +               return -ETIMEDOUT;
 135 +
 136 +       /* issue the phy address and reg */
 137 +       writel((mii_id << 8) | regnum, am->membase + MDIO_CTRL_1_REG);
 138 +
 139 +       /* issue write data */
 140 +       writel(value, am->membase + MDIO_CTRL_2_REG);
 141 +
 142 +       cmd = MDIO_CTRL_4_ACCESS_START|MDIO_CTRL_4_ACCESS_CODE_WRITE;
 143 +       /* issue write command */
 144 +       writel(cmd, am->membase + MDIO_CTRL_4_REG);
 145 +
 146 +       /* Wait write complete */
 147 +       if (ipq40xx_mdio_wait_busy(am))
 148 +               return -ETIMEDOUT;
 149 +
 150 +       return 0;
 151 +}
 152 +
 153 +static int ipq40xx_mdio_probe(struct platform_device *pdev)
 154 +{
 155 +       struct ipq40xx_mdio_data *am;
 156 +       struct resource *res;
 157 +       int i;
 158 +
 159 +       am = devm_kzalloc(&pdev->dev, sizeof(*am), GFP_KERNEL);
 160 +       if (!am)
 161 +               return -ENOMEM;
 162 +
 163 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 164 +       if (!res) {
 165 +               dev_err(&pdev->dev, "no iomem resource found\n");
 166 +               return -ENXIO;
 167 +       }
 168 +
 169 +       am->membase = devm_ioremap_resource(&pdev->dev, res);
 170 +       if (IS_ERR(am->membase)) {
 171 +               dev_err(&pdev->dev, "unable to ioremap registers\n");
 172 +               return PTR_ERR(am->membase);
 173 +       }
 174 +
 175 +       am->mii_bus = devm_mdiobus_alloc(&pdev->dev);
 176 +       if (!am->mii_bus)
 177 +               return  -ENOMEM;
 178 +
 179 +       writel(CTRL_0_REG_DEFAULT_VALUE, am->membase + MDIO_CTRL_0_REG);
 180 +
 181 +       am->mii_bus->name = "ipq40xx_mdio";
 182 +       am->mii_bus->read = ipq40xx_mdio_read;
 183 +       am->mii_bus->write = ipq40xx_mdio_write;
 184 +       am->mii_bus->priv = am;
 185 +       am->mii_bus->parent = &pdev->dev;
 186 +       snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev));
 187 +
 188 +       am->dev = &pdev->dev;
 189 +       platform_set_drvdata(pdev, am);
 190 +
 191 +       return of_mdiobus_register(am->mii_bus, pdev->dev.of_node);
 192 +}
 193 +
 194 +static int ipq40xx_mdio_remove(struct platform_device *pdev)
 195 +{
 196 +       struct ipq40xx_mdio_data *am = platform_get_drvdata(pdev);
 197 +
 198 +       mdiobus_unregister(am->mii_bus);
 199 +
 200 +       return 0;
 201 +}
 202 +
 203 +static const struct of_device_id ipq40xx_mdio_dt_ids[] = {
 204 +       { .compatible = "qcom,ipq4019-mdio" },
 205 +       { }
 206 +};
 207 +MODULE_DEVICE_TABLE(of, ipq40xx_mdio_dt_ids);
 208 +
 209 +static struct platform_driver ipq40xx_mdio_driver = {
 210 +       .probe = ipq40xx_mdio_probe,
 211 +       .remove = ipq40xx_mdio_remove,
 212 +       .driver = {
 213 +               .name = "ipq40xx-mdio",
 214 +               .of_match_table = ipq40xx_mdio_dt_ids,
 215 +       },
 216 +};
 217 +
 218 +module_platform_driver(ipq40xx_mdio_driver);
 219 +
 220 +#define DRV_VERSION     "1.0"
 221 +
 222 +MODULE_DESCRIPTION("IPQ40XX MDIO interface driver");
 223 +MODULE_AUTHOR("Qualcomm Atheros");
 224 +MODULE_VERSION(DRV_VERSION);
 225 +MODULE_LICENSE("Dual BSD/GPL");