739b7261a318fba4c2cc4d458ad6c5c8515af785
[openwrt/openwrt.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-wpq864.dts
1 /*
2 * BSD LICENSE
3 *
4 * Copyright (C) 2017 Christian Mehlis <christian@m3hlis.de>
5 * Copyright (C) 2018 Mathias Kresin <dev@kresin.me>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. Neither the names of the copyright holders nor the names of any
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include "qcom-ipq8064-v1.0.dtsi"
35
36 #include <dt-bindings/input/input.h>
37 #include <dt-bindings/soc/qcom,tcsr.h>
38
39 / {
40 compatible = "compex,wpq864", "qcom,ipq8064";
41 model = "Compex WPQ864";
42
43 aliases {
44 mdio-gpio0 = &mdio0;
45 ethernet0 = &gmac1;
46 ethernet1 = &gmac0;
47
48 led-boot = &led_pass;
49 led-failsafe = &led_fail;
50 led-running = &led_pass;
51 led-upgrade = &led_pass;
52 };
53
54 leds {
55 compatible = "gpio-leds";
56
57 pinctrl-0 = <&led_pins>;
58 pinctrl-names = "default";
59
60 rss4 {
61 label = "green:rss4";
62 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
63 };
64
65 rss3 {
66 label = "green:rss3";
67 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
68 default-state = "keep";
69 };
70
71 rss2 {
72 label = "orange:rss2";
73 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
74 };
75
76 rss1 {
77 label = "red:rss1";
78 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
79 };
80
81 led_pass: pass {
82 label = "green:pass";
83 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
84 };
85
86 led_fail: fail {
87 label = "green:fail";
88 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
89 };
90
91 usb {
92 label = "green:usb";
93 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
94 };
95
96 usb-pcie {
97 label = "green:usb-pcie";
98 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
99 };
100 };
101
102 keys {
103 compatible = "gpio-keys";
104
105 pinctrl-0 = <&button_pins>;
106 pinctrl-names = "default";
107
108 reset {
109 label = "reset";
110 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
111 linux,code = <KEY_RESTART>;
112 };
113 };
114
115 beeper {
116 compatible = "gpio-beeper";
117
118 pinctrl-0 = <&beeper_pins>;
119 pinctrl-names = "default";
120
121 gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
122 };
123 };
124
125 &rpm {
126 pinctrl-0 = <&rpm_pins>;
127 pinctrl-names = "default";
128 };
129
130 &nand_controller {
131 status = "okay";
132
133 pinctrl-0 = <&nand_pins>;
134 pinctrl-names = "default";
135
136 mt29f2g08abbeah4@0 {
137 compatible = "qcom,nandcs";
138
139 reg = <0>;
140
141 nand-ecc-strength = <4>;
142 nand-bus-width = <8>;
143 nand-ecc-step-size = <512>;
144
145 partitions {
146 compatible = "fixed-partitions";
147 #address-cells = <1>;
148 #size-cells = <1>;
149
150 SBL1@0 {
151 label = "SBL1";
152 reg = <0x0000000 0x0040000>;
153 read-only;
154 };
155
156 MIBIB@40000 {
157 label = "MIBIB";
158 reg = <0x0040000 0x0140000>;
159 read-only;
160 };
161
162 SBL2@180000 {
163 label = "SBL2";
164 reg = <0x0180000 0x0140000>;
165 read-only;
166 };
167
168 SBL3@2c0000 {
169 label = "SBL3";
170 reg = <0x02c0000 0x0280000>;
171 read-only;
172 };
173
174 DDRCONFIG@540000 {
175 label = "DDRCONFIG";
176 reg = <0x0540000 0x0120000>;
177 read-only;
178 };
179
180 SSD@660000 {
181 label = "SSD";
182 reg = <0x0660000 0x0120000>;
183 read-only;
184 };
185
186 TZ@780000 {
187 label = "TZ";
188 reg = <0x0780000 0x0280000>;
189 read-only;
190 };
191
192 RPM@a00000 {
193 label = "RPM";
194 reg = <0x0a00000 0x0280000>;
195 read-only;
196 };
197
198 APPSBL@c80000 {
199 label = "APPSBL";
200 reg = <0x0c80000 0x0500000>;
201 read-only;
202 };
203
204 APPSBLENV@1180000 {
205 label = "APPSBLENV";
206 reg = <0x1180000 0x0080000>;
207 };
208
209 ART@1200000 {
210 label = "ART";
211 reg = <0x1200000 0x0140000>;
212 };
213
214 ubi@1340000 {
215 label = "ubi";
216 reg = <0x1340000 0x4000000>;
217 };
218
219 BOOTCONFIG@5340000 {
220 label = "BOOTCONFIG";
221 reg = <0x5340000 0x0060000>;
222 };
223
224 SBL2-1@53a0000- {
225 label = "SBL2_1";
226 reg = <0x53a0000 0x0140000>;
227 read-only;
228 };
229
230 SBL3-1@54e0000 {
231 label = "SBL3_1";
232 reg = <0x54e0000 0x0280000>;
233 read-only;
234 };
235
236 DDRCONFIG-1@5760000 {
237 label = "DDRCONFIG_1";
238 reg = <0x5760000 0x0120000>;
239 read-only;
240 };
241
242 SSD-1@5880000 {
243 label = "SSD_1";
244 reg = <0x5880000 0x0120000>;
245 read-only;
246 };
247
248 TZ-1@59a0000 {
249 label = "TZ_1";
250 reg = <0x59a0000 0x0280000>;
251 read-only;
252 };
253
254 RPM-1@5c20000 {
255 label = "RPM_1";
256 reg = <0x5c20000 0x0280000>;
257 read-only;
258 };
259
260 BOOTCONFIG1@5ea0000 {
261 label = "BOOTCONFIG1";
262 reg = <0x5ea0000 0x0060000>;
263 };
264
265 APPSBL-1@5f00000 {
266 label = "APPSBL_1";
267 reg = <0x5f00000 0x0500000>;
268 read-only;
269 };
270
271 ubi-1@6400000 {
272 label = "ubi_1";
273 reg = <0x6400000 0x4000000>;
274 };
275
276 unused@a400000 {
277 label = "unused";
278 reg = <0xa400000 0x5c00000>;
279 };
280 };
281 };
282 };
283
284 &adm_dma {
285 status = "okay";
286 };
287
288 &mdio0 {
289 status = "okay";
290
291 pinctrl-0 = <&mdio0_pins>;
292 pinctrl-names = "default";
293
294 ethernet-phy@0 {
295 reg = <0>;
296 qca,ar8327-initvals = <
297 0x00004 0x7600000 /* PAD0_MODE */
298 0x00008 0x1000000 /* PAD5_MODE */
299 0x0000c 0x80 /* PAD6_MODE */
300 0x000e4 0x6a545 /* MAC_POWER_SEL */
301 0x000e0 0xc74164de /* SGMII_CTRL */
302 0x0007c 0x4e /* PORT0_STATUS */
303 0x00094 0x4e /* PORT6_STATUS */
304 >;
305 };
306
307 ethernet-phy@4 {
308 reg = <4>;
309 };
310 };
311
312 &gmac1 {
313 status = "okay";
314
315 pinctrl-0 = <&rgmii2_pins>;
316 pinctrl-names = "default";
317
318 phy-mode = "rgmii";
319 qcom,id = <1>;
320
321 fixed-link {
322 speed = <1000>;
323 full-duplex;
324 };
325 };
326
327 &gmac2 {
328 status = "okay";
329
330 phy-mode = "sgmii";
331 qcom,id = <2>;
332
333 fixed-link {
334 speed = <1000>;
335 full-duplex;
336 };
337 };
338
339 &gsbi4_serial {
340 pinctrl-0 = <&uart0_pins>;
341 pinctrl-names = "default";
342 };
343
344 &flash {
345 compatible = "jedec,spi-nor";
346 };
347
348 &sata_phy {
349 status = "disabled";
350 };
351
352 &sata {
353 status = "disabled";
354 };
355
356 &ss_phy_0 { /* USB3 port 0 SS phy */
357 status = "okay";
358
359 rx_eq = <2>;
360 tx_deamp_3_5db = <32>;
361 mpll = <160>;
362 };
363
364 &ss_phy_1 { /* USB3 port 1 SS phy */
365 status = "okay";
366
367 rx_eq = <2>;
368 tx_deamp_3_5db = <32>;
369 mpll = <160>;
370 };
371
372 &pcie0 {
373 status = "okay";
374
375 /delete-property/ pinctrl-0;
376 /delete-property/ pinctrl-names;
377 /delete-property/ perst-gpios;
378 };
379
380 &pcie1 {
381 status = "okay";
382 };
383
384 &pcie2 {
385 status = "okay";
386
387 /delete-property/ pinctrl-0;
388 /delete-property/ pinctrl-names;
389 /delete-property/ perst-gpios;
390 };
391
392 &qcom_pinmux {
393 pinctrl-names = "default";
394 pinctrl-0 = <&state_default>;
395
396 state_default: pinctrl0 {
397 pcie0_pcie2_perst {
398 pins = "gpio3";
399 function = "gpio";
400 drive-strength = <2>;
401 bias-disable;
402 output-high;
403 };
404 };
405
406 led_pins: led_pins {
407 mux {
408 pins = "gpio7", "gpio8", "gpio9", "gpio22",
409 "gpio23", "gpio24", "gpio25", "gpio53";
410 function = "gpio";
411 drive-strength = <2>;
412 bias-pull-up;
413 };
414 };
415
416 button_pins: button_pins {
417 mux {
418 pins = "gpio54";
419 function = "gpio";
420 drive-strength = <2>;
421 bias-pull-up;
422 };
423 };
424
425 beeper_pins: beeper_pins {
426 mux {
427 pins = "gpio55";
428 function = "gpio";
429 drive-strength = <2>;
430 bias-pull-up;
431 };
432 };
433
434 rpm_pins: rpm_pins {
435 mux {
436 pins = "gpio12", "gpio13";
437 function = "gsbi4";
438 drive-strength = <10>;
439 bias-disable;
440 };
441 };
442
443 uart0_pins: uart0_pins {
444 mux {
445 pins = "gpio10", "gpio11";
446 function = "gsbi4";
447 drive-strength = <10>;
448 bias-disable;
449 };
450 };
451
452 spi_pins: spi_pins {
453 mux {
454 pins = "gpio18", "gpio19";
455 function = "gsbi5";
456 drive-strength = <10>;
457 bias-pull-down;
458 };
459
460 clk {
461 pins = "gpio21";
462 function = "gsbi5";
463 drive-strength = <12>;
464 bias-pull-down;
465 };
466
467 cs {
468 pins = "gpio20";
469 function = "gpio";
470 drive-strength = <10>;
471 bias-pull-up;
472 };
473 };
474 };
475
476 &usb3_0 {
477 status = "okay";
478 };
479
480 &usb3_1 {
481 status = "okay";
482 };
483
484 &tcsr {
485 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
486 };