target/linux/ipq806x/patches-3.18/155-dt-bindings-qcom_adm-Fix-channel-specifiers.patch

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   4 Subject: [v6,1/2] dt/bindings: qcom_adm: Fix channel specifiers
   5 From: Andy Gross <agross@codeaurora.org>
   6 X-Patchwork-Id: 6027361
   7 Message-Id: <1426571172-9711-2-git-send-email-agross@codeaurora.org>
   8 To: Vinod Koul <vinod.koul@intel.com>
   9 Cc: devicetree@vger.kernel.org, dmaengine@vger.kernel.org,
  10         linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
  11         linux-arm-kernel@lists.infradead.org, Kumar Gala <galak@codeaurora.org>,
  12         Bjorn Andersson <bjorn.andersson@sonymobile.com>,
  13         Andy Gross <agross@codeaurora.org>
  14 Date: Tue, 17 Mar 2015 00:46:11 -0500
  15
  16 This patch removes the crci information from the dma channel property.  At least
  17 one client device requires using more than one CRCI value for a channel.  This
  18 does not match the current binding and the crci information needs to be removed.
  19
  20 Instead, the client device will provide this information via other means.
  21
  22 Signed-off-by: Andy Gross <agross@codeaurora.org>
  23
  24 ---
  25 Documentation/devicetree/bindings/dma/qcom_adm.txt |   16 ++++++----------
  26  1 file changed, 6 insertions(+), 10 deletions(-)
  27
  28 --- a/Documentation/devicetree/bindings/dma/qcom_adm.txt
  29 +++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt
  30 @@ -4,8 +4,7 @@ Required properties:
  31  - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960
  32  - reg: Address range for DMA registers
  33  - interrupts: Should contain one interrupt shared by all channels
  34 -- #dma-cells: must be <2>.  First cell denotes the channel number.  Second cell
  35 -  denotes CRCI (client rate control interface) flow control assignment.
  36 +- #dma-cells: must be <1>.  First cell denotes the channel number.
  37  - clocks: Should contain the core clock and interface clock.
  38  - clock-names: Must contain "core" for the core clock and "iface" for the
  39    interface clock.
  40 @@ -22,7 +21,7 @@ Example:
  41                         compatible = "qcom,adm";
  42                         reg = <0x18300000 0x100000>;
  43                         interrupts = <0 170 0>;
  44 -                       #dma-cells = <2>;
  45 +                       #dma-cells = <1>;
  46
  47                         clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
  48                         clock-names = "core", "iface";
  49 @@ -35,15 +34,12 @@ Example:
  50                         qcom,ee = <0>;
  51                 };
  52
  53 -DMA clients must use the format descripted in the dma.txt file, using a three
  54 +DMA clients must use the format descripted in the dma.txt file, using a two
  55  cell specifier for each channel.
  56
  57 -Each dmas request consists of 3 cells:
  58 +Each dmas request consists of two cells:
  59   1. phandle pointing to the DMA controller
  60   2. channel number
  61 - 3. CRCI assignment, if applicable.  If no CRCI flow control is required, use 0.
  62 -    The CRCI is used for flow control.  It identifies the peripheral device that
  63 -    is the source/destination for the transferred data.
  64
  65  Example:
  66
  67 @@ -56,7 +52,7 @@ Example:
  68
  69                 cs-gpios = <&qcom_pinmux 20 0>;
  70
  71 -               dmas = <&adm_dma 6 9>,
  72 -                       <&adm_dma 5 10>;
  73 +               dmas = <&adm_dma 6>,
  74 +                       <&adm_dma 5>;
  75                 dma-names = "rx", "tx";
  76         };