target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch

   1 From 4910cfd150342ec7b038892262923c725a9c4001 Mon Sep 17 00:00:00 2001
   2 From: Sham Muthayyan <smuthayy@codeaurora.org>
   3 Date: Wed, 7 Sep 2016 16:44:28 +0530
   4 Subject: PCI: qcom: Force GEN1 support
   5
   6 Change-Id: Ica54ddb737d7b851469deab1745f54bf431bd3f0
   7 Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
   8 ---
   9  drivers/pci/host/pcie-qcom.c | 13 +++++++++++++
  10  1 file changed, 13 insertions(+)
  11
  12 --- a/drivers/pci/dwc/pcie-qcom.c
  13 +++ b/drivers/pci/dwc/pcie-qcom.c
  14 @@ -129,6 +129,8 @@
  15  #define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE     0x358
  16  #define SLV_ADDR_SPACE_SZ                      0x10000000
  17
  18 +#define PCIE20_LNK_CONTROL2_LINK_STATUS2        0xA0
  19 +
  20  struct qcom_pcie_resources_2_1_0 {
  21         struct clk *iface_clk;
  22         struct clk *core_clk;
  23 @@ -218,6 +220,7 @@
  24         struct phy *phy;
  25         struct gpio_desc *reset;
  26         struct qcom_pcie_ops *ops;
  27 +       uint32_t force_gen1;
  28  };
  29
  30  #define to_qcom_pcie(x)                dev_get_drvdata((x)->dev)
  31 @@ -532,6 +535,11 @@
  32
  33         /* wait for clock acquisition */
  34         usleep_range(1000, 1500);
  35 +       if (pcie->force_gen1) {
  36 +               writel_relaxed((readl_relaxed(
  37 +                       pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2) | 1),
  38 +                       pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2);
  39 +       }
  40
  41
  42         /* Set the Max TLP size to 2K, instead of using default of 4K */
  43 @@ -1382,6 +1390,8 @@
  44         struct dw_pcie *pci;
  45         struct qcom_pcie *pcie;
  46         int ret;
  47 +       uint32_t force_gen1 = 0;
  48 +       struct device_node *np = pdev->dev.of_node;
  49
  50         pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
  51         if (!pcie)
  52 @@ -1403,6 +1413,9 @@
  53         if (IS_ERR(pcie->reset))
  54                 return PTR_ERR(pcie->reset);
  55
  56 +       of_property_read_u32(np, "force_gen1", &force_gen1);
  57 +       pcie->force_gen1 = force_gen1;
  58 +
  59         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf");
  60         pcie->parf = devm_ioremap_resource(dev, res);
  61         if (IS_ERR(pcie->parf))