target/linux/ipq806x/patches-4.4/164-arm-qcom-dts-Add-NAND-controller-node-for-ipq806x.patch

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   4 Subject: [v3,4/5] arm: qcom: dts: Add NAND controller node for ipq806x
   5 From: Archit Taneja <architt@codeaurora.org>
   6 X-Patchwork-Id: 6927121
   7 Message-Id: <1438578498-32254-5-git-send-email-architt@codeaurora.org>
   8 To: linux-mtd@lists.infradead.org, dehrenberg@google.com,
   9         cernekee@gmail.com, computersforpeace@gmail.com
  10 Cc: linux-arm-msm@vger.kernel.org, agross@codeaurora.org,
  11         sboyd@codeaurora.org, linux-kernel@vger.kernel.org,
  12         Archit Taneja <architt@codeaurora.org>, devicetree@vger.kernel.org
  13 Date: Mon,  3 Aug 2015 10:38:17 +0530
  14
  15 The nand controller in IPQ806x is of the 'EBI2 type'. Use the corresponding
  16 compatible string.
  17
  18 Cc: devicetree@vger.kernel.org
  19
  20 Reviewed-by: Andy Gross <agross@codeaurora.org>
  21 Signed-off-by: Archit Taneja <architt@codeaurora.org>
  22
  23 ---
  24 arch/arm/boot/dts/qcom-ipq8064.dtsi | 15 +++++++++++++++
  25  1 file changed, 15 insertions(+)
  26
  27 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
  28 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
  29 @@ -743,6 +743,22 @@
  30
  31                         status = "disabled";
  32                 };
  33 +
  34 +               nand@1ac00000 {
  35 +                       compatible = "qcom,ebi2-nandc";
  36 +                       reg = <0x1ac00000 0x800>;
  37 +
  38 +                       clocks = <&gcc EBI2_CLK>,
  39 +                                <&gcc EBI2_AON_CLK>;
  40 +                       clock-names = "core", "aon";
  41 +
  42 +                       dmas = <&adm_dma 3>;
  43 +                       dma-names = "rxtx";
  44 +                       qcom,cmd-crci = <15>;
  45 +                       qcom,data-crci = <3>;
  46 +
  47 +                       status = "disabled";
  48 +               };
  49         };
  50
  51         sfpb_mutex: sfpb-mutex {