ipq806x: enable hw pseudo random number generator
[openwrt/openwrt.git] / target / linux / ipq806x / patches-4.4 / 708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch
1 From cab1f4720e82f2e17eaeed9a9ad9e4f07c742977 Mon Sep 17 00:00:00 2001
2 From: Mathieu Olivari <mathieu@codeaurora.org>
3 Date: Mon, 11 May 2015 12:29:18 -0700
4 Subject: [PATCH 8/8] ARM: dts: qcom: add gmac nodes to ipq806x platforms
5
6 Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
7 ---
8 arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 31 ++++++++++++
9 arch/arm/boot/dts/qcom-ipq8064-db149.dts | 43 ++++++++++++++++
10 arch/arm/boot/dts/qcom-ipq8064.dtsi | 86 ++++++++++++++++++++++++++++++++
11 3 files changed, 160 insertions(+)
12
13 --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
14 +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
15 @@ -75,6 +75,16 @@
16 bias-disable;
17 };
18 };
19 +
20 + rgmii2_pins: rgmii2_pins {
21 + mux {
22 + pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
23 + "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
24 + function = "rgmii2";
25 + drive-strength = <8>;
26 + bias-disable;
27 + };
28 + };
29 };
30
31 gsbi@16300000 {
32 @@ -198,6 +208,31 @@
33 reg = <4>;
34 };
35 };
36 +
37 + gmac1: ethernet@37200000 {
38 + status = "ok";
39 + phy-mode = "rgmii";
40 + qcom,id = <1>;
41 +
42 + pinctrl-0 = <&rgmii2_pins>;
43 + pinctrl-names = "default";
44 +
45 + fixed-link {
46 + speed = <1000>;
47 + full-duplex;
48 + };
49 + };
50 +
51 + gmac2: ethernet@37400000 {
52 + status = "ok";
53 + phy-mode = "sgmii";
54 + qcom,id = <2>;
55 +
56 + fixed-link {
57 + speed = <1000>;
58 + full-duplex;
59 + };
60 + };
61 };
62 };
63
64 --- a/arch/arm/boot/dts/qcom-ipq8064-db149.dts
65 +++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
66 @@ -48,6 +48,14 @@
67 bias-disable;
68 };
69 };
70 +
71 + rgmii0_pins: rgmii0_pins {
72 + mux {
73 + pins = "gpio2", "gpio66";
74 + drive-strength = <8>;
75 + bias-disable;
76 + };
77 + };
78 };
79
80 gsbi2: gsbi@12480000 {
81 @@ -189,5 +197,40 @@
82 reg = <7>;
83 };
84 };
85 +
86 + gmac0: ethernet@37000000 {
87 + status = "ok";
88 + phy-mode = "rgmii";
89 + qcom,id = <0>;
90 + phy-handle = <&phy4>;
91 +
92 + pinctrl-0 = <&rgmii0_pins>;
93 + pinctrl-names = "default";
94 + };
95 +
96 + gmac1: ethernet@37200000 {
97 + status = "ok";
98 + phy-mode = "sgmii";
99 + qcom,id = <1>;
100 +
101 + fixed-link {
102 + speed = <1000>;
103 + full-duplex;
104 + };
105 + };
106 +
107 + gmac2: ethernet@37400000 {
108 + status = "ok";
109 + phy-mode = "sgmii";
110 + qcom,id = <2>;
111 + phy-handle = <&phy6>;
112 + };
113 +
114 + gmac3: ethernet@37600000 {
115 + status = "ok";
116 + phy-mode = "sgmii";
117 + qcom,id = <3>;
118 + phy-handle = <&phy7>;
119 + };
120 };
121 };
122 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
123 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
124 @@ -917,6 +917,92 @@
125
126 status = "disabled";
127 };
128 +
129 + nss_common: syscon@03000000 {
130 + compatible = "syscon";
131 + reg = <0x03000000 0x0000FFFF>;
132 + };
133 +
134 + qsgmii_csr: syscon@1bb00000 {
135 + compatible = "syscon";
136 + reg = <0x1bb00000 0x000001FF>;
137 + };
138 +
139 + gmac0: ethernet@37000000 {
140 + device_type = "network";
141 + compatible = "qcom,ipq806x-gmac";
142 + reg = <0x37000000 0x200000>;
143 + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
144 + interrupt-names = "macirq";
145 +
146 + qcom,nss-common = <&nss_common>;
147 + qcom,qsgmii-csr = <&qsgmii_csr>;
148 +
149 + clocks = <&gcc GMAC_CORE1_CLK>;
150 + clock-names = "stmmaceth";
151 +
152 + resets = <&gcc GMAC_CORE1_RESET>;
153 + reset-names = "stmmaceth";
154 +
155 + status = "disabled";
156 + };
157 +
158 + gmac1: ethernet@37200000 {
159 + device_type = "network";
160 + compatible = "qcom,ipq806x-gmac";
161 + reg = <0x37200000 0x200000>;
162 + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
163 + interrupt-names = "macirq";
164 +
165 + qcom,nss-common = <&nss_common>;
166 + qcom,qsgmii-csr = <&qsgmii_csr>;
167 +
168 + clocks = <&gcc GMAC_CORE2_CLK>;
169 + clock-names = "stmmaceth";
170 +
171 + resets = <&gcc GMAC_CORE2_RESET>;
172 + reset-names = "stmmaceth";
173 +
174 + status = "disabled";
175 + };
176 +
177 + gmac2: ethernet@37400000 {
178 + device_type = "network";
179 + compatible = "qcom,ipq806x-gmac";
180 + reg = <0x37400000 0x200000>;
181 + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
182 + interrupt-names = "macirq";
183 +
184 + qcom,nss-common = <&nss_common>;
185 + qcom,qsgmii-csr = <&qsgmii_csr>;
186 +
187 + clocks = <&gcc GMAC_CORE3_CLK>;
188 + clock-names = "stmmaceth";
189 +
190 + resets = <&gcc GMAC_CORE3_RESET>;
191 + reset-names = "stmmaceth";
192 +
193 + status = "disabled";
194 + };
195 +
196 + gmac3: ethernet@37600000 {
197 + device_type = "network";
198 + compatible = "qcom,ipq806x-gmac";
199 + reg = <0x37600000 0x200000>;
200 + interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
201 + interrupt-names = "macirq";
202 +
203 + qcom,nss-common = <&nss_common>;
204 + qcom,qsgmii-csr = <&qsgmii_csr>;
205 +
206 + clocks = <&gcc GMAC_CORE4_CLK>;
207 + clock-names = "stmmaceth";
208 +
209 + resets = <&gcc GMAC_CORE4_RESET>;
210 + reset-names = "stmmaceth";
211 +
212 + status = "disabled";
213 + };
214 };
215
216 sfpb_mutex: sfpb-mutex {